cpuid.c 39.8 KB
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// SPDX-License-Identifier: GPL-2.0-only
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/*
 * Kernel-based Virtual Machine driver for Linux
 * cpuid support routines
 *
 * derived from arch/x86/kvm/x86.c
 *
 * Copyright 2011 Red Hat, Inc. and/or its affiliates.
 * Copyright IBM Corporation, 2008
 */

#include <linux/kvm_host.h>
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#include <linux/export.h>
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#include <linux/vmalloc.h>
#include <linux/uaccess.h>
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#include <linux/sched/stat.h>

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#include <asm/processor.h>
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#include <asm/user.h>
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#include <asm/fpu/xstate.h>
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#include <asm/sgx.h>
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#include <asm/cpuid.h>
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#include "cpuid.h"
#include "lapic.h"
#include "mmu.h"
#include "trace.h"
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#include "pmu.h"
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/*
 * Unlike "struct cpuinfo_x86.x86_capability", kvm_cpu_caps doesn't need to be
 * aligned to sizeof(unsigned long) because it's not accessed via bitops.
 */
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u32 kvm_cpu_caps[NR_KVM_CPU_CAPS] __read_mostly;
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EXPORT_SYMBOL_GPL(kvm_cpu_caps);

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u32 xstate_required_size(u64 xstate_bv, bool compacted)
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{
	int feature_bit = 0;
	u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;

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	xstate_bv &= XFEATURE_MASK_EXTEND;
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	while (xstate_bv) {
		if (xstate_bv & 0x1) {
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		        u32 eax, ebx, ecx, edx, offset;
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		        cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx);
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			/* ECX[1]: 64B alignment in compacted form */
			if (compacted)
				offset = (ecx & 0x2) ? ALIGN(ret, 64) : ret;
			else
				offset = ebx;
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			ret = max(ret, offset + eax);
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		}

		xstate_bv >>= 1;
		feature_bit++;
	}

	return ret;
}

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/*
 * This one is tied to SSB in the user API, and not
 * visible in /proc/cpuinfo.
 */
#define KVM_X86_FEATURE_PSFD		(13*32+28) /* Predictive Store Forwarding Disable */

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#define F feature_bit
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#define SF(name) (boot_cpu_has(X86_FEATURE_##name) ? F(name) : 0)
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static inline struct kvm_cpuid_entry2 *cpuid_entry2_find(
	struct kvm_cpuid_entry2 *entries, int nent, u32 function, u32 index)
{
	struct kvm_cpuid_entry2 *e;
	int i;

	for (i = 0; i < nent; i++) {
		e = &entries[i];

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		if (e->function == function &&
		    (!(e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) || e->index == index))
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			return e;
	}

	return NULL;
}

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static int kvm_check_cpuid(struct kvm_vcpu *vcpu,
			   struct kvm_cpuid_entry2 *entries,
			   int nent)
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{
	struct kvm_cpuid_entry2 *best;
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	u64 xfeatures;
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	/*
	 * The existing code assumes virtual address is 48-bit or 57-bit in the
	 * canonical address checks; exit if it is ever changed.
	 */
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	best = cpuid_entry2_find(entries, nent, 0x80000008, 0);
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	if (best) {
		int vaddr_bits = (best->eax & 0xff00) >> 8;

		if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0)
			return -EINVAL;
	}

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	/*
	 * Exposing dynamic xfeatures to the guest requires additional
	 * enabling in the FPU, e.g. to expand the guest XSAVE state size.
	 */
	best = cpuid_entry2_find(entries, nent, 0xd, 0);
	if (!best)
		return 0;

	xfeatures = best->eax | ((u64)best->edx << 32);
	xfeatures &= XFEATURE_MASK_USER_DYNAMIC;
	if (!xfeatures)
		return 0;

	return fpu_enable_guest_xfd_features(&vcpu->arch.guest_fpu, xfeatures);
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}

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/* Check whether the supplied CPUID data is equal to what is already set for the vCPU. */
static int kvm_cpuid_check_equal(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *e2,
				 int nent)
{
	struct kvm_cpuid_entry2 *orig;
	int i;

	if (nent != vcpu->arch.cpuid_nent)
		return -EINVAL;

	for (i = 0; i < nent; i++) {
		orig = &vcpu->arch.cpuid_entries[i];
		if (e2[i].function != orig->function ||
		    e2[i].index != orig->index ||
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		    e2[i].flags != orig->flags ||
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		    e2[i].eax != orig->eax || e2[i].ebx != orig->ebx ||
		    e2[i].ecx != orig->ecx || e2[i].edx != orig->edx)
			return -EINVAL;
	}

	return 0;
}

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static void kvm_update_kvm_cpuid_base(struct kvm_vcpu *vcpu)
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{
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	u32 function;
	struct kvm_cpuid_entry2 *entry;

	vcpu->arch.kvm_cpuid_base = 0;

	for_each_possible_hypervisor_cpuid_base(function) {
		entry = kvm_find_cpuid_entry(vcpu, function, 0);

		if (entry) {
			u32 signature[3];

			signature[0] = entry->ebx;
			signature[1] = entry->ecx;
			signature[2] = entry->edx;

			BUILD_BUG_ON(sizeof(signature) > sizeof(KVM_SIGNATURE));
			if (!memcmp(signature, KVM_SIGNATURE, sizeof(signature))) {
				vcpu->arch.kvm_cpuid_base = function;
				break;
			}
		}
	}
}

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static struct kvm_cpuid_entry2 *__kvm_find_kvm_cpuid_features(struct kvm_vcpu *vcpu,
					      struct kvm_cpuid_entry2 *entries, int nent)
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{
	u32 base = vcpu->arch.kvm_cpuid_base;

	if (!base)
		return NULL;

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	return cpuid_entry2_find(entries, nent, base | KVM_CPUID_FEATURES, 0);
}

static struct kvm_cpuid_entry2 *kvm_find_kvm_cpuid_features(struct kvm_vcpu *vcpu)
{
	return __kvm_find_kvm_cpuid_features(vcpu, vcpu->arch.cpuid_entries,
					     vcpu->arch.cpuid_nent);
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}
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void kvm_update_pv_runtime(struct kvm_vcpu *vcpu)
{
	struct kvm_cpuid_entry2 *best = kvm_find_kvm_cpuid_features(vcpu);
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	/*
	 * save the feature bitmap to avoid cpuid lookup for every PV
	 * operation
	 */
	if (best)
		vcpu->arch.pv_cpuid.features = best->eax;
}

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/*
 * Calculate guest's supported XCR0 taking into account guest CPUID data and
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 * KVM's supported XCR0 (comprised of host's XCR0 and KVM_SUPPORTED_XCR0).
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 */
static u64 cpuid_get_supported_xcr0(struct kvm_cpuid_entry2 *entries, int nent)
{
	struct kvm_cpuid_entry2 *best;

	best = cpuid_entry2_find(entries, nent, 0xd, 0);
	if (!best)
		return 0;

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	return (best->eax | ((u64)best->edx << 32)) & kvm_caps.supported_xcr0;
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}

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static void __kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *entries,
				       int nent)
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{
	struct kvm_cpuid_entry2 *best;
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	u64 guest_supported_xcr0 = cpuid_get_supported_xcr0(entries, nent);
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	best = cpuid_entry2_find(entries, nent, 1, 0);
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	if (best) {
		/* Update OSXSAVE bit */
		if (boot_cpu_has(X86_FEATURE_XSAVE))
			cpuid_entry_change(best, X86_FEATURE_OSXSAVE,
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				   kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE));
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		cpuid_entry_change(best, X86_FEATURE_APIC,
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			   vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE);
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	}
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	best = cpuid_entry2_find(entries, nent, 7, 0);
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	if (best && boot_cpu_has(X86_FEATURE_PKU) && best->function == 0x7)
		cpuid_entry_change(best, X86_FEATURE_OSPKE,
				   kvm_read_cr4_bits(vcpu, X86_CR4_PKE));
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	best = cpuid_entry2_find(entries, nent, 0xD, 0);
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	if (best)
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		best->ebx = xstate_required_size(vcpu->arch.xcr0, false);
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	best = cpuid_entry2_find(entries, nent, 0xD, 1);
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	if (best && (cpuid_entry_has(best, X86_FEATURE_XSAVES) ||
		     cpuid_entry_has(best, X86_FEATURE_XSAVEC)))
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		best->ebx = xstate_required_size(vcpu->arch.xcr0, true);

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	best = __kvm_find_kvm_cpuid_features(vcpu, entries, nent);
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	if (kvm_hlt_in_guest(vcpu->kvm) && best &&
		(best->eax & (1 << KVM_FEATURE_PV_UNHALT)))
		best->eax &= ~(1 << KVM_FEATURE_PV_UNHALT);

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	if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT)) {
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		best = cpuid_entry2_find(entries, nent, 0x1, 0);
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		if (best)
			cpuid_entry_change(best, X86_FEATURE_MWAIT,
					   vcpu->arch.ia32_misc_enable_msr &
					   MSR_IA32_MISC_ENABLE_MWAIT);
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	}
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	/*
	 * Bits 127:0 of the allowed SECS.ATTRIBUTES (CPUID.0x12.0x1) enumerate
	 * the supported XSAVE Feature Request Mask (XFRM), i.e. the enclave's
	 * requested XCR0 value.  The enclave's XFRM must be a subset of XCRO
	 * at the time of EENTER, thus adjust the allowed XFRM by the guest's
	 * supported XCR0.  Similar to XCR0 handling, FP and SSE are forced to
	 * '1' even on CPUs that don't support XSAVE.
	 */
	best = cpuid_entry2_find(entries, nent, 0x12, 0x1);
	if (best) {
		best->ecx &= guest_supported_xcr0 & 0xffffffff;
		best->edx &= guest_supported_xcr0 >> 32;
		best->ecx |= XFEATURE_MASK_FPSSE;
	}
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}
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void kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu)
{
	__kvm_update_cpuid_runtime(vcpu, vcpu->arch.cpuid_entries, vcpu->arch.cpuid_nent);
}
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EXPORT_SYMBOL_GPL(kvm_update_cpuid_runtime);
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static void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
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{
	struct kvm_lapic *apic = vcpu->arch.apic;
	struct kvm_cpuid_entry2 *best;
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	u64 guest_supported_xcr0;
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	best = kvm_find_cpuid_entry(vcpu, 1, 0);
	if (best && apic) {
		if (cpuid_entry_has(best, X86_FEATURE_TSC_DEADLINE_TIMER))
			apic->lapic_timer.timer_mode_mask = 3 << 17;
		else
			apic->lapic_timer.timer_mode_mask = 1 << 17;

		kvm_apic_set_version(vcpu);
	}

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	guest_supported_xcr0 =
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		cpuid_get_supported_xcr0(vcpu->arch.cpuid_entries, vcpu->arch.cpuid_nent);
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	vcpu->arch.guest_fpu.fpstate->user_xfeatures = guest_supported_xcr0;
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	kvm_update_pv_runtime(vcpu);

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	vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
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	vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
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	kvm_pmu_refresh(vcpu);
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	vcpu->arch.cr4_guest_rsvd_bits =
	    __cr4_reserved_bits(guest_cpuid_has, vcpu);
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	kvm_hv_set_cpuid(vcpu);

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	/* Invoke the vendor callback only after the above state is updated. */
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	static_call(kvm_x86_vcpu_after_set_cpuid)(vcpu);
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	/*
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	 * Except for the MMU, which needs to do its thing any vendor specific
	 * adjustments to the reserved GPA bits.
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	 */
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	kvm_mmu_after_set_cpuid(vcpu);
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}

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int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu)
{
	struct kvm_cpuid_entry2 *best;

	best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
	if (!best || best->eax < 0x80000008)
		goto not_found;
	best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
	if (best)
		return best->eax & 0xff;
not_found:
	return 36;
}

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/*
 * This "raw" version returns the reserved GPA bits without any adjustments for
 * encryption technologies that usurp bits.  The raw mask should be used if and
 * only if hardware does _not_ strip the usurped bits, e.g. in virtual MTRRs.
 */
u64 kvm_vcpu_reserved_gpa_bits_raw(struct kvm_vcpu *vcpu)
{
	return rsvd_bits(cpuid_maxphyaddr(vcpu), 63);
}

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static int kvm_set_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *e2,
                        int nent)
{
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	int r;
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	__kvm_update_cpuid_runtime(vcpu, e2, nent);

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	/*
	 * KVM does not correctly handle changing guest CPUID after KVM_RUN, as
	 * MAXPHYADDR, GBPAGES support, AMD reserved bit behavior, etc.. aren't
	 * tracked in kvm_mmu_page_role.  As a result, KVM may miss guest page
	 * faults due to reusing SPs/SPTEs. In practice no sane VMM mucks with
	 * the core vCPU model on the fly. It would've been better to forbid any
	 * KVM_SET_CPUID{,2} calls after KVM_RUN altogether but unfortunately
	 * some VMMs (e.g. QEMU) reuse vCPU fds for CPU hotplug/unplug and do
	 * KVM_SET_CPUID{,2} again. To support this legacy behavior, check
	 * whether the supplied CPUID data is equal to what's already set.
	 */
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	if (vcpu->arch.last_vmentry_cpu != -1) {
		r = kvm_cpuid_check_equal(vcpu, e2, nent);
		if (r)
			return r;

		kvfree(e2);
		return 0;
	}
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	r = kvm_check_cpuid(vcpu, e2, nent);
	if (r)
		return r;
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	kvfree(vcpu->arch.cpuid_entries);
	vcpu->arch.cpuid_entries = e2;
	vcpu->arch.cpuid_nent = nent;
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	kvm_update_kvm_cpuid_base(vcpu);
	kvm_vcpu_after_set_cpuid(vcpu);
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	return 0;
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}

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/* when an old userspace process fills a new kernel module */
int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
			     struct kvm_cpuid *cpuid,
			     struct kvm_cpuid_entry __user *entries)
{
	int r, i;
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	struct kvm_cpuid_entry *e = NULL;
	struct kvm_cpuid_entry2 *e2 = NULL;
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	if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
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		return -E2BIG;

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	if (cpuid->nent) {
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		e = vmemdup_user(entries, array_size(sizeof(*e), cpuid->nent));
		if (IS_ERR(e))
			return PTR_ERR(e);

		e2 = kvmalloc_array(cpuid->nent, sizeof(*e2), GFP_KERNEL_ACCOUNT);
		if (!e2) {
			r = -ENOMEM;
			goto out_free_cpuid;
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		}
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	}
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	for (i = 0; i < cpuid->nent; i++) {
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		e2[i].function = e[i].function;
		e2[i].eax = e[i].eax;
		e2[i].ebx = e[i].ebx;
		e2[i].ecx = e[i].ecx;
		e2[i].edx = e[i].edx;
		e2[i].index = 0;
		e2[i].flags = 0;
		e2[i].padding[0] = 0;
		e2[i].padding[1] = 0;
		e2[i].padding[2] = 0;
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	}
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	r = kvm_set_cpuid(vcpu, e2, cpuid->nent);
	if (r)
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		kvfree(e2);
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out_free_cpuid:
	kvfree(e);

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	return r;
}

int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
			      struct kvm_cpuid2 *cpuid,
			      struct kvm_cpuid_entry2 __user *entries)
{
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	struct kvm_cpuid_entry2 *e2 = NULL;
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	int r;

	if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
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		return -E2BIG;

	if (cpuid->nent) {
		e2 = vmemdup_user(entries, array_size(sizeof(*e2), cpuid->nent));
		if (IS_ERR(e2))
			return PTR_ERR(e2);
	}

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	r = kvm_set_cpuid(vcpu, e2, cpuid->nent);
	if (r)
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		kvfree(e2);

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	return r;
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}

int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
			      struct kvm_cpuid2 *cpuid,
			      struct kvm_cpuid_entry2 __user *entries)
{
	int r;

	r = -E2BIG;
	if (cpuid->nent < vcpu->arch.cpuid_nent)
		goto out;
	r = -EFAULT;
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	if (copy_to_user(entries, vcpu->arch.cpuid_entries,
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			 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
		goto out;
	return 0;

out:
	cpuid->nent = vcpu->arch.cpuid_nent;
	return r;
}

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/* Mask kvm_cpu_caps for @leaf with the raw CPUID capabilities of this CPU. */
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static __always_inline void __kvm_cpu_cap_mask(unsigned int leaf)
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{
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	const struct cpuid_reg cpuid = x86_feature_cpuid(leaf * 32);
	struct kvm_cpuid_entry2 entry;

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	reverse_cpuid_check(leaf);
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	cpuid_count(cpuid.function, cpuid.index,
		    &entry.eax, &entry.ebx, &entry.ecx, &entry.edx);

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	kvm_cpu_caps[leaf] &= *__cpuid_entry_get_reg(&entry, cpuid.reg);
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}

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static __always_inline
void kvm_cpu_cap_init_scattered(enum kvm_only_cpuid_leafs leaf, u32 mask)
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{
	/* Use kvm_cpu_cap_mask for non-scattered leafs. */
	BUILD_BUG_ON(leaf < NCAPINTS);

	kvm_cpu_caps[leaf] = mask;

	__kvm_cpu_cap_mask(leaf);
}

static __always_inline void kvm_cpu_cap_mask(enum cpuid_leafs leaf, u32 mask)
{
	/* Use kvm_cpu_cap_init_scattered for scattered leafs. */
	BUILD_BUG_ON(leaf >= NCAPINTS);

	kvm_cpu_caps[leaf] &= mask;

	__kvm_cpu_cap_mask(leaf);
}

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void kvm_set_cpu_caps(void)
{
#ifdef CONFIG_X86_64
	unsigned int f_gbpages = F(GBPAGES);
	unsigned int f_lm = F(LM);
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	unsigned int f_xfd = F(XFD);
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#else
	unsigned int f_gbpages = 0;
	unsigned int f_lm = 0;
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	unsigned int f_xfd = 0;
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#endif
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	memset(kvm_cpu_caps, 0, sizeof(kvm_cpu_caps));
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	BUILD_BUG_ON(sizeof(kvm_cpu_caps) - (NKVMCAPINTS * sizeof(*kvm_cpu_caps)) >
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		     sizeof(boot_cpu_data.x86_capability));

	memcpy(&kvm_cpu_caps, &boot_cpu_data.x86_capability,
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	       sizeof(kvm_cpu_caps) - (NKVMCAPINTS * sizeof(*kvm_cpu_caps)));
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	kvm_cpu_cap_mask(CPUID_1_ECX,
		/*
		 * NOTE: MONITOR (and MWAIT) are emulated as NOP, but *not*
		 * advertised to guests via CPUID!
		 */
		F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
		0 /* DS-CPL, VMX, SMX, EST */ |
		0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
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		F(FMA) | F(CX16) | 0 /* xTPR Update */ | F(PDCM) |
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		F(PCID) | 0 /* Reserved, DCA */ | F(XMM4_1) |
		F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
		0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
		F(F16C) | F(RDRAND)
	);
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	/* KVM emulates x2apic in software irrespective of host support. */
	kvm_cpu_cap_set(X86_FEATURE_X2APIC);
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	kvm_cpu_cap_mask(CPUID_1_EDX,
		F(FPU) | F(VME) | F(DE) | F(PSE) |
		F(TSC) | F(MSR) | F(PAE) | F(MCE) |
		F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
		F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
		F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) |
		0 /* Reserved, DS, ACPI */ | F(MMX) |
		F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
		0 /* HTT, TM, Reserved, PBE */
	);

	kvm_cpu_cap_mask(CPUID_7_0_EBX,
561 562 563 564 565 566 567
		F(FSGSBASE) | F(SGX) | F(BMI1) | F(HLE) | F(AVX2) |
		F(FDP_EXCPTN_ONLY) | F(SMEP) | F(BMI2) | F(ERMS) | F(INVPCID) |
		F(RTM) | F(ZERO_FCS_FDS) | 0 /*MPX*/ | F(AVX512F) |
		F(AVX512DQ) | F(RDSEED) | F(ADX) | F(SMAP) | F(AVX512IFMA) |
		F(CLFLUSHOPT) | F(CLWB) | 0 /*INTEL_PT*/ | F(AVX512PF) |
		F(AVX512ER) | F(AVX512CD) | F(SHA_NI) | F(AVX512BW) |
		F(AVX512VL));
568 569

	kvm_cpu_cap_mask(CPUID_7_ECX,
570
		F(AVX512VBMI) | F(LA57) | F(PKU) | 0 /*OSPKE*/ | F(RDPID) |
571 572
		F(AVX512_VPOPCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) |
		F(VAES) | F(VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) |
573
		F(CLDEMOTE) | F(MOVDIRI) | F(MOVDIR64B) | 0 /*WAITPKG*/ |
574
		F(SGX_LC) | F(BUS_LOCK_DETECT)
575 576 577 578 579
	);
	/* Set LA57 based on hardware capability. */
	if (cpuid_ecx(7) & F(LA57))
		kvm_cpu_cap_set(X86_FEATURE_LA57);

580 581 582 583 584 585 586
	/*
	 * PKU not yet implemented for shadow paging and requires OSPKE
	 * to be set on the host. Clear it if that is not the case
	 */
	if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE))
		kvm_cpu_cap_clear(X86_FEATURE_PKU);

587 588 589
	kvm_cpu_cap_mask(CPUID_7_EDX,
		F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
		F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
590
		F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) |
591 592
		F(SERIALIZE) | F(TSXLDTRK) | F(AVX512_FP16) |
		F(AMX_TILE) | F(AMX_INT8) | F(AMX_BF16)
593 594
	);

595 596 597 598 599 600 601 602 603 604 605
	/* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */
	kvm_cpu_cap_set(X86_FEATURE_TSC_ADJUST);
	kvm_cpu_cap_set(X86_FEATURE_ARCH_CAPABILITIES);

	if (boot_cpu_has(X86_FEATURE_IBPB) && boot_cpu_has(X86_FEATURE_IBRS))
		kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL);
	if (boot_cpu_has(X86_FEATURE_STIBP))
		kvm_cpu_cap_set(X86_FEATURE_INTEL_STIBP);
	if (boot_cpu_has(X86_FEATURE_AMD_SSBD))
		kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD);

606
	kvm_cpu_cap_mask(CPUID_7_1_EAX,
607
		F(AVX_VNNI) | F(AVX512_BF16)
608 609 610
	);

	kvm_cpu_cap_mask(CPUID_D_1_EAX,
611
		F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | F(XSAVES) | f_xfd
612 613
	);

614 615 616 617
	kvm_cpu_cap_init_scattered(CPUID_12_EAX,
		SF(SGX1) | SF(SGX2)
	);

618 619 620 621 622
	kvm_cpu_cap_mask(CPUID_8000_0001_ECX,
		F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
		F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
		F(3DNOWPREFETCH) | F(OSVW) | 0 /* IBS */ | F(XOP) |
		0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM) |
623
		F(TOPOEXT) | 0 /* PERFCTR_CORE */
624 625 626 627 628 629 630 631
	);

	kvm_cpu_cap_mask(CPUID_8000_0001_EDX,
		F(FPU) | F(VME) | F(DE) | F(PSE) |
		F(TSC) | F(MSR) | F(PAE) | F(MCE) |
		F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
		F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
		F(PAT) | F(PSE36) | 0 /* Reserved */ |
632
		F(NX) | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
633 634 635 636 637 638 639 640 641 642
		F(FXSR) | F(FXSR_OPT) | f_gbpages | F(RDTSCP) |
		0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW)
	);

	if (!tdp_enabled && IS_ENABLED(CONFIG_X86_64))
		kvm_cpu_cap_set(X86_FEATURE_GBPAGES);

	kvm_cpu_cap_mask(CPUID_8000_0008_EBX,
		F(CLZERO) | F(XSAVEERPTR) |
		F(WBNOINVD) | F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) |
643 644
		F(AMD_SSB_NO) | F(AMD_STIBP) | F(AMD_STIBP_ALWAYS_ON) |
		__feature_bit(KVM_X86_FEATURE_PSFD)
645 646
	);

647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669
	/*
	 * AMD has separate bits for each SPEC_CTRL bit.
	 * arch/x86/kernel/cpu/bugs.c is kind enough to
	 * record that in cpufeatures so use them.
	 */
	if (boot_cpu_has(X86_FEATURE_IBPB))
		kvm_cpu_cap_set(X86_FEATURE_AMD_IBPB);
	if (boot_cpu_has(X86_FEATURE_IBRS))
		kvm_cpu_cap_set(X86_FEATURE_AMD_IBRS);
	if (boot_cpu_has(X86_FEATURE_STIBP))
		kvm_cpu_cap_set(X86_FEATURE_AMD_STIBP);
	if (boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD))
		kvm_cpu_cap_set(X86_FEATURE_AMD_SSBD);
	if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
		kvm_cpu_cap_set(X86_FEATURE_AMD_SSB_NO);
	/*
	 * The preference is to use SPEC CTRL MSR instead of the
	 * VIRT_SPEC MSR.
	 */
	if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) &&
	    !boot_cpu_has(X86_FEATURE_AMD_SSBD))
		kvm_cpu_cap_set(X86_FEATURE_VIRT_SSBD);

670 671 672 673 674 675
	/*
	 * Hide all SVM features by default, SVM will set the cap bits for
	 * features it emulates and/or exposes for L1.
	 */
	kvm_cpu_cap_mask(CPUID_8000_000A_EDX, 0);

676 677 678 679
	kvm_cpu_cap_mask(CPUID_8000_001F_EAX,
		0 /* SME */ | F(SEV) | 0 /* VM_PAGE_FLUSH */ | F(SEV_ES) |
		F(SME_COHERENT));

680 681 682 683 684
	kvm_cpu_cap_mask(CPUID_C000_0001_EDX,
		F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
		F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
		F(PMM) | F(PMM_EN)
	);
685 686 687 688 689 690 691 692 693 694 695 696 697 698 699

	/*
	 * Hide RDTSCP and RDPID if either feature is reported as supported but
	 * probing MSR_TSC_AUX failed.  This is purely a sanity check and
	 * should never happen, but the guest will likely crash if RDTSCP or
	 * RDPID is misreported, and KVM has botched MSR_TSC_AUX emulation in
	 * the past.  For example, the sanity check may fire if this instance of
	 * KVM is running as L1 on top of an older, broken KVM.
	 */
	if (WARN_ON((kvm_cpu_cap_has(X86_FEATURE_RDTSCP) ||
		     kvm_cpu_cap_has(X86_FEATURE_RDPID)) &&
		     !kvm_is_supported_user_return_msr(MSR_TSC_AUX))) {
		kvm_cpu_cap_clear(X86_FEATURE_RDTSCP);
		kvm_cpu_cap_clear(X86_FEATURE_RDPID);
	}
700 701 702
}
EXPORT_SYMBOL_GPL(kvm_set_cpu_caps);

703 704
struct kvm_cpuid_array {
	struct kvm_cpuid_entry2 *entries;
705
	int maxnent;
706 707 708 709
	int nent;
};

static struct kvm_cpuid_entry2 *do_host_cpuid(struct kvm_cpuid_array *array,
710
					      u32 function, u32 index)
A
Avi Kivity 已提交
711
{
712 713 714
	struct kvm_cpuid_entry2 *entry;

	if (array->nent >= array->maxnent)
715
		return NULL;
716 717

	entry = &array->entries[array->nent++];
718

719
	memset(entry, 0, sizeof(*entry));
A
Avi Kivity 已提交
720 721
	entry->function = function;
	entry->index = index;
722 723 724 725 726
	switch (function & 0xC0000000) {
	case 0x40000000:
		/* Hypervisor leaves are always synthesized by __do_cpuid_func.  */
		return entry;

727 728 729 730 731 732 733 734 735 736 737 738
	case 0x80000000:
		/*
		 * 0x80000021 is sometimes synthesized by __do_cpuid_func, which
		 * would result in out-of-bounds calls to do_host_cpuid.
		 */
		{
			static int max_cpuid_80000000;
			if (!READ_ONCE(max_cpuid_80000000))
				WRITE_ONCE(max_cpuid_80000000, cpuid_eax(0x80000000));
			if (function > READ_ONCE(max_cpuid_80000000))
				return entry;
		}
739
		break;
740

741 742 743
	default:
		break;
	}
744

A
Avi Kivity 已提交
745 746
	cpuid_count(entry->function, entry->index,
		    &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
747

748
	if (cpuid_function_is_indexed(function))
749
		entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
750 751

	return entry;
A
Avi Kivity 已提交
752 753
}

754
static int __do_cpuid_func_emulated(struct kvm_cpuid_array *array, u32 func)
B
Borislav Petkov 已提交
755
{
756 757 758 759
	struct kvm_cpuid_entry2 *entry;

	if (array->nent >= array->maxnent)
		return -E2BIG;
760

761
	entry = &array->entries[array->nent];
762 763 764 765
	entry->function = func;
	entry->index = 0;
	entry->flags = 0;

B
Borislav Petkov 已提交
766 767
	switch (func) {
	case 0:
P
Paolo Bonzini 已提交
768
		entry->eax = 7;
769
		++array->nent;
B
Borislav Petkov 已提交
770 771 772
		break;
	case 1:
		entry->ecx = F(MOVBE);
773
		++array->nent;
B
Borislav Petkov 已提交
774
		break;
P
Paolo Bonzini 已提交
775 776
	case 7:
		entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
777
		entry->eax = 0;
778 779
		if (kvm_cpu_cap_has(X86_FEATURE_RDTSCP))
			entry->ecx = F(RDPID);
780
		++array->nent;
781
		break;
B
Borislav Petkov 已提交
782 783 784 785
	default:
		break;
	}

B
Borislav Petkov 已提交
786 787 788
	return 0;
}

789
static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
A
Avi Kivity 已提交
790
{
791
	struct kvm_cpuid_entry2 *entry;
792
	int r, i, max_idx;
A
Avi Kivity 已提交
793 794 795

	/* all calls to cpuid_count() should be made on the same cpu */
	get_cpu();
796 797 798

	r = -E2BIG;

799
	entry = do_host_cpuid(array, function, 0);
800
	if (!entry)
801 802
		goto out;

A
Avi Kivity 已提交
803 804
	switch (function) {
	case 0:
805 806
		/* Limited to the highest leaf implemented in KVM. */
		entry->eax = min(entry->eax, 0x1fU);
A
Avi Kivity 已提交
807 808
		break;
	case 1:
809 810
		cpuid_entry_override(entry, CPUID_1_EDX);
		cpuid_entry_override(entry, CPUID_1_ECX);
A
Avi Kivity 已提交
811
		break;
812
	case 2:
813 814 815 816 817 818
		/*
		 * On ancient CPUs, function 2 entries are STATEFUL.  That is,
		 * CPUID(function=2, index=0) may return different results each
		 * time, with the least-significant byte in EAX enumerating the
		 * number of times software should do CPUID(2, 0).
		 *
819 820 821
		 * Modern CPUs, i.e. every CPU KVM has *ever* run on are less
		 * idiotic.  Intel's SDM states that EAX & 0xff "will always
		 * return 01H. Software should ignore this value and not
822 823
		 * interpret it as an informational descriptor", while AMD's
		 * APM states that CPUID(2) is reserved.
824 825 826
		 *
		 * WARN if a frankenstein CPU that supports virtualization and
		 * a stateful CPUID.0x2 is encountered.
827
		 */
828
		WARN_ON_ONCE((entry->eax & 0xff) > 1);
A
Avi Kivity 已提交
829
		break;
830 831
	/* functions 4 and 0x8000001d have additional index. */
	case 4:
832 833 834 835 836
	case 0x8000001d:
		/*
		 * Read entries until the cache type in the previous entry is
		 * zero, i.e. indicates an invalid entry.
		 */
837 838 839
		for (i = 1; entry->eax & 0x1f; ++i) {
			entry = do_host_cpuid(array, function, i);
			if (!entry)
840
				goto out;
A
Avi Kivity 已提交
841 842
		}
		break;
J
Jan Kiszka 已提交
843 844 845 846 847 848
	case 6: /* Thermal management */
		entry->eax = 0x4; /* allow ARAT */
		entry->ebx = 0;
		entry->ecx = 0;
		entry->edx = 0;
		break;
849
	/* function 7 has additional index. */
850
	case 7:
851
		entry->eax = min(entry->eax, 1u);
852 853 854
		cpuid_entry_override(entry, CPUID_7_0_EBX);
		cpuid_entry_override(entry, CPUID_7_ECX);
		cpuid_entry_override(entry, CPUID_7_EDX);
855

856 857 858
		/* KVM only supports 0x7.0 and 0x7.1, capped above via min(). */
		if (entry->eax == 1) {
			entry = do_host_cpuid(array, function, 1);
859
			if (!entry)
860 861
				goto out;

862
			cpuid_entry_override(entry, CPUID_7_1_EAX);
863 864 865
			entry->ebx = 0;
			entry->ecx = 0;
			entry->edx = 0;
866
		}
A
Avi Kivity 已提交
867 868 869
		break;
	case 9:
		break;
870 871 872 873
	case 0xa: { /* Architectural Performance Monitoring */
		union cpuid10_eax eax;
		union cpuid10_edx edx;

874 875 876 877 878
		if (!static_cpu_has(X86_FEATURE_ARCH_PERFMON)) {
			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
			break;
		}

879 880 881 882 883 884
		eax.split.version_id = kvm_pmu_cap.version;
		eax.split.num_counters = kvm_pmu_cap.num_counters_gp;
		eax.split.bit_width = kvm_pmu_cap.bit_width_gp;
		eax.split.mask_length = kvm_pmu_cap.events_mask_len;
		edx.split.num_counters_fixed = kvm_pmu_cap.num_counters_fixed;
		edx.split.bit_width_fixed = kvm_pmu_cap.bit_width_fixed;
885

886
		if (kvm_pmu_cap.version)
887
			edx.split.anythread_deprecated = 1;
888 889
		edx.split.reserved1 = 0;
		edx.split.reserved2 = 0;
890 891

		entry->eax = eax.full;
892
		entry->ebx = kvm_pmu_cap.events_mask;
893 894 895 896
		entry->ecx = 0;
		entry->edx = edx.full;
		break;
	}
897 898 899 900 901
	/*
	 * Per Intel's SDM, the 0x1f is a superset of 0xb,
	 * thus they can be handled by common code.
	 */
	case 0x1f:
902
	case 0xb:
903
		/*
904 905 906
		 * Populate entries until the level type (ECX[15:8]) of the
		 * previous entry is zero.  Note, CPUID EAX.{0x1f,0xb}.0 is
		 * the starting entry, filled by the primary do_host_cpuid().
907
		 */
908 909 910
		for (i = 1; entry->ecx & 0xff00; ++i) {
			entry = do_host_cpuid(array, function, i);
			if (!entry)
911
				goto out;
A
Avi Kivity 已提交
912 913
		}
		break;
914
	case 0xd: {
915 916
		u64 permitted_xcr0 = kvm_caps.supported_xcr0 & xstate_get_guest_group_perm();
		u64 permitted_xss = kvm_caps.supported_xss;
917

918 919
		entry->eax &= permitted_xcr0;
		entry->ebx = xstate_required_size(permitted_xcr0, false);
920
		entry->ecx = entry->ebx;
921 922
		entry->edx &= permitted_xcr0 >> 32;
		if (!permitted_xcr0)
P
Paolo Bonzini 已提交
923 924
			break;

925 926
		entry = do_host_cpuid(array, function, 1);
		if (!entry)
927 928
			goto out;

929
		cpuid_entry_override(entry, CPUID_D_1_EAX);
930
		if (entry->eax & (F(XSAVES)|F(XSAVEC)))
931
			entry->ebx = xstate_required_size(permitted_xcr0 | permitted_xss,
932 933
							  true);
		else {
934
			WARN_ON_ONCE(permitted_xss != 0);
935
			entry->ebx = 0;
936
		}
937 938
		entry->ecx &= permitted_xss;
		entry->edx &= permitted_xss >> 32;
939

940
		for (i = 2; i < 64; ++i) {
941
			bool s_state;
942
			if (permitted_xcr0 & BIT_ULL(i))
943
				s_state = false;
944
			else if (permitted_xss & BIT_ULL(i))
945 946
				s_state = true;
			else
947
				continue;
948

949
			entry = do_host_cpuid(array, function, i);
950
			if (!entry)
951 952
				goto out;

953
			/*
954
			 * The supported check above should have filtered out
955
			 * invalid sub-leafs.  Only valid sub-leafs should
956
			 * reach this point, and they should have a non-zero
957
			 * save state size.  Furthermore, check whether the
958
			 * processor agrees with permitted_xcr0/permitted_xss
959
			 * on whether this is an XCR0- or IA32_XSS-managed area.
960
			 */
961
			if (WARN_ON_ONCE(!entry->eax || (entry->ecx & 0x1) != s_state)) {
962
				--array->nent;
963
				continue;
964
			}
965 966 967

			if (!kvm_cpu_cap_has(X86_FEATURE_XFD))
				entry->ecx &= ~BIT_ULL(2);
968
			entry->edx = 0;
A
Avi Kivity 已提交
969 970
		}
		break;
971
	}
972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999
	case 0x12:
		/* Intel SGX */
		if (!kvm_cpu_cap_has(X86_FEATURE_SGX)) {
			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
			break;
		}

		/*
		 * Index 0: Sub-features, MISCSELECT (a.k.a extended features)
		 * and max enclave sizes.   The SGX sub-features and MISCSELECT
		 * are restricted by kernel and KVM capabilities (like most
		 * feature flags), while enclave size is unrestricted.
		 */
		cpuid_entry_override(entry, CPUID_12_EAX);
		entry->ebx &= SGX_MISC_EXINFO;

		entry = do_host_cpuid(array, function, 1);
		if (!entry)
			goto out;

		/*
		 * Index 1: SECS.ATTRIBUTES.  ATTRIBUTES are restricted a la
		 * feature flags.  Advertise all supported flags, including
		 * privileged attributes that require explicit opt-in from
		 * userspace.  ATTRIBUTES.XFRM is not adjusted as userspace is
		 * expected to derive it from supported XCR0.
		 */
		entry->eax &= SGX_ATTR_DEBUG | SGX_ATTR_MODE64BIT |
1000
			      SGX_ATTR_PROVISIONKEY | SGX_ATTR_EINITTOKENKEY |
1001 1002 1003
			      SGX_ATTR_KSS;
		entry->ebx &= 0;
		break;
1004
	/* Intel PT */
1005
	case 0x14:
1006
		if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT)) {
1007
			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1008
			break;
1009
		}
1010

1011
		for (i = 1, max_idx = entry->eax; i <= max_idx; ++i) {
1012
			if (!do_host_cpuid(array, function, i))
1013 1014 1015
				goto out;
		}
		break;
1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033
	/* Intel AMX TILE */
	case 0x1d:
		if (!kvm_cpu_cap_has(X86_FEATURE_AMX_TILE)) {
			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
			break;
		}

		for (i = 1, max_idx = entry->eax; i <= max_idx; ++i) {
			if (!do_host_cpuid(array, function, i))
				goto out;
		}
		break;
	case 0x1e: /* TMUL information */
		if (!kvm_cpu_cap_has(X86_FEATURE_AMX_TILE)) {
			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
			break;
		}
		break;
A
Avi Kivity 已提交
1034
	case KVM_CPUID_SIGNATURE: {
1035
		const u32 *sigptr = (const u32 *)KVM_SIGNATURE;
1036
		entry->eax = KVM_CPUID_FEATURES;
A
Avi Kivity 已提交
1037 1038 1039 1040 1041 1042 1043 1044 1045 1046
		entry->ebx = sigptr[0];
		entry->ecx = sigptr[1];
		entry->edx = sigptr[2];
		break;
	}
	case KVM_CPUID_FEATURES:
		entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
			     (1 << KVM_FEATURE_NOP_IO_DELAY) |
			     (1 << KVM_FEATURE_CLOCKSOURCE2) |
			     (1 << KVM_FEATURE_ASYNC_PF) |
1047
			     (1 << KVM_FEATURE_PV_EOI) |
1048
			     (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) |
1049
			     (1 << KVM_FEATURE_PV_UNHALT) |
1050
			     (1 << KVM_FEATURE_PV_TLB_FLUSH) |
1051
			     (1 << KVM_FEATURE_ASYNC_PF_VMEXIT) |
1052
			     (1 << KVM_FEATURE_PV_SEND_IPI) |
1053
			     (1 << KVM_FEATURE_POLL_CONTROL) |
1054 1055
			     (1 << KVM_FEATURE_PV_SCHED_YIELD) |
			     (1 << KVM_FEATURE_ASYNC_PF_INT);
A
Avi Kivity 已提交
1056 1057 1058 1059 1060 1061 1062 1063 1064

		if (sched_info_on())
			entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);

		entry->ebx = 0;
		entry->ecx = 0;
		entry->edx = 0;
		break;
	case 0x80000000:
1065
		entry->eax = min(entry->eax, 0x80000021);
1066
		/*
1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077
		 * Serializing LFENCE is reported in a multitude of ways, and
		 * NullSegClearsBase is not reported in CPUID on Zen2; help
		 * userspace by providing the CPUID leaf ourselves.
		 *
		 * However, only do it if the host has CPUID leaf 0x8000001d.
		 * QEMU thinks that it can query the host blindly for that
		 * CPUID leaf if KVM reports that it supports 0x8000001d or
		 * above.  The processor merrily returns values from the
		 * highest Intel leaf which QEMU tries to use as the guest's
		 * 0x8000001d.  Even worse, this can result in an infinite
		 * loop if said highest leaf has no subleaves indexed by ECX.
1078
		 */
1079 1080 1081
		if (entry->eax >= 0x8000001d &&
		    (static_cpu_has(X86_FEATURE_LFENCE_RDTSC)
		     || !static_cpu_has_bug(X86_BUG_NULL_SEG)))
1082
			entry->eax = max(entry->eax, 0x80000021);
A
Avi Kivity 已提交
1083 1084
		break;
	case 0x80000001:
1085 1086
		cpuid_entry_override(entry, CPUID_8000_0001_EDX);
		cpuid_entry_override(entry, CPUID_8000_0001_ECX);
A
Avi Kivity 已提交
1087
		break;
1088 1089 1090
	case 0x80000006:
		/* L2 cache and TLB: pass through host info. */
		break;
1091 1092 1093 1094 1095 1096 1097
	case 0x80000007: /* Advanced power management */
		/* invariant TSC is CPUID.80000007H:EDX[8] */
		entry->edx &= (1 << 8);
		/* mask against host */
		entry->edx &= boot_cpu_data.x86_power;
		entry->eax = entry->ebx = entry->ecx = 0;
		break;
A
Avi Kivity 已提交
1098 1099 1100 1101 1102
	case 0x80000008: {
		unsigned g_phys_as = (entry->eax >> 16) & 0xff;
		unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
		unsigned phys_as = entry->eax & 0xff;

1103
		/*
1104 1105 1106 1107 1108 1109 1110 1111
		 * If TDP (NPT) is disabled use the adjusted host MAXPHYADDR as
		 * the guest operates in the same PA space as the host, i.e.
		 * reductions in MAXPHYADDR for memory encryption affect shadow
		 * paging, too.
		 *
		 * If TDP is enabled but an explicit guest MAXPHYADDR is not
		 * provided, use the raw bare metal MAXPHYADDR as reductions to
		 * the HPAs do not affect GPAs.
1112
		 */
1113 1114 1115
		if (!tdp_enabled)
			g_phys_as = boot_cpu_data.x86_phys_bits;
		else if (!g_phys_as)
A
Avi Kivity 已提交
1116
			g_phys_as = phys_as;
1117

A
Avi Kivity 已提交
1118
		entry->eax = g_phys_as | (virt_as << 8);
A
Ashok Raj 已提交
1119
		entry->edx = 0;
1120
		cpuid_entry_override(entry, CPUID_8000_0008_EBX);
A
Avi Kivity 已提交
1121 1122
		break;
	}
1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133
	case 0x8000000A:
		if (!kvm_cpu_cap_has(X86_FEATURE_SVM)) {
			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
			break;
		}
		entry->eax = 1; /* SVM revision 1 */
		entry->ebx = 8; /* Lets support 8 ASIDs in case we add proper
				   ASID emulation to nested SVM */
		entry->ecx = 0; /* Reserved */
		cpuid_entry_override(entry, CPUID_8000_000A_EDX);
		break;
A
Avi Kivity 已提交
1134 1135 1136 1137
	case 0x80000019:
		entry->ecx = entry->edx = 0;
		break;
	case 0x8000001a:
1138
	case 0x8000001e:
A
Avi Kivity 已提交
1139
		break;
1140
	case 0x8000001F:
1141
		if (!kvm_cpu_cap_has(X86_FEATURE_SEV)) {
1142
			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1143
		} else {
1144
			cpuid_entry_override(entry, CPUID_8000_001F_EAX);
1145 1146 1147 1148 1149 1150 1151

			/*
			 * Enumerate '0' for "PA bits reduction", the adjusted
			 * MAXPHYADDR is enumerated directly (see 0x80000008).
			 */
			entry->ebx &= ~GENMASK(11, 6);
		}
1152
		break;
1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168
	case 0x80000020:
		entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
		break;
	case 0x80000021:
		entry->ebx = entry->ecx = entry->edx = 0;
		/*
		 * Pass down these bits:
		 *    EAX      0      NNDBP, Processor ignores nested data breakpoints
		 *    EAX      2      LAS, LFENCE always serializing
		 *    EAX      6      NSCB, Null selector clear base
		 *
		 * Other defined bits are for MSRs that KVM does not expose:
		 *   EAX      3      SPCL, SMM page configuration lock
		 *   EAX      13     PCMSR, Prefetch control MSR
		 */
		entry->eax &= BIT(0) | BIT(2) | BIT(6);
1169 1170 1171 1172
		if (static_cpu_has(X86_FEATURE_LFENCE_RDTSC))
			entry->eax |= BIT(2);
		if (!static_cpu_has_bug(X86_BUG_NULL_SEG))
			entry->eax |= BIT(6);
1173
		break;
A
Avi Kivity 已提交
1174 1175 1176 1177 1178 1179
	/*Add support for Centaur's CPUID instruction*/
	case 0xC0000000:
		/*Just support up to 0xC0000004 now*/
		entry->eax = min(entry->eax, 0xC0000004);
		break;
	case 0xC0000001:
1180
		cpuid_entry_override(entry, CPUID_C000_0001_EDX);
A
Avi Kivity 已提交
1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191
		break;
	case 3: /* Processor serial number */
	case 5: /* MONITOR/MWAIT */
	case 0xC0000002:
	case 0xC0000003:
	case 0xC0000004:
	default:
		entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
		break;
	}

1192 1193 1194
	r = 0;

out:
A
Avi Kivity 已提交
1195
	put_cpu();
1196 1197

	return r;
A
Avi Kivity 已提交
1198 1199
}

1200 1201
static int do_cpuid_func(struct kvm_cpuid_array *array, u32 func,
			 unsigned int type)
B
Borislav Petkov 已提交
1202 1203
{
	if (type == KVM_GET_EMULATED_CPUID)
1204
		return __do_cpuid_func_emulated(array, func);
B
Borislav Petkov 已提交
1205

1206
	return __do_cpuid_func(array, func);
B
Borislav Petkov 已提交
1207 1208
}

1209
#define CENTAUR_CPUID_SIGNATURE 0xC0000000
1210

1211 1212
static int get_cpuid_func(struct kvm_cpuid_array *array, u32 func,
			  unsigned int type)
1213 1214 1215 1216
{
	u32 limit;
	int r;

1217 1218 1219 1220
	if (func == CENTAUR_CPUID_SIGNATURE &&
	    boot_cpu_data.x86_vendor != X86_VENDOR_CENTAUR)
		return 0;

1221
	r = do_cpuid_func(array, func, type);
1222 1223 1224
	if (r)
		return r;

1225
	limit = array->entries[array->nent - 1].eax;
1226
	for (func = func + 1; func <= limit; ++func) {
1227
		r = do_cpuid_func(array, func, type);
1228 1229 1230 1231 1232 1233 1234
		if (r)
			break;
	}

	return r;
}

B
Borislav Petkov 已提交
1235 1236 1237 1238
static bool sanity_check_entries(struct kvm_cpuid_entry2 __user *entries,
				 __u32 num_entries, unsigned int ioctl_type)
{
	int i;
B
Borislav Petkov 已提交
1239
	__u32 pad[3];
B
Borislav Petkov 已提交
1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252

	if (ioctl_type != KVM_GET_EMULATED_CPUID)
		return false;

	/*
	 * We want to make sure that ->padding is being passed clean from
	 * userspace in case we want to use it for something in the future.
	 *
	 * Sadly, this wasn't enforced for KVM_GET_SUPPORTED_CPUID and so we
	 * have to give ourselves satisfied only with the emulated side. /me
	 * sheds a tear.
	 */
	for (i = 0; i < num_entries; i++) {
B
Borislav Petkov 已提交
1253 1254 1255 1256
		if (copy_from_user(pad, entries[i].padding, sizeof(pad)))
			return true;

		if (pad[0] || pad[1] || pad[2])
B
Borislav Petkov 已提交
1257 1258 1259 1260 1261 1262 1263 1264
			return true;
	}
	return false;
}

int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid,
			    struct kvm_cpuid_entry2 __user *entries,
			    unsigned int type)
A
Avi Kivity 已提交
1265
{
1266 1267
	static const u32 funcs[] = {
		0, 0x80000000, CENTAUR_CPUID_SIGNATURE, KVM_CPUID_SIGNATURE,
1268
	};
A
Avi Kivity 已提交
1269

1270 1271 1272 1273
	struct kvm_cpuid_array array = {
		.nent = 0,
	};
	int r, i;
1274

A
Avi Kivity 已提交
1275
	if (cpuid->nent < 1)
1276
		return -E2BIG;
A
Avi Kivity 已提交
1277 1278
	if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
		cpuid->nent = KVM_MAX_CPUID_ENTRIES;
B
Borislav Petkov 已提交
1279 1280 1281 1282

	if (sanity_check_entries(entries, cpuid->nent, type))
		return -EINVAL;

1283
	array.entries = kvcalloc(sizeof(struct kvm_cpuid_entry2), cpuid->nent, GFP_KERNEL);
1284
	if (!array.entries)
1285
		return -ENOMEM;
A
Avi Kivity 已提交
1286

1287 1288
	array.maxnent = cpuid->nent;

1289
	for (i = 0; i < ARRAY_SIZE(funcs); i++) {
1290
		r = get_cpuid_func(&array, funcs[i], type);
1291
		if (r)
A
Avi Kivity 已提交
1292 1293
			goto out_free;
	}
1294
	cpuid->nent = array.nent;
A
Avi Kivity 已提交
1295

1296 1297
	if (copy_to_user(entries, array.entries,
			 array.nent * sizeof(struct kvm_cpuid_entry2)))
1298
		r = -EFAULT;
A
Avi Kivity 已提交
1299 1300

out_free:
1301
	kvfree(array.entries);
A
Avi Kivity 已提交
1302 1303 1304 1305 1306 1307
	return r;
}

struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
					      u32 function, u32 index)
{
1308 1309
	return cpuid_entry2_find(vcpu->arch.cpuid_entries, vcpu->arch.cpuid_nent,
				 function, index);
A
Avi Kivity 已提交
1310 1311 1312 1313
}
EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);

/*
1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333
 * Intel CPUID semantics treats any query for an out-of-range leaf as if the
 * highest basic leaf (i.e. CPUID.0H:EAX) were requested.  AMD CPUID semantics
 * returns all zeroes for any undefined leaf, whether or not the leaf is in
 * range.  Centaur/VIA follows Intel semantics.
 *
 * A leaf is considered out-of-range if its function is higher than the maximum
 * supported leaf of its associated class or if its associated class does not
 * exist.
 *
 * There are three primary classes to be considered, with their respective
 * ranges described as "<base> - <top>[,<base2> - <top2>] inclusive.  A primary
 * class exists if a guest CPUID entry for its <base> leaf exists.  For a given
 * class, CPUID.<base>.EAX contains the max supported leaf for the class.
 *
 *  - Basic:      0x00000000 - 0x3fffffff, 0x50000000 - 0x7fffffff
 *  - Hypervisor: 0x40000000 - 0x4fffffff
 *  - Extended:   0x80000000 - 0xbfffffff
 *  - Centaur:    0xc0000000 - 0xcfffffff
 *
 * The Hypervisor class is further subdivided into sub-classes that each act as
I
Ingo Molnar 已提交
1334
 * their own independent class associated with a 0x100 byte range.  E.g. if Qemu
1335 1336 1337 1338 1339
 * is advertising support for both HyperV and KVM, the resulting Hypervisor
 * CPUID sub-classes are:
 *
 *  - HyperV:     0x40000000 - 0x400000ff
 *  - KVM:        0x40000100 - 0x400001ff
A
Avi Kivity 已提交
1340
 */
1341 1342
static struct kvm_cpuid_entry2 *
get_out_of_range_cpuid_entry(struct kvm_vcpu *vcpu, u32 *fn_ptr, u32 index)
A
Avi Kivity 已提交
1343
{
1344
	struct kvm_cpuid_entry2 *basic, *class;
1345
	u32 function = *fn_ptr;
1346 1347 1348

	basic = kvm_find_cpuid_entry(vcpu, 0, 0);
	if (!basic)
1349 1350 1351 1352 1353
		return NULL;

	if (is_guest_vendor_amd(basic->ebx, basic->ecx, basic->edx) ||
	    is_guest_vendor_hygon(basic->ebx, basic->ecx, basic->edx))
		return NULL;
1354 1355 1356 1357 1358 1359 1360

	if (function >= 0x40000000 && function <= 0x4fffffff)
		class = kvm_find_cpuid_entry(vcpu, function & 0xffffff00, 0);
	else if (function >= 0xc0000000)
		class = kvm_find_cpuid_entry(vcpu, 0xc0000000, 0);
	else
		class = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
1361

1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378
	if (class && function <= class->eax)
		return NULL;

	/*
	 * Leaf specific adjustments are also applied when redirecting to the
	 * max basic entry, e.g. if the max basic leaf is 0xb but there is no
	 * entry for CPUID.0xb.index (see below), then the output value for EDX
	 * needs to be pulled from CPUID.0xb.1.
	 */
	*fn_ptr = basic->eax;

	/*
	 * The class does not exist or the requested function is out of range;
	 * the effective CPUID entry is the max basic leaf.  Note, the index of
	 * the original requested leaf is observed!
	 */
	return kvm_find_cpuid_entry(vcpu, basic->eax, index);
A
Avi Kivity 已提交
1379 1380
}

1381
bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
1382
	       u32 *ecx, u32 *edx, bool exact_only)
A
Avi Kivity 已提交
1383
{
1384
	u32 orig_function = *eax, function = *eax, index = *ecx;
1385
	struct kvm_cpuid_entry2 *entry;
1386
	bool exact, used_max_basic = false;
1387

1388
	entry = kvm_find_cpuid_entry(vcpu, function, index);
1389
	exact = !!entry;
1390

1391
	if (!entry && !exact_only) {
1392
		entry = get_out_of_range_cpuid_entry(vcpu, &function, index);
1393 1394
		used_max_basic = !!entry;
	}
1395

1396 1397 1398 1399 1400
	if (entry) {
		*eax = entry->eax;
		*ebx = entry->ebx;
		*ecx = entry->ecx;
		*edx = entry->edx;
1401 1402 1403 1404 1405 1406
		if (function == 7 && index == 0) {
			u64 data;
		        if (!__kvm_get_msr(vcpu, MSR_IA32_TSX_CTRL, &data, true) &&
			    (data & TSX_CTRL_CPUID_CLEAR))
				*ebx &= ~(F(RTM) | F(HLE));
		}
1407
	} else {
1408
		*eax = *ebx = *ecx = *edx = 0;
1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423
		/*
		 * When leaf 0BH or 1FH is defined, CL is pass-through
		 * and EDX is always the x2APIC ID, even for undefined
		 * subleaves. Index 1 will exist iff the leaf is
		 * implemented, so we pass through CL iff leaf 1
		 * exists. EDX can be copied from any existing index.
		 */
		if (function == 0xb || function == 0x1f) {
			entry = kvm_find_cpuid_entry(vcpu, function, 1);
			if (entry) {
				*ecx = index & 0xff;
				*edx = entry->edx;
			}
		}
	}
1424 1425
	trace_kvm_cpuid(orig_function, index, *eax, *ebx, *ecx, *edx, exact,
			used_max_basic);
1426
	return exact;
1427
}
1428
EXPORT_SYMBOL_GPL(kvm_cpuid);
1429

1430
int kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
1431
{
1432
	u32 eax, ebx, ecx, edx;
1433

K
Kyle Huey 已提交
1434 1435 1436
	if (cpuid_fault_enabled(vcpu) && !kvm_require_cpl(vcpu, 0))
		return 1;

1437 1438
	eax = kvm_rax_read(vcpu);
	ecx = kvm_rcx_read(vcpu);
1439
	kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, false);
1440 1441 1442 1443
	kvm_rax_write(vcpu, eax);
	kvm_rbx_write(vcpu, ebx);
	kvm_rcx_write(vcpu, ecx);
	kvm_rdx_write(vcpu, edx);
1444
	return kvm_skip_emulated_instruction(vcpu);
A
Avi Kivity 已提交
1445 1446
}
EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);