提交 09f628a0 编写于 作者: S Sean Christopherson 提交者: Paolo Bonzini

KVM: x86: Fold CPUID 0x7 masking back into __do_cpuid_func()

Move the CPUID 0x7 masking back into __do_cpuid_func() now that the
size of the code has been trimmed down significantly.

Tweak the WARN case, which is impossible to hit unless the CPU is
completely broken, to break the loop before creating the bogus entry.

Opportunustically reorder the cpuid_entry_set() calls and shorten the
comment about emulation to further reduce the footprint of CPUID 0x7.
Reviewed-by: NVitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: NSean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
上级 90d2f60f
......@@ -459,44 +459,6 @@ static int __do_cpuid_func_emulated(struct kvm_cpuid_array *array, u32 func)
return 0;
}
static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry)
{
switch (entry->index) {
case 0:
entry->eax = min(entry->eax, 1u);
cpuid_entry_mask(entry, CPUID_7_0_EBX);
/* TSC_ADJUST is emulated */
cpuid_entry_set(entry, X86_FEATURE_TSC_ADJUST);
cpuid_entry_mask(entry, CPUID_7_ECX);
cpuid_entry_mask(entry, CPUID_7_EDX);
if (boot_cpu_has(X86_FEATURE_IBPB) && boot_cpu_has(X86_FEATURE_IBRS))
cpuid_entry_set(entry, X86_FEATURE_SPEC_CTRL);
if (boot_cpu_has(X86_FEATURE_STIBP))
cpuid_entry_set(entry, X86_FEATURE_INTEL_STIBP);
if (boot_cpu_has(X86_FEATURE_AMD_SSBD))
cpuid_entry_set(entry, X86_FEATURE_SPEC_CTRL_SSBD);
/*
* We emulate ARCH_CAPABILITIES in software even
* if the host doesn't support it.
*/
cpuid_entry_set(entry, X86_FEATURE_ARCH_CAPABILITIES);
break;
case 1:
cpuid_entry_mask(entry, CPUID_7_1_EAX);
entry->ebx = 0;
entry->ecx = 0;
entry->edx = 0;
break;
default:
WARN_ON_ONCE(1);
entry->eax = 0;
entry->ebx = 0;
entry->ecx = 0;
entry->edx = 0;
break;
}
}
static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
{
struct kvm_cpuid_entry2 *entry;
......@@ -558,14 +520,34 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
break;
/* function 7 has additional index. */
case 7:
do_cpuid_7_mask(entry);
entry->eax = min(entry->eax, 1u);
cpuid_entry_mask(entry, CPUID_7_0_EBX);
cpuid_entry_mask(entry, CPUID_7_ECX);
cpuid_entry_mask(entry, CPUID_7_EDX);
/* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */
cpuid_entry_set(entry, X86_FEATURE_TSC_ADJUST);
cpuid_entry_set(entry, X86_FEATURE_ARCH_CAPABILITIES);
if (boot_cpu_has(X86_FEATURE_IBPB) && boot_cpu_has(X86_FEATURE_IBRS))
cpuid_entry_set(entry, X86_FEATURE_SPEC_CTRL);
if (boot_cpu_has(X86_FEATURE_STIBP))
cpuid_entry_set(entry, X86_FEATURE_INTEL_STIBP);
if (boot_cpu_has(X86_FEATURE_AMD_SSBD))
cpuid_entry_set(entry, X86_FEATURE_SPEC_CTRL_SSBD);
for (i = 1, max_idx = entry->eax; i <= max_idx; i++) {
if (WARN_ON_ONCE(i > 1))
break;
entry = do_host_cpuid(array, function, i);
if (!entry)
goto out;
do_cpuid_7_mask(entry);
cpuid_entry_mask(entry, CPUID_7_1_EAX);
entry->ebx = 0;
entry->ecx = 0;
entry->edx = 0;
}
break;
case 9:
......
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