qla_mbx.c 174.4 KB
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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 * QLogic Fibre Channel HBA Driver
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 * Copyright (c)  2003-2014 QLogic Corporation
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 */
#include "qla_def.h"
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#include "qla_target.h"
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#include <linux/delay.h>
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#include <linux/gfp.h>
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static struct mb_cmd_name {
	uint16_t cmd;
	const char *str;
} mb_str[] = {
	{MBC_GET_PORT_DATABASE,		"GPDB"},
	{MBC_GET_ID_LIST,		"GIDList"},
	{MBC_GET_LINK_PRIV_STATS,	"Stats"},
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	{MBC_GET_RESOURCE_COUNTS,	"ResCnt"},
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};

static const char *mb_to_str(uint16_t cmd)
{
	int i;
	struct mb_cmd_name *e;

	for (i = 0; i < ARRAY_SIZE(mb_str); i++) {
		e = mb_str + i;
		if (cmd == e->cmd)
			return e->str;
	}
	return "unknown";
}

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static struct rom_cmd {
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	uint16_t cmd;
} rom_cmds[] = {
	{ MBC_LOAD_RAM },
	{ MBC_EXECUTE_FIRMWARE },
	{ MBC_READ_RAM_WORD },
	{ MBC_MAILBOX_REGISTER_TEST },
	{ MBC_VERIFY_CHECKSUM },
	{ MBC_GET_FIRMWARE_VERSION },
	{ MBC_LOAD_RISC_RAM },
	{ MBC_DUMP_RISC_RAM },
	{ MBC_LOAD_RISC_RAM_EXTENDED },
	{ MBC_DUMP_RISC_RAM_EXTENDED },
	{ MBC_WRITE_RAM_WORD_EXTENDED },
	{ MBC_READ_RAM_EXTENDED },
	{ MBC_GET_RESOURCE_COUNTS },
	{ MBC_SET_FIRMWARE_OPTION },
	{ MBC_MID_INITIALIZE_FIRMWARE },
	{ MBC_GET_FIRMWARE_STATE },
	{ MBC_GET_MEM_OFFLOAD_CNTRL_STAT },
	{ MBC_GET_RETRY_COUNT },
	{ MBC_TRACE_CONTROL },
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	{ MBC_INITIALIZE_MULTIQ },
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	{ MBC_IOCB_COMMAND_A64 },
	{ MBC_GET_ADAPTER_LOOP_ID },
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	{ MBC_READ_SFP },
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	{ MBC_SET_RNID_PARAMS },
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	{ MBC_GET_RNID_PARAMS },
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	{ MBC_GET_SET_ZIO_THRESHOLD },
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};

static int is_rom_cmd(uint16_t cmd)
{
	int i;
	struct  rom_cmd *wc;

	for (i = 0; i < ARRAY_SIZE(rom_cmds); i++) {
		wc = rom_cmds + i;
		if (wc->cmd == cmd)
			return 1;
	}

	return 0;
}
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/*
 * qla2x00_mailbox_command
 *	Issue mailbox command and waits for completion.
 *
 * Input:
 *	ha = adapter block pointer.
 *	mcp = driver internal mbx struct pointer.
 *
 * Output:
 *	mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
 *
 * Returns:
 *	0 : QLA_SUCCESS = cmd performed success
 *	1 : QLA_FUNCTION_FAILED   (error encountered)
 *	6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
 *
 * Context:
 *	Kernel context.
 */
static int
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qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
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{
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	int		rval, i;
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	unsigned long    flags = 0;
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	device_reg_t *reg;
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	uint8_t		abort_active, eeh_delay;
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	uint8_t		io_lock_on;
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	uint16_t	command = 0;
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	uint16_t	*iptr;
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	__le16 __iomem  *optr;
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	uint32_t	cnt;
	uint32_t	mboxes;
	unsigned long	wait_time;
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	struct qla_hw_data *ha = vha->hw;
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
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	u32 chip_reset;
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	ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
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	if (ha->pdev->error_state == pci_channel_io_perm_failure) {
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		ql_log(ql_log_warn, vha, 0x1001,
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		    "PCI channel failed permanently, exiting.\n");
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		return QLA_FUNCTION_TIMEOUT;
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	}
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	if (vha->device_flags & DFLG_DEV_FAILED) {
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		ql_log(ql_log_warn, vha, 0x1002,
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		    "Device in failed state, exiting.\n");
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		return QLA_FUNCTION_TIMEOUT;
	}

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	/* if PCI error, then avoid mbx processing.*/
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	if (test_bit(PFLG_DISCONNECTED, &base_vha->dpc_flags) &&
	    test_bit(UNLOADING, &base_vha->dpc_flags)) {
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		ql_log(ql_log_warn, vha, 0xd04e,
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		    "PCI error, exiting.\n");
		return QLA_FUNCTION_TIMEOUT;
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	}
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	eeh_delay = 0;
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	reg = ha->iobase;
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	io_lock_on = base_vha->flags.init_done;
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	rval = QLA_SUCCESS;
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	abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
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	chip_reset = ha->chip_reset;
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	if (ha->flags.pci_channel_io_perm_failure) {
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		ql_log(ql_log_warn, vha, 0x1003,
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		    "Perm failure on EEH timeout MBX, exiting.\n");
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		return QLA_FUNCTION_TIMEOUT;
	}

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	if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
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		/* Setting Link-Down error */
		mcp->mb[0] = MBS_LINK_DOWN_ERROR;
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		ql_log(ql_log_warn, vha, 0x1004,
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		    "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
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		return QLA_FUNCTION_TIMEOUT;
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	}

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	/* check if ISP abort is active and return cmd with timeout */
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	if (((test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
	      test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
	      test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) &&
	      !is_rom_cmd(mcp->mb[0])) || ha->flags.eeh_busy) {
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		ql_log(ql_log_info, vha, 0x1005,
		    "Cmd 0x%x aborted with timeout since ISP Abort is pending\n",
		    mcp->mb[0]);
		return QLA_FUNCTION_TIMEOUT;
	}

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	atomic_inc(&ha->num_pend_mbx_stage1);
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	/*
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	 * Wait for active mailbox commands to finish by waiting at most tov
	 * seconds. This is to serialize actual issuing of mailbox cmds during
	 * non ISP abort time.
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	 */
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	if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
		/* Timeout occurred. Return error. */
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		ql_log(ql_log_warn, vha, 0xd035,
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		    "Cmd access timeout, cmd=0x%x, Exiting.\n",
		    mcp->mb[0]);
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		vha->hw_err_cnt++;
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		atomic_dec(&ha->num_pend_mbx_stage1);
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		return QLA_FUNCTION_TIMEOUT;
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	}
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	atomic_dec(&ha->num_pend_mbx_stage1);
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	if (ha->flags.purge_mbox || chip_reset != ha->chip_reset ||
	    ha->flags.eeh_busy) {
		ql_log(ql_log_warn, vha, 0xd035,
		       "Error detected: purge[%d] eeh[%d] cmd=0x%x, Exiting.\n",
		       ha->flags.purge_mbox, ha->flags.eeh_busy, mcp->mb[0]);
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		rval = QLA_ABORTED;
		goto premature_exit;
	}
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	/* Save mailbox command for debug */
	ha->mcp = mcp;

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	ql_dbg(ql_dbg_mbx, vha, 0x1006,
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	    "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
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	spin_lock_irqsave(&ha->hardware_lock, flags);

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	if (ha->flags.purge_mbox || chip_reset != ha->chip_reset ||
	    ha->flags.mbox_busy) {
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		rval = QLA_ABORTED;
		spin_unlock_irqrestore(&ha->hardware_lock, flags);
		goto premature_exit;
	}
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	ha->flags.mbox_busy = 1;
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	/* Load mailbox registers. */
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	if (IS_P3P_TYPE(ha))
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		optr = &reg->isp82.mailbox_in[0];
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	else if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha)))
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		optr = &reg->isp24.mailbox0;
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	else
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		optr = MAILBOX_REG(ha, &reg->isp, 0);
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	iptr = mcp->mb;
	command = mcp->mb[0];
	mboxes = mcp->out_mb;

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	ql_dbg(ql_dbg_mbx, vha, 0x1111,
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	    "Mailbox registers (OUT):\n");
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	for (cnt = 0; cnt < ha->mbx_count; cnt++) {
		if (IS_QLA2200(ha) && cnt == 8)
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			optr = MAILBOX_REG(ha, &reg->isp, 8);
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		if (mboxes & BIT_0) {
			ql_dbg(ql_dbg_mbx, vha, 0x1112,
			    "mbox[%d]<-0x%04x\n", cnt, *iptr);
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			wrt_reg_word(optr, *iptr);
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		}
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		mboxes >>= 1;
		optr++;
		iptr++;
	}

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	ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117,
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	    "I/O Address = %p.\n", optr);
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	/* Issue set host interrupt command to send cmd out. */
	ha->flags.mbox_int = 0;
	clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);

	/* Unlock mbx registers and wait for interrupt */
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	ql_dbg(ql_dbg_mbx, vha, 0x100f,
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	    "Going to unlock irq & waiting for interrupts. "
	    "jiffies=%lx.\n", jiffies);
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	/* Wait for mbx cmd completion until timeout */
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	atomic_inc(&ha->num_pend_mbx_stage2);
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	if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
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		set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);

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		if (IS_P3P_TYPE(ha))
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			wrt_reg_dword(&reg->isp82.hint, HINT_MBX_INT_PENDING);
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		else if (IS_FWI2_CAPABLE(ha))
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			wrt_reg_dword(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
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		else
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			wrt_reg_word(&reg->isp.hccr, HCCR_SET_HOST_INT);
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		spin_unlock_irqrestore(&ha->hardware_lock, flags);

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		wait_time = jiffies;
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		atomic_inc(&ha->num_pend_mbx_stage3);
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		if (!wait_for_completion_timeout(&ha->mbx_intr_comp,
		    mcp->tov * HZ)) {
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			if (chip_reset != ha->chip_reset) {
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				eeh_delay = ha->flags.eeh_busy ? 1 : 0;

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				spin_lock_irqsave(&ha->hardware_lock, flags);
				ha->flags.mbox_busy = 0;
				spin_unlock_irqrestore(&ha->hardware_lock,
				    flags);
				atomic_dec(&ha->num_pend_mbx_stage2);
				atomic_dec(&ha->num_pend_mbx_stage3);
				rval = QLA_ABORTED;
				goto premature_exit;
			}
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			ql_dbg(ql_dbg_mbx, vha, 0x117a,
			    "cmd=%x Timeout.\n", command);
			spin_lock_irqsave(&ha->hardware_lock, flags);
			clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
			spin_unlock_irqrestore(&ha->hardware_lock, flags);
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		} else if (ha->flags.purge_mbox ||
		    chip_reset != ha->chip_reset) {
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			eeh_delay = ha->flags.eeh_busy ? 1 : 0;

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			spin_lock_irqsave(&ha->hardware_lock, flags);
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			ha->flags.mbox_busy = 0;
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			spin_unlock_irqrestore(&ha->hardware_lock, flags);
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			atomic_dec(&ha->num_pend_mbx_stage2);
			atomic_dec(&ha->num_pend_mbx_stage3);
			rval = QLA_ABORTED;
			goto premature_exit;
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		}
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		atomic_dec(&ha->num_pend_mbx_stage3);

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		if (time_after(jiffies, wait_time + 5 * HZ))
			ql_log(ql_log_warn, vha, 0x1015, "cmd=0x%x, waited %d msecs\n",
			    command, jiffies_to_msecs(jiffies - wait_time));
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	} else {
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		ql_dbg(ql_dbg_mbx, vha, 0x1011,
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		    "Cmd=%x Polling Mode.\n", command);
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		if (IS_P3P_TYPE(ha)) {
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			if (rd_reg_dword(&reg->isp82.hint) &
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				HINT_MBX_INT_PENDING) {
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				ha->flags.mbox_busy = 0;
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				spin_unlock_irqrestore(&ha->hardware_lock,
					flags);
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				atomic_dec(&ha->num_pend_mbx_stage2);
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				ql_dbg(ql_dbg_mbx, vha, 0x1012,
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				    "Pending mailbox timeout, exiting.\n");
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				vha->hw_err_cnt++;
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				rval = QLA_FUNCTION_TIMEOUT;
				goto premature_exit;
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			}
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			wrt_reg_dword(&reg->isp82.hint, HINT_MBX_INT_PENDING);
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		} else if (IS_FWI2_CAPABLE(ha))
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			wrt_reg_dword(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
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		else
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			wrt_reg_word(&reg->isp.hccr, HCCR_SET_HOST_INT);
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		spin_unlock_irqrestore(&ha->hardware_lock, flags);

		wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
		while (!ha->flags.mbox_int) {
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			if (ha->flags.purge_mbox ||
			    chip_reset != ha->chip_reset) {
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				eeh_delay = ha->flags.eeh_busy ? 1 : 0;

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				spin_lock_irqsave(&ha->hardware_lock, flags);
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				ha->flags.mbox_busy = 0;
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				spin_unlock_irqrestore(&ha->hardware_lock,
				    flags);
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				atomic_dec(&ha->num_pend_mbx_stage2);
				rval = QLA_ABORTED;
				goto premature_exit;
			}

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			if (time_after(jiffies, wait_time))
				break;

			/* Check for pending interrupts. */
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			qla2x00_poll(ha->rsp_q_map[0]);
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			if (!ha->flags.mbox_int &&
			    !(IS_QLA2200(ha) &&
			    command == MBC_LOAD_RISC_RAM_EXTENDED))
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				msleep(10);
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		} /* while */
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		ql_dbg(ql_dbg_mbx, vha, 0x1013,
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		    "Waited %d sec.\n",
		    (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
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	}
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	atomic_dec(&ha->num_pend_mbx_stage2);
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	/* Check whether we timed out */
	if (ha->flags.mbox_int) {
		uint16_t *iptr2;

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		ql_dbg(ql_dbg_mbx, vha, 0x1014,
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		    "Cmd=%x completed.\n", command);
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		/* Got interrupt. Clear the flag. */
		ha->flags.mbox_int = 0;
		clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);

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		if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
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			spin_lock_irqsave(&ha->hardware_lock, flags);
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			ha->flags.mbox_busy = 0;
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			spin_unlock_irqrestore(&ha->hardware_lock, flags);

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			/* Setting Link-Down error */
			mcp->mb[0] = MBS_LINK_DOWN_ERROR;
			ha->mcp = NULL;
			rval = QLA_FUNCTION_FAILED;
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			ql_log(ql_log_warn, vha, 0xd048,
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			    "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
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			goto premature_exit;
		}

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		if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE) {
			ql_dbg(ql_dbg_mbx, vha, 0x11ff,
			       "mb_out[0] = %#x <> %#x\n", ha->mailbox_out[0],
			       MBS_COMMAND_COMPLETE);
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			rval = QLA_FUNCTION_FAILED;
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		}
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		/* Load return mailbox registers. */
		iptr2 = mcp->mb;
		iptr = (uint16_t *)&ha->mailbox_out[0];
		mboxes = mcp->in_mb;
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		ql_dbg(ql_dbg_mbx, vha, 0x1113,
		    "Mailbox registers (IN):\n");
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		for (cnt = 0; cnt < ha->mbx_count; cnt++) {
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			if (mboxes & BIT_0) {
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				*iptr2 = *iptr;
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				ql_dbg(ql_dbg_mbx, vha, 0x1114,
				    "mbox[%d]->0x%04x\n", cnt, *iptr2);
			}
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			mboxes >>= 1;
			iptr2++;
			iptr++;
		}
	} else {

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		uint16_t mb[8];
		uint32_t ictrl, host_status, hccr;
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		uint16_t        w;
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		if (IS_FWI2_CAPABLE(ha)) {
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			mb[0] = rd_reg_word(&reg->isp24.mailbox0);
			mb[1] = rd_reg_word(&reg->isp24.mailbox1);
			mb[2] = rd_reg_word(&reg->isp24.mailbox2);
			mb[3] = rd_reg_word(&reg->isp24.mailbox3);
			mb[7] = rd_reg_word(&reg->isp24.mailbox7);
			ictrl = rd_reg_dword(&reg->isp24.ictrl);
			host_status = rd_reg_dword(&reg->isp24.host_status);
			hccr = rd_reg_dword(&reg->isp24.hccr);
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			ql_log(ql_log_warn, vha, 0xd04c,
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			    "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
			    "mb[0-3]=[0x%x 0x%x 0x%x 0x%x] mb7 0x%x host_status 0x%x hccr 0x%x\n",
			    command, ictrl, jiffies, mb[0], mb[1], mb[2], mb[3],
			    mb[7], host_status, hccr);
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			vha->hw_err_cnt++;
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		} else {
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			mb[0] = RD_MAILBOX_REG(ha, &reg->isp, 0);
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			ictrl = rd_reg_word(&reg->isp.ictrl);
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			ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
			    "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
			    "mb[0]=0x%x\n", command, ictrl, jiffies, mb[0]);
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			vha->hw_err_cnt++;
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		}
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		ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
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		/* Capture FW dump only, if PCI device active */
		if (!pci_channel_offline(vha->hw->pdev)) {
			pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
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			if (w == 0xffff || ictrl == 0xffffffff ||
			    (chip_reset != ha->chip_reset)) {
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				/* This is special case if there is unload
				 * of driver happening and if PCI device go
				 * into bad state due to PCI error condition
				 * then only PCI ERR flag would be set.
				 * we will do premature exit for above case.
				 */
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				spin_lock_irqsave(&ha->hardware_lock, flags);
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				ha->flags.mbox_busy = 0;
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				spin_unlock_irqrestore(&ha->hardware_lock,
				    flags);
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				rval = QLA_FUNCTION_TIMEOUT;
				goto premature_exit;
			}
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			/* Attempt to capture firmware dump for further
			 * anallysis of the current formware state. we do not
			 * need to do this if we are intentionally generating
			 * a dump
			 */
			if (mcp->mb[0] != MBC_GEN_SYSTEM_ERROR)
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				qla2xxx_dump_fw(vha);
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			rval = QLA_FUNCTION_TIMEOUT;
		 }
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	}
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	spin_lock_irqsave(&ha->hardware_lock, flags);
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	ha->flags.mbox_busy = 0;
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	spin_unlock_irqrestore(&ha->hardware_lock, flags);
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	/* Clean up */
	ha->mcp = NULL;

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	if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
482
		ql_dbg(ql_dbg_mbx, vha, 0x101a,
483
		    "Checking for additional resp interrupt.\n");
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		/* polling mode for non isp_abort commands. */
486
		qla2x00_poll(ha->rsp_q_map[0]);
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	}

489 490
	if (rval == QLA_FUNCTION_TIMEOUT &&
	    mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
491 492
		if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
		    ha->flags.eeh_busy) {
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493
			/* not in dpc. schedule it for dpc to take over. */
494
			ql_dbg(ql_dbg_mbx, vha, 0x101b,
495
			    "Timeout, schedule isp_abort_needed.\n");
496 497 498 499

			if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
			    !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
			    !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
500 501 502 503 504 505 506 507 508
				if (IS_QLA82XX(ha)) {
					ql_dbg(ql_dbg_mbx, vha, 0x112a,
					    "disabling pause transmit on port "
					    "0 & 1.\n");
					qla82xx_wr_32(ha,
					    QLA82XX_CRB_NIU + 0x98,
					    CRB_NIU_XG_PAUSE_CTL_P0|
					    CRB_NIU_XG_PAUSE_CTL_P1);
				}
509
				ql_log(ql_log_info, base_vha, 0x101c,
510
				    "Mailbox cmd timeout occurred, cmd=0x%x, "
511 512 513
				    "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
				    "abort.\n", command, mcp->mb[0],
				    ha->flags.eeh_busy);
514
				vha->hw_err_cnt++;
515 516 517
				set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
				qla2xxx_wake_dpc(vha);
			}
518
		} else if (current == ha->dpc_thread) {
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			/* call abort directly since we are in the DPC thread */
520
			ql_dbg(ql_dbg_mbx, vha, 0x101d,
521
			    "Timeout, calling abort_isp.\n");
522 523 524 525

			if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
			    !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
			    !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
526 527 528 529 530 531 532 533 534
				if (IS_QLA82XX(ha)) {
					ql_dbg(ql_dbg_mbx, vha, 0x112b,
					    "disabling pause transmit on port "
					    "0 & 1.\n");
					qla82xx_wr_32(ha,
					    QLA82XX_CRB_NIU + 0x98,
					    CRB_NIU_XG_PAUSE_CTL_P0|
					    CRB_NIU_XG_PAUSE_CTL_P1);
				}
535
				ql_log(ql_log_info, base_vha, 0x101e,
536
				    "Mailbox cmd timeout occurred, cmd=0x%x, "
537 538
				    "mb[0]=0x%x. Scheduling ISP abort ",
				    command, mcp->mb[0]);
539
				vha->hw_err_cnt++;
540 541
				set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
				clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
542 543
				/* Allow next mbx cmd to come in. */
				complete(&ha->mbx_cmd_comp);
544 545
				if (ha->isp_ops->abort_isp(vha) &&
				    !ha->flags.eeh_busy) {
546 547 548 549 550
					/* Failed. retry later. */
					set_bit(ISP_ABORT_NEEDED,
					    &vha->dpc_flags);
				}
				clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
551
				ql_dbg(ql_dbg_mbx, vha, 0x101f,
552
				    "Finished abort_isp.\n");
553
				goto mbx_done;
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			}
		}
	}

558
premature_exit:
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559
	/* Allow next mbx cmd to come in. */
560
	complete(&ha->mbx_cmd_comp);
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562
mbx_done:
563 564 565 566 567
	if (rval == QLA_ABORTED) {
		ql_log(ql_log_info, vha, 0xd035,
		    "Chip Reset in progress. Purging Mbox cmd=0x%x.\n",
		    mcp->mb[0]);
	} else if (rval) {
568
		if (ql2xextended_error_logging & (ql_dbg_disc|ql_dbg_mbx)) {
569
			pr_warn("%s [%s]-%04x:%ld: **** Failed=%x", QL_MSGHDR,
570
			    dev_name(&ha->pdev->dev), 0x1020+0x800,
571
			    vha->host_no, rval);
572 573 574 575 576 577 578 579 580
			mboxes = mcp->in_mb;
			cnt = 4;
			for (i = 0; i < ha->mbx_count && cnt; i++, mboxes >>= 1)
				if (mboxes & BIT_0) {
					printk(" mb[%u]=%x", i, mcp->mb[i]);
					cnt--;
				}
			pr_warn(" cmd=%x ****\n", command);
		}
581 582 583
		if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha))) {
			ql_dbg(ql_dbg_mbx, vha, 0x1198,
			    "host_status=%#x intr_ctrl=%#x intr_status=%#x\n",
584 585 586
			    rd_reg_dword(&reg->isp24.host_status),
			    rd_reg_dword(&reg->isp24.ictrl),
			    rd_reg_dword(&reg->isp24.istatus));
587 588 589
		} else {
			ql_dbg(ql_dbg_mbx, vha, 0x1206,
			    "ctrl_status=%#x ictrl=%#x istatus=%#x\n",
590 591 592
			    rd_reg_word(&reg->isp.ctrl_status),
			    rd_reg_word(&reg->isp.ictrl),
			    rd_reg_word(&reg->isp.istatus));
593
		}
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	} else {
595
		ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
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	}

598 599 600 601 602 603 604 605 606 607 608
	i = 500;
	while (i && eeh_delay && (ha->pci_error_state < QLA_PCI_SLOT_RESET)) {
		/*
		 * The caller of this mailbox encounter pci error.
		 * Hold the thread until PCIE link reset complete to make
		 * sure caller does not unmap dma while recovery is
		 * in progress.
		 */
		msleep(1);
		i--;
	}
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	return rval;
}

int
613
qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
614
    uint32_t risc_code_size)
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{
	int rval;
617
	struct qla_hw_data *ha = vha->hw;
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618 619 620
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

621 622
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,
	    "Entered %s.\n", __func__);
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623

624
	if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
625 626 627
		mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
		mcp->mb[8] = MSW(risc_addr);
		mcp->out_mb = MBX_8|MBX_0;
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	} else {
629 630
		mcp->mb[0] = MBC_LOAD_RISC_RAM;
		mcp->out_mb = MBX_0;
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	}
	mcp->mb[1] = LSW(risc_addr);
	mcp->mb[2] = MSW(req_dma);
	mcp->mb[3] = LSW(req_dma);
	mcp->mb[6] = MSW(MSD(req_dma));
	mcp->mb[7] = LSW(MSD(req_dma));
637
	mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
638
	if (IS_FWI2_CAPABLE(ha)) {
639 640 641 642 643 644 645 646
		mcp->mb[4] = MSW(risc_code_size);
		mcp->mb[5] = LSW(risc_code_size);
		mcp->out_mb |= MBX_5|MBX_4;
	} else {
		mcp->mb[4] = LSW(risc_code_size);
		mcp->out_mb |= MBX_4;
	}

647
	mcp->in_mb = MBX_1|MBX_0;
648
	mcp->tov = MBX_TOV_SECONDS;
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649
	mcp->flags = 0;
650
	rval = qla2x00_mailbox_command(vha, mcp);
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651 652

	if (rval != QLA_SUCCESS) {
653
		ql_dbg(ql_dbg_mbx, vha, 0x1023,
654 655
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
656
		vha->hw_err_cnt++;
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657
	} else {
658 659
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,
		    "Done %s.\n", __func__);
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660 661 662 663 664
	}

	return rval;
}

665
#define	NVME_ENABLE_FLAG	BIT_3
666
#define	EDIF_HW_SUPPORT		BIT_10
667

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668 669
/*
 * qla2x00_execute_fw
670
 *     Start adapter firmware.
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 *
 * Input:
673 674 675
 *     ha = adapter block pointer.
 *     TARGET_QUEUE_LOCK must be released.
 *     ADAPTER_STATE_LOCK must be released.
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 *
 * Returns:
678
 *     qla2x00 local function return status code.
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679 680
 *
 * Context:
681
 *     Kernel context.
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 */
int
684
qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
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685 686
{
	int rval;
687
	struct qla_hw_data *ha = vha->hw;
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688 689
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
690 691 692
	u8 semaphore = 0;
#define EXE_FW_FORCE_SEMAPHORE BIT_7
	u8 retry = 3;
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693

694 695
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,
	    "Entered %s.\n", __func__);
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696

697
again:
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698
	mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
699 700
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_0;
701
	if (IS_FWI2_CAPABLE(ha)) {
702 703 704
		mcp->mb[1] = MSW(risc_addr);
		mcp->mb[2] = LSW(risc_addr);
		mcp->mb[3] = 0;
705
		mcp->mb[4] = 0;
706
		mcp->mb[11] = 0;
707 708 709 710 711 712 713

		/* Enable BPM? */
		if (ha->flags.lr_detected) {
			mcp->mb[4] = BIT_0;
			if (IS_BPM_RANGE_CAPABLE(ha))
				mcp->mb[4] |=
				    ha->lr_distance << LR_DIST_FW_POS;
714
		}
715

716
		if (ql2xnvmeenable && (IS_QLA27XX(ha) || IS_QLA28XX(ha)))
717 718
			mcp->mb[4] |= NVME_ENABLE_FLAG;

719
		if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
720 721
			struct nvram_81xx *nv = ha->nvram;
			/* set minimum speed if specified in nvram */
722 723
			if (nv->min_supported_speed >= 2 &&
			    nv->min_supported_speed <= 5) {
724
				mcp->mb[4] |= BIT_4;
725
				mcp->mb[11] |= nv->min_supported_speed & 0xF;
726 727
				mcp->out_mb |= MBX_11;
				mcp->in_mb |= BIT_5;
728 729
				vha->min_supported_speed =
				    nv->min_supported_speed;
730 731 732
			}
		}

733 734 735
		if (ha->flags.exlogins_enabled)
			mcp->mb[4] |= ENABLE_EXTENDED_LOGIN;

736 737 738
		if (ha->flags.exchoffld_enabled)
			mcp->mb[4] |= ENABLE_EXCHANGE_OFFLD;

739 740 741
		if (semaphore)
			mcp->mb[11] |= EXE_FW_FORCE_SEMAPHORE;

742
		mcp->out_mb |= MBX_4 | MBX_3 | MBX_2 | MBX_1 | MBX_11;
743
		mcp->in_mb |= MBX_5 | MBX_3 | MBX_2 | MBX_1;
744 745 746 747 748 749 750
	} else {
		mcp->mb[1] = LSW(risc_addr);
		mcp->out_mb |= MBX_1;
		if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
			mcp->mb[2] = 0;
			mcp->out_mb |= MBX_2;
		}
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751 752
	}

753
	mcp->tov = MBX_TOV_SECONDS;
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754
	mcp->flags = 0;
755
	rval = qla2x00_mailbox_command(vha, mcp);
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756

757
	if (rval != QLA_SUCCESS) {
758 759 760 761 762 763 764 765 766
		if (IS_QLA28XX(ha) && rval == QLA_COMMAND_ERROR &&
		    mcp->mb[1] == 0x27 && retry) {
			semaphore = 1;
			retry--;
			ql_dbg(ql_dbg_async, vha, 0x1026,
			    "Exe FW: force semaphore.\n");
			goto again;
		}

767 768
		ql_dbg(ql_dbg_mbx, vha, 0x1026,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
769
		vha->hw_err_cnt++;
770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795
		return rval;
	}

	if (!IS_FWI2_CAPABLE(ha))
		goto done;

	ha->fw_ability_mask = mcp->mb[3] << 16 | mcp->mb[2];
	ql_dbg(ql_dbg_mbx, vha, 0x119a,
	    "fw_ability_mask=%x.\n", ha->fw_ability_mask);
	ql_dbg(ql_dbg_mbx, vha, 0x1027, "exchanges=%x.\n", mcp->mb[1]);
	if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
		ha->max_supported_speed = mcp->mb[2] & (BIT_0|BIT_1);
		ql_dbg(ql_dbg_mbx, vha, 0x119b, "max_supported_speed=%s.\n",
		    ha->max_supported_speed == 0 ? "16Gps" :
		    ha->max_supported_speed == 1 ? "32Gps" :
		    ha->max_supported_speed == 2 ? "64Gps" : "unknown");
		if (vha->min_supported_speed) {
			ha->min_supported_speed = mcp->mb[5] &
			    (BIT_0 | BIT_1 | BIT_2);
			ql_dbg(ql_dbg_mbx, vha, 0x119c,
			    "min_supported_speed=%s.\n",
			    ha->min_supported_speed == 6 ? "64Gps" :
			    ha->min_supported_speed == 5 ? "32Gps" :
			    ha->min_supported_speed == 4 ? "16Gps" :
			    ha->min_supported_speed == 3 ? "8Gps" :
			    ha->min_supported_speed == 2 ? "4Gps" : "unknown");
796 797
		}
	}
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798

799 800
	if (IS_QLA28XX(ha) && (mcp->mb[5] & EDIF_HW_SUPPORT)) {
		ha->flags.edif_hw = 1;
801
		ql_log(ql_log_info, vha, 0xffff,
802
		    "%s: edif HW\n", __func__);
803 804
	}

805 806 807 808
done:
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,
	    "Done %s.\n", __func__);

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809 810 811
	return rval;
}

812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883
/*
 * qla_get_exlogin_status
 *	Get extended login status
 *	uses the memory offload control/status Mailbox
 *
 * Input:
 *	ha:		adapter state pointer.
 *	fwopt:		firmware options
 *
 * Returns:
 *	qla2x00 local function status
 *
 * Context:
 *	Kernel context.
 */
#define	FETCH_XLOGINS_STAT	0x8
int
qla_get_exlogin_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
	uint16_t *ex_logins_cnt)
{
	int rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118f,
	    "Entered %s\n", __func__);

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
	mcp->mb[1] = FETCH_XLOGINS_STAT;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_10|MBX_4|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1115, "Failed=%x.\n", rval);
	} else {
		*buf_sz = mcp->mb[4];
		*ex_logins_cnt = mcp->mb[10];

		ql_log(ql_log_info, vha, 0x1190,
		    "buffer size 0x%x, exchange login count=%d\n",
		    mcp->mb[4], mcp->mb[10]);

		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1116,
		    "Done %s.\n", __func__);
	}

	return rval;
}

/*
 * qla_set_exlogin_mem_cfg
 *	set extended login memory configuration
 *	Mbx needs to be issues before init_cb is set
 *
 * Input:
 *	ha:		adapter state pointer.
 *	buffer:		buffer pointer
 *	phys_addr:	physical address of buffer
 *	size:		size of buffer
 *	TARGET_QUEUE_LOCK must be released
 *	ADAPTER_STATE_LOCK must be release
 *
 * Returns:
 *	qla2x00 local funxtion status code.
 *
 * Context:
 *	Kernel context.
 */
884
#define CONFIG_XLOGINS_MEM	0x9
885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910
int
qla_set_exlogin_mem_cfg(scsi_qla_host_t *vha, dma_addr_t phys_addr)
{
	int		rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111a,
	    "Entered %s.\n", __func__);

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
	mcp->mb[1] = CONFIG_XLOGINS_MEM;
	mcp->mb[2] = MSW(phys_addr);
	mcp->mb[3] = LSW(phys_addr);
	mcp->mb[6] = MSW(MSD(phys_addr));
	mcp->mb[7] = LSW(MSD(phys_addr));
	mcp->mb[8] = MSW(ha->exlogin_size);
	mcp->mb[9] = LSW(ha->exlogin_size);
	mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_11|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
911 912 913
		ql_dbg(ql_dbg_mbx, vha, 0x111b,
		       "EXlogin Failed=%x. MB0=%x MB11=%x\n",
		       rval, mcp->mb[0], mcp->mb[11]);
914 915 916 917 918 919 920 921
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118c,
		    "Done %s.\n", __func__);
	}

	return rval;
}

922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995
/*
 * qla_get_exchoffld_status
 *	Get exchange offload status
 *	uses the memory offload control/status Mailbox
 *
 * Input:
 *	ha:		adapter state pointer.
 *	fwopt:		firmware options
 *
 * Returns:
 *	qla2x00 local function status
 *
 * Context:
 *	Kernel context.
 */
#define	FETCH_XCHOFFLD_STAT	0x2
int
qla_get_exchoffld_status(scsi_qla_host_t *vha, uint16_t *buf_sz,
	uint16_t *ex_logins_cnt)
{
	int rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1019,
	    "Entered %s\n", __func__);

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
	mcp->mb[1] = FETCH_XCHOFFLD_STAT;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_10|MBX_4|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1155, "Failed=%x.\n", rval);
	} else {
		*buf_sz = mcp->mb[4];
		*ex_logins_cnt = mcp->mb[10];

		ql_log(ql_log_info, vha, 0x118e,
		    "buffer size 0x%x, exchange offload count=%d\n",
		    mcp->mb[4], mcp->mb[10]);

		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1156,
		    "Done %s.\n", __func__);
	}

	return rval;
}

/*
 * qla_set_exchoffld_mem_cfg
 *	Set exchange offload memory configuration
 *	Mbx needs to be issues before init_cb is set
 *
 * Input:
 *	ha:		adapter state pointer.
 *	buffer:		buffer pointer
 *	phys_addr:	physical address of buffer
 *	size:		size of buffer
 *	TARGET_QUEUE_LOCK must be released
 *	ADAPTER_STATE_LOCK must be release
 *
 * Returns:
 *	qla2x00 local funxtion status code.
 *
 * Context:
 *	Kernel context.
 */
#define CONFIG_XCHOFFLD_MEM	0x3
int
996
qla_set_exchoffld_mem_cfg(scsi_qla_host_t *vha)
997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008
{
	int		rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1157,
	    "Entered %s.\n", __func__);

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = MBC_GET_MEM_OFFLOAD_CNTRL_STAT;
	mcp->mb[1] = CONFIG_XCHOFFLD_MEM;
1009 1010 1011 1012 1013 1014
	mcp->mb[2] = MSW(ha->exchoffld_buf_dma);
	mcp->mb[3] = LSW(ha->exchoffld_buf_dma);
	mcp->mb[6] = MSW(MSD(ha->exchoffld_buf_dma));
	mcp->mb[7] = LSW(MSD(ha->exchoffld_buf_dma));
	mcp->mb[8] = MSW(ha->exchoffld_size);
	mcp->mb[9] = LSW(ha->exchoffld_size);
1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030
	mcp->out_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_11|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
		ql_dbg(ql_dbg_mbx, vha, 0x1158, "Failed=%x.\n", rval);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1192,
		    "Done %s.\n", __func__);
	}

	return rval;
}

L
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1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046
/*
 * qla2x00_get_fw_version
 *	Get firmware version.
 *
 * Input:
 *	ha:		adapter state pointer.
 *	major:		pointer for major number.
 *	minor:		pointer for minor number.
 *	subminor:	pointer for subminor number.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
1047
int
1048
qla2x00_get_fw_version(scsi_qla_host_t *vha)
L
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1049 1050 1051 1052
{
	int		rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;
1053
	struct qla_hw_data *ha = vha->hw;
L
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1054

1055 1056
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,
	    "Entered %s.\n", __func__);
L
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	mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1061
	if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha) || IS_QLA8044(ha))
1062
		mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
1063
	if (IS_FWI2_CAPABLE(ha))
1064
		mcp->in_mb |= MBX_17|MBX_16|MBX_15;
1065
	if (IS_QLA27XX(ha) || IS_QLA28XX(ha))
1066 1067
		mcp->in_mb |=
		    MBX_25|MBX_24|MBX_23|MBX_22|MBX_21|MBX_20|MBX_19|MBX_18|
1068
		    MBX_14|MBX_13|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7;
1069

L
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	mcp->flags = 0;
1071
	mcp->tov = MBX_TOV_SECONDS;
1072
	rval = qla2x00_mailbox_command(vha, mcp);
1073 1074
	if (rval != QLA_SUCCESS)
		goto failed;
L
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1075 1076

	/* Return mailbox data. */
1077 1078 1079 1080
	ha->fw_major_version = mcp->mb[1];
	ha->fw_minor_version = mcp->mb[2];
	ha->fw_subminor_version = mcp->mb[3];
	ha->fw_attributes = mcp->mb[6];
1081
	if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
1082
		ha->fw_memory_size = 0x1FFFF;		/* Defaults to 128KB. */
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	else
1084
		ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
1085

1086
	if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
1087 1088 1089 1090 1091 1092 1093 1094
		ha->mpi_version[0] = mcp->mb[10] & 0xff;
		ha->mpi_version[1] = mcp->mb[11] >> 8;
		ha->mpi_version[2] = mcp->mb[11] & 0xff;
		ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
		ha->phy_version[0] = mcp->mb[8] & 0xff;
		ha->phy_version[1] = mcp->mb[9] >> 8;
		ha->phy_version[2] = mcp->mb[9] & 0xff;
	}
1095

1096 1097 1098 1099 1100 1101 1102 1103 1104 1105
	if (IS_FWI2_CAPABLE(ha)) {
		ha->fw_attributes_h = mcp->mb[15];
		ha->fw_attributes_ext[0] = mcp->mb[16];
		ha->fw_attributes_ext[1] = mcp->mb[17];
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
		    "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
		    __func__, mcp->mb[15], mcp->mb[6]);
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
		    "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n",
		    __func__, mcp->mb[17], mcp->mb[16]);
1106

1107 1108 1109 1110
		if (ha->fw_attributes_h & 0x4)
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118d,
			    "%s: Firmware supports Extended Login 0x%x\n",
			    __func__, ha->fw_attributes_h);
1111 1112 1113 1114 1115

		if (ha->fw_attributes_h & 0x8)
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1191,
			    "%s: Firmware supports Exchange Offload 0x%x\n",
			    __func__, ha->fw_attributes_h);
1116

1117 1118 1119 1120
		/*
		 * FW supports nvme and driver load parameter requested nvme.
		 * BIT 26 of fw_attributes indicates NVMe support.
		 */
1121 1122 1123
		if ((ha->fw_attributes_h &
		    (FW_ATTR_H_NVME | FW_ATTR_H_NVME_UPDATED)) &&
			ql2xnvmeenable) {
1124 1125 1126
			if (ha->fw_attributes_h & FW_ATTR_H_NVME_FBURST)
				vha->flags.nvme_first_burst = 1;

1127
			vha->flags.nvme_enabled = 1;
1128 1129 1130 1131
			ql_log(ql_log_info, vha, 0xd302,
			    "%s: FC-NVMe is Enabled (0x%x)\n",
			     __func__, ha->fw_attributes_h);
		}
1132 1133 1134 1135 1136 1137 1138 1139

		/* BIT_13 of Extended FW Attributes informs about NVMe2 support */
		if (ha->fw_attributes_ext[0] & FW_ATTR_EXT0_NVME2) {
			ql_log(ql_log_info, vha, 0xd302,
			       "Firmware supports NVMe2 0x%x\n",
			       ha->fw_attributes_ext[0]);
			vha->flags.nvme2_enabled = 1;
		}
1140 1141 1142 1143

		if (IS_QLA28XX(ha) && ha->flags.edif_hw && ql2xsecenable &&
		    (ha->fw_attributes_ext[0] & FW_ATTR_EXT0_EDIF)) {
			ha->flags.edif_enabled = 1;
1144
			ql_log(ql_log_info, vha, 0xffff,
1145 1146
			       "%s: edif is enabled\n", __func__);
		}
1147
	}
1148

1149
	if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1150 1151 1152
		ha->serdes_version[0] = mcp->mb[7] & 0xff;
		ha->serdes_version[1] = mcp->mb[8] >> 8;
		ha->serdes_version[2] = mcp->mb[8] & 0xff;
1153 1154 1155 1156 1157 1158
		ha->mpi_version[0] = mcp->mb[10] & 0xff;
		ha->mpi_version[1] = mcp->mb[11] >> 8;
		ha->mpi_version[2] = mcp->mb[11] & 0xff;
		ha->pep_version[0] = mcp->mb[13] & 0xff;
		ha->pep_version[1] = mcp->mb[14] >> 8;
		ha->pep_version[2] = mcp->mb[14] & 0xff;
1159 1160
		ha->fw_shared_ram_start = (mcp->mb[19] << 16) | mcp->mb[18];
		ha->fw_shared_ram_end = (mcp->mb[21] << 16) | mcp->mb[20];
1161 1162
		ha->fw_ddr_ram_start = (mcp->mb[23] << 16) | mcp->mb[22];
		ha->fw_ddr_ram_end = (mcp->mb[25] << 16) | mcp->mb[24];
1163
		if (IS_QLA28XX(ha)) {
1164
			if (mcp->mb[16] & BIT_10)
1165
				ha->flags.secure_fw = 1;
1166 1167 1168 1169 1170

			ql_log(ql_log_info, vha, 0xffff,
			    "Secure Flash Update in FW: %s\n",
			    (ha->flags.secure_fw) ? "Supported" :
			    "Not Supported");
1171
		}
1172 1173 1174 1175

		if (ha->flags.scm_supported_a &&
		    (ha->fw_attributes_ext[0] & FW_ATTR_EXT0_SCM_SUPPORTED)) {
			ha->flags.scm_supported_f = 1;
1176
			ha->sf_init_cb->flags |= cpu_to_le16(BIT_13);
1177 1178 1179 1180
		}
		ql_log(ql_log_info, vha, 0x11a3, "SCM in FW: %s\n",
		       (ha->flags.scm_supported_f) ? "Supported" :
		       "Not Supported");
1181 1182 1183

		if (vha->flags.nvme2_enabled) {
			/* set BIT_15 of special feature control block for SLER */
1184
			ha->sf_init_cb->flags |= cpu_to_le16(BIT_15);
1185
			/* set BIT_14 of special feature control block for PI CTRL*/
1186
			ha->sf_init_cb->flags |= cpu_to_le16(BIT_14);
1187
		}
1188
	}
1189

1190
failed:
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1191 1192
	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1193
		ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);
L
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	} else {
		/*EMPTY*/
1196 1197
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,
		    "Done %s.\n", __func__);
L
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	}
1199
	return rval;
L
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}

/*
 * qla2x00_get_fw_options
 *	Set firmware options.
 *
 * Input:
 *	ha = adapter block pointer.
 *	fwopt = pointer for firmware options.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1217
qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
L
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1223 1224
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,
	    "Entered %s.\n", __func__);
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	mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1229
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
1231
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1232 1233 1234

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1235
		ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval);
L
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	} else {
1237
		fwopts[0] = mcp->mb[0];
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1238 1239 1240 1241
		fwopts[1] = mcp->mb[1];
		fwopts[2] = mcp->mb[2];
		fwopts[3] = mcp->mb[3];

1242 1243
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,
		    "Done %s.\n", __func__);
L
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1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264
	}

	return rval;
}


/*
 * qla2x00_set_fw_options
 *	Set firmware options.
 *
 * Input:
 *	ha = adapter block pointer.
 *	fwopt = pointer for firmware options.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1265
qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
L
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1271 1272
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,
	    "Entered %s.\n", __func__);
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1273 1274 1275 1276 1277

	mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
	mcp->mb[1] = fwopts[1];
	mcp->mb[2] = fwopts[2];
	mcp->mb[3] = fwopts[3];
1278
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
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1279
	mcp->in_mb = MBX_0;
1280
	if (IS_FWI2_CAPABLE(vha->hw)) {
1281
		mcp->in_mb |= MBX_1;
1282 1283
		mcp->mb[10] = fwopts[10];
		mcp->out_mb |= MBX_10;
1284 1285 1286 1287 1288 1289
	} else {
		mcp->mb[10] = fwopts[10];
		mcp->mb[11] = fwopts[11];
		mcp->mb[12] = 0;	/* Undocumented, but used */
		mcp->out_mb |= MBX_12|MBX_11|MBX_10;
	}
1290
	mcp->tov = MBX_TOV_SECONDS;
L
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1291
	mcp->flags = 0;
1292
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1293

1294 1295
	fwopts[0] = mcp->mb[0];

L
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1296 1297
	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1298 1299
		ql_dbg(ql_dbg_mbx, vha, 0x1030,
		    "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]);
L
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1300 1301
	} else {
		/*EMPTY*/
1302 1303
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,
		    "Done %s.\n", __func__);
L
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1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324
	}

	return rval;
}

/*
 * qla2x00_mbx_reg_test
 *	Mailbox register wrap test.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1325
qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
L
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1326 1327 1328 1329 1330
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1331 1332
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,
	    "Entered %s.\n", __func__);
L
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1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343

	mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
	mcp->mb[1] = 0xAAAA;
	mcp->mb[2] = 0x5555;
	mcp->mb[3] = 0xAA55;
	mcp->mb[4] = 0x55AA;
	mcp->mb[5] = 0xA5A5;
	mcp->mb[6] = 0x5A5A;
	mcp->mb[7] = 0x2525;
	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1344
	mcp->tov = MBX_TOV_SECONDS;
L
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1345
	mcp->flags = 0;
1346
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358

	if (rval == QLA_SUCCESS) {
		if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
		    mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
			rval = QLA_FUNCTION_FAILED;
		if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
		    mcp->mb[7] != 0x2525)
			rval = QLA_FUNCTION_FAILED;
	}

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1359
		ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);
1360
		vha->hw_err_cnt++;
L
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1361 1362
	} else {
		/*EMPTY*/
1363 1364
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,
		    "Done %s.\n", __func__);
L
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1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385
	}

	return rval;
}

/*
 * qla2x00_verify_checksum
 *	Verify firmware checksum.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1386
qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
L
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1387 1388 1389 1390 1391
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1392 1393
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,
	    "Entered %s.\n", __func__);
L
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1394 1395

	mcp->mb[0] = MBC_VERIFY_CHECKSUM;
1396 1397
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_0;
1398
	if (IS_FWI2_CAPABLE(vha->hw)) {
1399 1400 1401 1402 1403 1404 1405 1406 1407 1408
		mcp->mb[1] = MSW(risc_addr);
		mcp->mb[2] = LSW(risc_addr);
		mcp->out_mb |= MBX_2|MBX_1;
		mcp->in_mb |= MBX_2|MBX_1;
	} else {
		mcp->mb[1] = LSW(risc_addr);
		mcp->out_mb |= MBX_1;
		mcp->in_mb |= MBX_1;
	}

1409
	mcp->tov = MBX_TOV_SECONDS;
L
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1410
	mcp->flags = 0;
1411
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1412 1413

	if (rval != QLA_SUCCESS) {
1414 1415 1416
		ql_dbg(ql_dbg_mbx, vha, 0x1036,
		    "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ?
		    (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]);
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	} else {
1418 1419
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

/*
 * qla2x00_issue_iocb
 *	Issue IOCB using mailbox command
 *
 * Input:
 *	ha = adapter state pointer.
 *	buffer = buffer pointer.
 *	phys_addr = physical address of buffer.
 *	size = size of buffer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
1443
int
1444
qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
1445
    dma_addr_t phys_addr, size_t size, uint32_t tov)
L
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{
	int		rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;

1451
	if (!vha->hw->flags.fw_started)
1452 1453
		return QLA_INVALID_COMMAND;

1454 1455
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,
	    "Entered %s.\n", __func__);
1456

L
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1457 1458
	mcp->mb[0] = MBC_IOCB_COMMAND_A64;
	mcp->mb[1] = 0;
1459 1460
	mcp->mb[2] = MSW(LSD(phys_addr));
	mcp->mb[3] = LSW(LSD(phys_addr));
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	mcp->mb[6] = MSW(MSD(phys_addr));
	mcp->mb[7] = LSW(MSD(phys_addr));
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1464
	mcp->in_mb = MBX_1|MBX_0;
1465
	mcp->tov = tov;
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1466
	mcp->flags = 0;
1467
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1471
		ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval);
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	} else {
1473
		sts_entry_t *sts_entry = buffer;
1474 1475 1476

		/* Mask reserved bits. */
		sts_entry->entry_status &=
1477
		    IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
1478
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,
1479 1480
		    "Done %s (status=%x).\n", __func__,
		    sts_entry->entry_status);
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	}

	return rval;
}

1486
int
1487
qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
1488 1489
    size_t size)
{
1490
	return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
1491 1492 1493
	    MBX_TOV_SECONDS);
}

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/*
 * qla2x00_abort_command
 *	Abort command aborts a specified IOCB.
 *
 * Input:
 *	ha = adapter block pointer.
 *	sp = SB structure pointer.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1509
qla2x00_abort_command(srb_t *sp)
L
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{
	unsigned long   flags = 0;
	int		rval;
1513
	uint32_t	handle = 0;
L
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	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;
1516 1517
	fc_port_t	*fcport = sp->fcport;
	scsi_qla_host_t *vha = fcport->vha;
1518
	struct qla_hw_data *ha = vha->hw;
1519
	struct req_que *req;
1520
	struct scsi_cmnd *cmd = GET_CMD_SP(sp);
L
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1522 1523
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,
	    "Entered %s.\n", __func__);
L
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1525
	if (sp->qpair)
1526 1527 1528 1529
		req = sp->qpair->req;
	else
		req = vha->req;

1530
	spin_lock_irqsave(&ha->hardware_lock, flags);
1531
	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1532
		if (req->outstanding_cmds[handle] == sp)
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			break;
	}
1535
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
L
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1536

1537
	if (handle == req->num_outstanding_cmds) {
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		/* command not found */
		return QLA_FUNCTION_FAILED;
	}

	mcp->mb[0] = MBC_ABORT_COMMAND;
	if (HAS_EXTENDED_IDS(ha))
		mcp->mb[1] = fcport->loop_id;
	else
		mcp->mb[1] = fcport->loop_id << 8;
	mcp->mb[2] = (uint16_t)handle;
	mcp->mb[3] = (uint16_t)(handle >> 16);
1549
	mcp->mb[6] = (uint16_t)cmd->device->lun;
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	mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
1552
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
1554
	rval = qla2x00_mailbox_command(vha, mcp);
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	if (rval != QLA_SUCCESS) {
1557
		ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);
L
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	} else {
1559 1560
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,
		    "Done %s.\n", __func__);
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	}

	return rval;
}

int
H
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qla2x00_abort_target(struct fc_port *fcport, uint64_t l, int tag)
L
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{
1569
	int rval, rval2;
L
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	mbx_cmd_t  mc;
	mbx_cmd_t  *mcp = &mc;
1572
	scsi_qla_host_t *vha;
L
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1574
	vha = fcport->vha;
1575

1576 1577
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,
	    "Entered %s.\n", __func__);
1578

L
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	mcp->mb[0] = MBC_ABORT_TARGET;
1580
	mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
1581
	if (HAS_EXTENDED_IDS(vha->hw)) {
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		mcp->mb[1] = fcport->loop_id;
		mcp->mb[10] = 0;
		mcp->out_mb |= MBX_10;
	} else {
		mcp->mb[1] = fcport->loop_id << 8;
	}
1588 1589
	mcp->mb[2] = vha->hw->loop_reset_delay;
	mcp->mb[9] = vha->vp_idx;
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	mcp->in_mb = MBX_0;
1592
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
1594
	rval = qla2x00_mailbox_command(vha, mcp);
1595
	if (rval != QLA_SUCCESS) {
1596 1597
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,
		    "Failed=%x.\n", rval);
1598 1599 1600
	}

	/* Issue marker IOCB. */
1601
	rval2 = qla2x00_marker(vha, vha->hw->base_qpair, fcport->loop_id, 0,
1602
							MK_SYNC_ID);
1603
	if (rval2 != QLA_SUCCESS) {
1604 1605
		ql_dbg(ql_dbg_mbx, vha, 0x1040,
		    "Failed to issue marker IOCB (%x).\n", rval2);
1606
	} else {
1607 1608
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,
		    "Done %s.\n", __func__);
1609 1610 1611 1612 1613 1614
	}

	return rval;
}

int
H
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qla2x00_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
1616 1617 1618 1619
{
	int rval, rval2;
	mbx_cmd_t  mc;
	mbx_cmd_t  *mcp = &mc;
1620
	scsi_qla_host_t *vha;
1621

1622
	vha = fcport->vha;
1623

1624 1625
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,
	    "Entered %s.\n", __func__);
1626

1627 1628
	mcp->mb[0] = MBC_LUN_RESET;
	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
1629
	if (HAS_EXTENDED_IDS(vha->hw))
1630 1631 1632
		mcp->mb[1] = fcport->loop_id;
	else
		mcp->mb[1] = fcport->loop_id << 8;
H
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	mcp->mb[2] = (u32)l;
1634
	mcp->mb[3] = 0;
1635
	mcp->mb[9] = vha->vp_idx;
L
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1637
	mcp->in_mb = MBX_0;
1638
	mcp->tov = MBX_TOV_SECONDS;
1639
	mcp->flags = 0;
1640
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1641
	if (rval != QLA_SUCCESS) {
1642
		ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval);
1643 1644 1645
	}

	/* Issue marker IOCB. */
1646
	rval2 = qla2x00_marker(vha, vha->hw->base_qpair, fcport->loop_id, l,
1647
								MK_SYNC_ID_LUN);
1648
	if (rval2 != QLA_SUCCESS) {
1649 1650
		ql_dbg(ql_dbg_mbx, vha, 0x1044,
		    "Failed to issue marker IOCB (%x).\n", rval2);
L
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	} else {
1652 1653
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,
		    "Done %s.\n", __func__);
L
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	}

	return rval;
}

/*
 * qla2x00_get_adapter_id
 *	Get adapter ID and topology.
 *
 * Input:
 *	ha = adapter block pointer.
 *	id = pointer for loop ID.
 *	al_pa = pointer for AL_PA.
 *	area = pointer for area.
 *	domain = pointer for domain.
 *	top = pointer for topology.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1680
qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1681
    uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
L
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{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1687 1688
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,
	    "Entered %s.\n", __func__);
L
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	mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
1691
	mcp->mb[9] = vha->vp_idx;
1692
	mcp->out_mb = MBX_9|MBX_0;
1693
	mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1694
	if (IS_CNA_CAPABLE(vha->hw))
1695
		mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
1696 1697
	if (IS_FWI2_CAPABLE(vha->hw))
		mcp->in_mb |= MBX_19|MBX_18|MBX_17|MBX_16;
1698
	if (IS_QLA27XX(vha->hw) || IS_QLA28XX(vha->hw)) {
1699
		mcp->in_mb |= MBX_15;
1700 1701 1702
		mcp->out_mb |= MBX_7|MBX_21|MBX_22|MBX_23;
	}

1703
	mcp->tov = MBX_TOV_SECONDS;
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	mcp->flags = 0;
1705
	rval = qla2x00_mailbox_command(vha, mcp);
1706 1707
	if (mcp->mb[0] == MBS_COMMAND_ERROR)
		rval = QLA_COMMAND_ERROR;
1708 1709
	else if (mcp->mb[0] == MBS_INVALID_COMMAND)
		rval = QLA_INVALID_COMMAND;
L
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	/* Return data. */
	*id = mcp->mb[1];
	*al_pa = LSB(mcp->mb[2]);
	*area = MSB(mcp->mb[2]);
	*domain	= LSB(mcp->mb[3]);
	*top = mcp->mb[6];
1717
	*sw_cap = mcp->mb[7];
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	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1721
		ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);
L
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1722
	} else {
1723 1724
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,
		    "Done %s.\n", __func__);
1725

1726
		if (IS_CNA_CAPABLE(vha->hw)) {
1727 1728 1729 1730 1731 1732 1733 1734 1735
			vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
			vha->fcoe_fcf_idx = mcp->mb[10];
			vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
			vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
			vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
			vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
			vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
			vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
		}
1736
		/* If FA-WWN supported */
1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752
		if (IS_FAWWN_CAPABLE(vha->hw)) {
			if (mcp->mb[7] & BIT_14) {
				vha->port_name[0] = MSB(mcp->mb[16]);
				vha->port_name[1] = LSB(mcp->mb[16]);
				vha->port_name[2] = MSB(mcp->mb[17]);
				vha->port_name[3] = LSB(mcp->mb[17]);
				vha->port_name[4] = MSB(mcp->mb[18]);
				vha->port_name[5] = LSB(mcp->mb[18]);
				vha->port_name[6] = MSB(mcp->mb[19]);
				vha->port_name[7] = LSB(mcp->mb[19]);
				fc_host_port_name(vha->host) =
				    wwn_to_u64(vha->port_name);
				ql_dbg(ql_dbg_mbx, vha, 0x10ca,
				    "FA-WWN acquired %016llx\n",
				    wwn_to_u64(vha->port_name));
			}
1753
		}
1754

1755
		if (IS_QLA27XX(vha->hw) || IS_QLA28XX(vha->hw)) {
1756
			vha->bbcr = mcp->mb[15];
1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770
			if (mcp->mb[7] & SCM_EDC_ACC_RECEIVED) {
				ql_log(ql_log_info, vha, 0x11a4,
				       "SCM: EDC ELS completed, flags 0x%x\n",
				       mcp->mb[21]);
			}
			if (mcp->mb[7] & SCM_RDF_ACC_RECEIVED) {
				vha->hw->flags.scm_enabled = 1;
				vha->scm_fabric_connection_flags |=
				    SCM_FLAG_RDF_COMPLETED;
				ql_log(ql_log_info, vha, 0x11a5,
				       "SCM: RDF ELS completed, flags 0x%x\n",
				       mcp->mb[23]);
			}
		}
L
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1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791
	}

	return rval;
}

/*
 * qla2x00_get_retry_cnt
 *	Get current firmware login retry count and delay.
 *
 * Input:
 *	ha = adapter block pointer.
 *	retry_cnt = pointer to login retry count.
 *	tov = pointer to login timeout value.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1792
qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
L
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1793 1794 1795 1796 1797 1798 1799
    uint16_t *r_a_tov)
{
	int rval;
	uint16_t ratov;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

1800 1801
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,
	    "Entered %s.\n", __func__);
L
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1802 1803 1804 1805

	mcp->mb[0] = MBC_GET_RETRY_COUNT;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1806
	mcp->tov = MBX_TOV_SECONDS;
L
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1807
	mcp->flags = 0;
1808
	rval = qla2x00_mailbox_command(vha, mcp);
L
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1809 1810 1811

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1812 1813
		ql_dbg(ql_dbg_mbx, vha, 0x104a,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
L
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	} else {
		/* Convert returned data and check our values. */
		*r_a_tov = mcp->mb[3] / 2;
		ratov = (mcp->mb[3]/2) / 10;  /* mb[3] value is in 100ms */
		if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
			/* Update to the larger values */
			*retry_cnt = (uint8_t)mcp->mb[1];
			*tov = ratov;
		}

1824
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,
1825
		    "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov);
L
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	}

	return rval;
}

/*
 * qla2x00_init_firmware
 *	Initialize adapter firmware.
 *
 * Input:
 *	ha = adapter block pointer.
 *	dptr = Initialization control block pointer.
 *	size = size of initialization control block.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1849
qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
L
Linus Torvalds 已提交
1850 1851 1852 1853
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
1854
	struct qla_hw_data *ha = vha->hw;
L
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1855

1856 1857
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,
	    "Entered %s.\n", __func__);
L
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1858

1859
	if (IS_P3P_TYPE(ha) && ql2xdbwr)
1860
		qla82xx_wr_32(ha, (uintptr_t __force)ha->nxdb_wr_ptr,
1861 1862
			(0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));

1863
	if (ha->flags.npiv_supported)
1864 1865 1866 1867
		mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
	else
		mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;

1868
	mcp->mb[1] = 0;
L
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1869 1870 1871 1872
	mcp->mb[2] = MSW(ha->init_cb_dma);
	mcp->mb[3] = LSW(ha->init_cb_dma);
	mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
	mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
1873
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1874
	if (ha->ex_init_cb && ha->ex_init_cb->ex_version) {
1875 1876 1877 1878 1879 1880 1881 1882
		mcp->mb[1] = BIT_0;
		mcp->mb[10] = MSW(ha->ex_init_cb_dma);
		mcp->mb[11] = LSW(ha->ex_init_cb_dma);
		mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
		mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
		mcp->mb[14] = sizeof(*ha->ex_init_cb);
		mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
	}
1883

1884
	if (ha->flags.scm_supported_f || vha->flags.nvme2_enabled) {
1885 1886 1887 1888 1889 1890 1891 1892 1893
		mcp->mb[1] |= BIT_1;
		mcp->mb[16] = MSW(ha->sf_init_cb_dma);
		mcp->mb[17] = LSW(ha->sf_init_cb_dma);
		mcp->mb[18] = MSW(MSD(ha->sf_init_cb_dma));
		mcp->mb[19] = LSW(MSD(ha->sf_init_cb_dma));
		mcp->mb[15] = sizeof(*ha->sf_init_cb);
		mcp->out_mb |= MBX_19|MBX_18|MBX_17|MBX_16|MBX_15;
	}

1894 1895
	/* 1 and 2 should normally be captured. */
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
1896
	if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
1897 1898
		/* mb3 is additional info about the installed SFP. */
		mcp->in_mb  |= MBX_3;
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1899 1900
	mcp->buf_size = size;
	mcp->flags = MBX_DMA_OUT;
1901
	mcp->tov = MBX_TOV_SECONDS;
1902
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
1903 1904 1905

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
1906
		ql_dbg(ql_dbg_mbx, vha, 0x104d,
1907
		    "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x.\n",
1908
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
1909 1910 1911 1912 1913 1914 1915 1916 1917 1918
		if (ha->init_cb) {
			ql_dbg(ql_dbg_mbx, vha, 0x104d, "init_cb:\n");
			ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha,
			    0x0104d, ha->init_cb, sizeof(*ha->init_cb));
		}
		if (ha->ex_init_cb && ha->ex_init_cb->ex_version) {
			ql_dbg(ql_dbg_mbx, vha, 0x104d, "ex_init_cb:\n");
			ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha,
			    0x0104d, ha->ex_init_cb, sizeof(*ha->ex_init_cb));
		}
L
Linus Torvalds 已提交
1919
	} else {
1920
		if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1921 1922 1923 1924
			if (mcp->mb[2] == 6 || mcp->mb[3] == 2)
				ql_dbg(ql_dbg_mbx, vha, 0x119d,
				    "Invalid SFP/Validation Failed\n");
		}
1925 1926
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,
		    "Done %s.\n", __func__);
L
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1927 1928 1929 1930 1931
	}

	return rval;
}

1932

L
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1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949
/*
 * qla2x00_get_port_database
 *	Issue normal/enhanced get port database mailbox command
 *	and copy device name as necessary.
 *
 * Input:
 *	ha = adapter state pointer.
 *	dev = structure pointer.
 *	opt = enhanced cmd option byte.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
1950
qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
L
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1951 1952 1953 1954 1955
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	port_database_t *pd;
1956
	struct port_database_24xx *pd24;
L
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1957
	dma_addr_t pd_dma;
1958
	struct qla_hw_data *ha = vha->hw;
L
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1959

1960 1961
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
1962

1963
	pd24 = NULL;
1964
	pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
L
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1965
	if (pd  == NULL) {
1966 1967
		ql_log(ql_log_warn, vha, 0x1050,
		    "Failed to allocate port database structure.\n");
1968
		fcport->query = 0;
L
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1969 1970 1971
		return QLA_MEMORY_ALLOC_FAILED;
	}

1972
	mcp->mb[0] = MBC_GET_PORT_DATABASE;
1973
	if (opt != 0 && !IS_FWI2_CAPABLE(ha))
L
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1974 1975 1976 1977 1978
		mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
	mcp->mb[2] = MSW(pd_dma);
	mcp->mb[3] = LSW(pd_dma);
	mcp->mb[6] = MSW(MSD(pd_dma));
	mcp->mb[7] = LSW(MSD(pd_dma));
1979
	mcp->mb[9] = vha->vp_idx;
1980
	mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
L
Linus Torvalds 已提交
1981
	mcp->in_mb = MBX_0;
1982
	if (IS_FWI2_CAPABLE(ha)) {
1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994
		mcp->mb[1] = fcport->loop_id;
		mcp->mb[10] = opt;
		mcp->out_mb |= MBX_10|MBX_1;
		mcp->in_mb |= MBX_1;
	} else if (HAS_EXTENDED_IDS(ha)) {
		mcp->mb[1] = fcport->loop_id;
		mcp->mb[10] = opt;
		mcp->out_mb |= MBX_10|MBX_1;
	} else {
		mcp->mb[1] = fcport->loop_id << 8 | opt;
		mcp->out_mb |= MBX_1;
	}
1995 1996
	mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
	    PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
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1997 1998
	mcp->flags = MBX_DMA_IN;
	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1999
	rval = qla2x00_mailbox_command(vha, mcp);
L
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2000 2001 2002
	if (rval != QLA_SUCCESS)
		goto gpd_error_out;

2003
	if (IS_FWI2_CAPABLE(ha)) {
2004
		uint64_t zero = 0;
2005 2006
		u8 current_login_state, last_login_state;

2007 2008 2009
		pd24 = (struct port_database_24xx *) pd;

		/* Check for logged in state. */
2010
		if (NVME_TARGET(ha, fcport)) {
2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026
			current_login_state = pd24->current_login_state >> 4;
			last_login_state = pd24->last_login_state >> 4;
		} else {
			current_login_state = pd24->current_login_state & 0xf;
			last_login_state = pd24->last_login_state & 0xf;
		}
		fcport->current_login_state = pd24->current_login_state;
		fcport->last_login_state = pd24->last_login_state;

		/* Check for logged in state. */
		if (current_login_state != PDS_PRLI_COMPLETE &&
		    last_login_state != PDS_PRLI_COMPLETE) {
			ql_dbg(ql_dbg_mbx, vha, 0x119a,
			    "Unable to verify login-state (%x/%x) for loop_id %x.\n",
			    current_login_state, last_login_state,
			    fcport->loop_id);
2027
			rval = QLA_FUNCTION_FAILED;
2028 2029 2030

			if (!fcport->query)
				goto gpd_error_out;
2031
		}
L
Linus Torvalds 已提交
2032

2033 2034 2035 2036 2037 2038 2039 2040
		if (fcport->loop_id == FC_NO_LOOP_ID ||
		    (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
		     memcmp(fcport->port_name, pd24->port_name, 8))) {
			/* We lost the device mid way. */
			rval = QLA_NOT_LOGGED_IN;
			goto gpd_error_out;
		}

2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055
		/* Names are little-endian. */
		memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
		memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);

		/* Get port_id of device. */
		fcport->d_id.b.domain = pd24->port_id[0];
		fcport->d_id.b.area = pd24->port_id[1];
		fcport->d_id.b.al_pa = pd24->port_id[2];
		fcport->d_id.b.rsvd_1 = 0;

		/* If not target must be initiator or unknown type. */
		if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
			fcport->port_type = FCT_INITIATOR;
		else
			fcport->port_type = FCT_TARGET;
2056 2057 2058 2059 2060 2061 2062

		/* Passback COS information. */
		fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ?
				FC_COS_CLASS2 : FC_COS_CLASS3;

		if (pd24->prli_svc_param_word_3[0] & BIT_7)
			fcport->flags |= FCF_CONF_COMP_SUPPORTED;
2063
	} else {
2064 2065
		uint64_t zero = 0;

2066 2067 2068
		/* Check for logged in state. */
		if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
		    pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
2069 2070 2071 2072 2073
			ql_dbg(ql_dbg_mbx, vha, 0x100a,
			    "Unable to verify login-state (%x/%x) - "
			    "portid=%02x%02x%02x.\n", pd->master_state,
			    pd->slave_state, fcport->d_id.b.domain,
			    fcport->d_id.b.area, fcport->d_id.b.al_pa);
2074 2075 2076
			rval = QLA_FUNCTION_FAILED;
			goto gpd_error_out;
		}
L
Linus Torvalds 已提交
2077

2078 2079 2080 2081 2082 2083 2084 2085
		if (fcport->loop_id == FC_NO_LOOP_ID ||
		    (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
		     memcmp(fcport->port_name, pd->port_name, 8))) {
			/* We lost the device mid way. */
			rval = QLA_NOT_LOGGED_IN;
			goto gpd_error_out;
		}

2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097 2098 2099 2100
		/* Names are little-endian. */
		memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
		memcpy(fcport->port_name, pd->port_name, WWN_SIZE);

		/* Get port_id of device. */
		fcport->d_id.b.domain = pd->port_id[0];
		fcport->d_id.b.area = pd->port_id[3];
		fcport->d_id.b.al_pa = pd->port_id[2];
		fcport->d_id.b.rsvd_1 = 0;

		/* If not target must be initiator or unknown type. */
		if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
			fcport->port_type = FCT_INITIATOR;
		else
			fcport->port_type = FCT_TARGET;
2101 2102 2103

		/* Passback COS information. */
		fcport->supported_classes = (pd->options & BIT_4) ?
2104
		    FC_COS_CLASS2 : FC_COS_CLASS3;
2105
	}
L
Linus Torvalds 已提交
2106 2107 2108

gpd_error_out:
	dma_pool_free(ha->s_dma_pool, pd, pd_dma);
2109
	fcport->query = 0;
L
Linus Torvalds 已提交
2110 2111

	if (rval != QLA_SUCCESS) {
2112 2113 2114
		ql_dbg(ql_dbg_mbx, vha, 0x1052,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,
		    mcp->mb[0], mcp->mb[1]);
L
Linus Torvalds 已提交
2115
	} else {
2116 2117
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,
		    "Done %s.\n", __func__);
L
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2118 2119 2120 2121 2122
	}

	return rval;
}

2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165 2166 2167 2168 2169 2170 2171 2172 2173
int
qla24xx_get_port_database(scsi_qla_host_t *vha, u16 nport_handle,
	struct port_database_24xx *pdb)
{
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	dma_addr_t pdb_dma;
	int rval;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1115,
	    "Entered %s.\n", __func__);

	memset(pdb, 0, sizeof(*pdb));

	pdb_dma = dma_map_single(&vha->hw->pdev->dev, pdb,
	    sizeof(*pdb), DMA_FROM_DEVICE);
	if (!pdb_dma) {
		ql_log(ql_log_warn, vha, 0x1116, "Failed to map dma buffer.\n");
		return QLA_MEMORY_ALLOC_FAILED;
	}

	mcp->mb[0] = MBC_GET_PORT_DATABASE;
	mcp->mb[1] = nport_handle;
	mcp->mb[2] = MSW(LSD(pdb_dma));
	mcp->mb[3] = LSW(LSD(pdb_dma));
	mcp->mb[6] = MSW(MSD(pdb_dma));
	mcp->mb[7] = LSW(MSD(pdb_dma));
	mcp->mb[9] = 0;
	mcp->mb[10] = 0;
	mcp->out_mb = MBX_10|MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->buf_size = sizeof(*pdb);
	mcp->flags = MBX_DMA_IN;
	mcp->tov = vha->hw->login_timeout * 2;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x111a,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111b,
		    "Done %s.\n", __func__);
	}

	dma_unmap_single(&vha->hw->pdev->dev, pdb_dma,
	    sizeof(*pdb), DMA_FROM_DEVICE);

	return rval;
}

L
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2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 2188 2189 2190
/*
 * qla2x00_get_firmware_state
 *	Get adapter firmware state.
 *
 * Input:
 *	ha = adapter block pointer.
 *	dptr = pointer for firmware state.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2191
qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
L
Linus Torvalds 已提交
2192 2193 2194 2195
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
2196
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
2197

2198 2199
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,
	    "Entered %s.\n", __func__);
L
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2200 2201 2202

	mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
	mcp->out_mb = MBX_0;
2203
	if (IS_FWI2_CAPABLE(vha->hw))
2204
		mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
2205 2206
	else
		mcp->in_mb = MBX_1|MBX_0;
2207
	mcp->tov = MBX_TOV_SECONDS;
L
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2208
	mcp->flags = 0;
2209
	rval = qla2x00_mailbox_command(vha, mcp);
L
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2210

2211 2212
	/* Return firmware states. */
	states[0] = mcp->mb[1];
2213 2214
	if (IS_FWI2_CAPABLE(vha->hw)) {
		states[1] = mcp->mb[2];
2215
		states[2] = mcp->mb[3];  /* SFP info */
2216 2217
		states[3] = mcp->mb[4];
		states[4] = mcp->mb[5];
2218
		states[5] = mcp->mb[6];  /* DPORT status */
2219
	}
L
Linus Torvalds 已提交
2220 2221 2222

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2223
		ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);
L
Linus Torvalds 已提交
2224
	} else {
2225
		if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
2226 2227 2228 2229
			if (mcp->mb[2] == 6 || mcp->mb[3] == 2)
				ql_dbg(ql_dbg_mbx, vha, 0x119e,
				    "Invalid SFP/Validation Failed\n");
		}
2230 2231
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,
		    "Done %s.\n", __func__);
L
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2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255
	}

	return rval;
}

/*
 * qla2x00_get_port_name
 *	Issue get port name mailbox command.
 *	Returned name is in big endian format.
 *
 * Input:
 *	ha = adapter block pointer.
 *	loop_id = loop ID of device.
 *	name = pointer for name.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2256
qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
L
Linus Torvalds 已提交
2257 2258 2259 2260 2261 2262
    uint8_t opt)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2263 2264
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2265 2266

	mcp->mb[0] = MBC_GET_PORT_NAME;
2267
	mcp->mb[9] = vha->vp_idx;
2268
	mcp->out_mb = MBX_9|MBX_1|MBX_0;
2269
	if (HAS_EXTENDED_IDS(vha->hw)) {
L
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2270 2271 2272 2273 2274 2275 2276 2277
		mcp->mb[1] = loop_id;
		mcp->mb[10] = opt;
		mcp->out_mb |= MBX_10;
	} else {
		mcp->mb[1] = loop_id << 8 | opt;
	}

	mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2278
	mcp->tov = MBX_TOV_SECONDS;
L
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2279
	mcp->flags = 0;
2280
	rval = qla2x00_mailbox_command(vha, mcp);
L
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2281 2282 2283

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2284
		ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval);
L
Linus Torvalds 已提交
2285 2286 2287
	} else {
		if (name != NULL) {
			/* This function returns name in big endian. */
2288 2289 2290 2291 2292 2293 2294 2295
			name[0] = MSB(mcp->mb[2]);
			name[1] = LSB(mcp->mb[2]);
			name[2] = MSB(mcp->mb[3]);
			name[3] = LSB(mcp->mb[3]);
			name[4] = MSB(mcp->mb[6]);
			name[5] = LSB(mcp->mb[6]);
			name[6] = MSB(mcp->mb[7]);
			name[7] = LSB(mcp->mb[7]);
L
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2296 2297
		}

2298 2299
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,
		    "Done %s.\n", __func__);
L
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2300 2301 2302 2303 2304
	}

	return rval;
}

2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330 2331 2332 2333
/*
 * qla24xx_link_initialization
 *	Issue link initialization mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
qla24xx_link_initialize(scsi_qla_host_t *vha)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152,
	    "Entered %s.\n", __func__);

	if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_LINK_INITIALIZATION;
2334 2335 2336 2337 2338
	mcp->mb[1] = BIT_4;
	if (vha->hw->operating_mode == LOOP)
		mcp->mb[1] |= BIT_6;
	else
		mcp->mb[1] |= BIT_5;
2339 2340 2341 2342 2343 2344 2345 2346 2347 2348 2349 2350 2351 2352 2353 2354 2355 2356
	mcp->mb[2] = 0;
	mcp->mb[3] = 0;
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154,
		    "Done %s.\n", __func__);
	}

	return rval;
}

L
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2357 2358 2359 2360 2361 2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372
/*
 * qla2x00_lip_reset
 *	Issue LIP reset mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2373
qla2x00_lip_reset(scsi_qla_host_t *vha)
L
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2374 2375 2376 2377 2378
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2379
	ql_dbg(ql_dbg_disc, vha, 0x105a,
2380
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2381

2382
	if (IS_CNA_CAPABLE(vha->hw)) {
2383 2384 2385 2386 2387 2388
		/* Logout across all FCFs. */
		mcp->mb[0] = MBC_LIP_FULL_LOGIN;
		mcp->mb[1] = BIT_1;
		mcp->mb[2] = 0;
		mcp->out_mb = MBX_2|MBX_1|MBX_0;
	} else if (IS_FWI2_CAPABLE(vha->hw)) {
2389
		mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2390
		mcp->mb[1] = BIT_4;
2391
		mcp->mb[2] = 0;
2392
		mcp->mb[3] = vha->hw->loop_reset_delay;
2393
		mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
L
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2394
	} else {
2395 2396
		mcp->mb[0] = MBC_LIP_RESET;
		mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2397
		if (HAS_EXTENDED_IDS(vha->hw)) {
2398 2399 2400 2401 2402 2403
			mcp->mb[1] = 0x00ff;
			mcp->mb[10] = 0;
			mcp->out_mb |= MBX_10;
		} else {
			mcp->mb[1] = 0xff00;
		}
2404
		mcp->mb[2] = vha->hw->loop_reset_delay;
2405
		mcp->mb[3] = 0;
L
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2406 2407
	}
	mcp->in_mb = MBX_0;
2408
	mcp->tov = MBX_TOV_SECONDS;
L
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2409
	mcp->flags = 0;
2410
	rval = qla2x00_mailbox_command(vha, mcp);
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2411 2412 2413

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2414
		ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);
L
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2415 2416
	} else {
		/*EMPTY*/
2417 2418
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,
		    "Done %s.\n", __func__);
L
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2419 2420 2421 2422 2423 2424 2425 2426 2427 2428 2429 2430 2431 2432 2433 2434 2435 2436 2437 2438 2439 2440 2441 2442
	}

	return rval;
}

/*
 * qla2x00_send_sns
 *	Send SNS command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	sns = pointer for command.
 *	cmd_size = command size.
 *	buf_size = response/command size.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2443
qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
L
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2444 2445 2446 2447 2448 2449
    uint16_t cmd_size, size_t buf_size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2450 2451
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2452

2453
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,
2454 2455
	    "Retry cnt=%d ratov=%d total tov=%d.\n",
	    vha->hw->retry_count, vha->hw->login_timeout, mcp->tov);
L
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2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466

	mcp->mb[0] = MBC_SEND_SNS_COMMAND;
	mcp->mb[1] = cmd_size;
	mcp->mb[2] = MSW(sns_phys_address);
	mcp->mb[3] = LSW(sns_phys_address);
	mcp->mb[6] = MSW(MSD(sns_phys_address));
	mcp->mb[7] = LSW(MSD(sns_phys_address));
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0|MBX_1;
	mcp->buf_size = buf_size;
	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
2467 2468
	mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
	rval = qla2x00_mailbox_command(vha, mcp);
L
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2469 2470 2471

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2472 2473 2474
		ql_dbg(ql_dbg_mbx, vha, 0x105f,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
L
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2475 2476
	} else {
		/*EMPTY*/
2477 2478
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,
		    "Done %s.\n", __func__);
L
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2479 2480 2481 2482 2483
	}

	return rval;
}

2484
int
2485
qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2486 2487 2488 2489 2490 2491 2492
    uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
{
	int		rval;

	struct logio_entry_24xx *lg;
	dma_addr_t	lg_dma;
	uint32_t	iop[2];
2493
	struct qla_hw_data *ha = vha->hw;
2494
	struct req_que *req;
2495

2496 2497
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,
	    "Entered %s.\n", __func__);
2498

2499 2500
	if (vha->vp_idx && vha->qpair)
		req = vha->qpair->req;
2501
	else
2502
		req = ha->req_q_map[0];
2503

2504
	lg = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2505
	if (lg == NULL) {
2506 2507
		ql_log(ql_log_warn, vha, 0x1062,
		    "Failed to allocate login IOCB.\n");
2508 2509 2510 2511 2512
		return QLA_MEMORY_ALLOC_FAILED;
	}

	lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
	lg->entry_count = 1;
2513
	lg->handle = make_handle(req->id, lg->handle);
2514
	lg->nport_handle = cpu_to_le16(loop_id);
2515
	lg->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
2516
	if (opt & BIT_0)
2517
		lg->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
2518
	if (opt & BIT_1)
2519
		lg->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
2520 2521 2522
	lg->port_id[0] = al_pa;
	lg->port_id[1] = area;
	lg->port_id[2] = domain;
2523
	lg->vp_index = vha->vp_idx;
2524 2525
	rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
	    (ha->r_a_tov / 10 * 2) + 2);
2526
	if (rval != QLA_SUCCESS) {
2527 2528
		ql_dbg(ql_dbg_mbx, vha, 0x1063,
		    "Failed to issue login IOCB (%x).\n", rval);
2529
	} else if (lg->entry_status != 0) {
2530 2531 2532
		ql_dbg(ql_dbg_mbx, vha, 0x1064,
		    "Failed to complete IOCB -- error status (%x).\n",
		    lg->entry_status);
2533
		rval = QLA_FUNCTION_FAILED;
2534
	} else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2535 2536 2537
		iop[0] = le32_to_cpu(lg->io_parameter[0]);
		iop[1] = le32_to_cpu(lg->io_parameter[1]);

2538 2539 2540 2541
		ql_dbg(ql_dbg_mbx, vha, 0x1065,
		    "Failed to complete IOCB -- completion  status (%x) "
		    "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
		    iop[0], iop[1]);
2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 2552 2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565 2566 2567 2568

		switch (iop[0]) {
		case LSC_SCODE_PORTID_USED:
			mb[0] = MBS_PORT_ID_USED;
			mb[1] = LSW(iop[1]);
			break;
		case LSC_SCODE_NPORT_USED:
			mb[0] = MBS_LOOP_ID_USED;
			break;
		case LSC_SCODE_NOLINK:
		case LSC_SCODE_NOIOCB:
		case LSC_SCODE_NOXCB:
		case LSC_SCODE_CMD_FAILED:
		case LSC_SCODE_NOFABRIC:
		case LSC_SCODE_FW_NOT_READY:
		case LSC_SCODE_NOT_LOGGED_IN:
		case LSC_SCODE_NOPCB:
		case LSC_SCODE_ELS_REJECT:
		case LSC_SCODE_CMD_PARAM_ERR:
		case LSC_SCODE_NONPORT:
		case LSC_SCODE_LOGGED_IN:
		case LSC_SCODE_NOFLOGI_ACC:
		default:
			mb[0] = MBS_COMMAND_ERROR;
			break;
		}
	} else {
2569 2570
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,
		    "Done %s.\n", __func__);
2571 2572 2573 2574 2575 2576 2577 2578 2579 2580

		iop[0] = le32_to_cpu(lg->io_parameter[0]);

		mb[0] = MBS_COMMAND_COMPLETE;
		mb[1] = 0;
		if (iop[0] & BIT_4) {
			if (iop[0] & BIT_8)
				mb[1] |= BIT_1;
		} else
			mb[1] = BIT_0;
2581 2582 2583 2584 2585 2586 2587

		/* Passback COS information. */
		mb[10] = 0;
		if (lg->io_parameter[7] || lg->io_parameter[8])
			mb[10] |= BIT_0;	/* Class 2. */
		if (lg->io_parameter[9] || lg->io_parameter[10])
			mb[10] |= BIT_1;	/* Class 3. */
2588
		if (lg->io_parameter[0] & cpu_to_le32(BIT_7))
2589 2590 2591
			mb[10] |= BIT_7;	/* Confirmed Completion
						 * Allowed
						 */
2592 2593 2594 2595 2596 2597 2598
	}

	dma_pool_free(ha->s_dma_pool, lg, lg_dma);

	return rval;
}

L
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2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617 2618 2619 2620
/*
 * qla2x00_login_fabric
 *	Issue login fabric port mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	loop_id = device loop ID.
 *	domain = device domain.
 *	area = device area.
 *	al_pa = device AL_PA.
 *	status = pointer for return status.
 *	opt = command options.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2621
qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
L
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2622 2623 2624 2625 2626
    uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
2627
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
2628

2629 2630
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,
	    "Entered %s.\n", __func__);
L
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2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642 2643 2644 2645 2646

	mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	if (HAS_EXTENDED_IDS(ha)) {
		mcp->mb[1] = loop_id;
		mcp->mb[10] = opt;
		mcp->out_mb |= MBX_10;
	} else {
		mcp->mb[1] = (loop_id << 8) | opt;
	}
	mcp->mb[2] = domain;
	mcp->mb[3] = area << 8 | al_pa;

	mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
	mcp->flags = 0;
2647
	rval = qla2x00_mailbox_command(vha, mcp);
L
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2648 2649 2650 2651 2652 2653 2654 2655

	/* Return mailbox statuses. */
	if (mb != NULL) {
		mb[0] = mcp->mb[0];
		mb[1] = mcp->mb[1];
		mb[2] = mcp->mb[2];
		mb[6] = mcp->mb[6];
		mb[7] = mcp->mb[7];
2656 2657
		/* COS retrieved from Get-Port-Database mailbox command. */
		mb[10] = 0;
L
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2658 2659 2660 2661 2662 2663 2664 2665 2666 2667 2668 2669 2670 2671 2672
	}

	if (rval != QLA_SUCCESS) {
		/* RLU tmp code: need to change main mailbox_command function to
		 * return ok even when the mailbox completion value is not
		 * SUCCESS. The caller needs to be responsible to interpret
		 * the return values of this mailbox command if we're not
		 * to change too much of the existing code.
		 */
		if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
		    mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
		    mcp->mb[0] == 0x4006)
			rval = QLA_SUCCESS;

		/*EMPTY*/
2673 2674 2675
		ql_dbg(ql_dbg_mbx, vha, 0x1068,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
L
Linus Torvalds 已提交
2676 2677
	} else {
		/*EMPTY*/
2678 2679
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,
		    "Done %s.\n", __func__);
L
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2680 2681 2682 2683 2684 2685 2686 2687
	}

	return rval;
}

/*
 * qla2x00_login_local_device
 *           Issue login loop port mailbox command.
2688
 *
L
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2689 2690 2691 2692
 * Input:
 *           ha = adapter block pointer.
 *           loop_id = device loop ID.
 *           opt = command options.
2693
 *
L
Linus Torvalds 已提交
2694 2695
 * Returns:
 *            Return status code.
2696
 *
L
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2697 2698
 * Context:
 *            Kernel context.
2699
 *
L
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2700 2701
 */
int
2702
qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
L
Linus Torvalds 已提交
2703 2704 2705 2706 2707
    uint16_t *mb_ret, uint8_t opt)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
2708
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
2709

2710 2711
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,
	    "Entered %s.\n", __func__);
2712

2713
	if (IS_FWI2_CAPABLE(ha))
2714
		return qla24xx_login_fabric(vha, fcport->loop_id,
2715 2716 2717
		    fcport->d_id.b.domain, fcport->d_id.b.area,
		    fcport->d_id.b.al_pa, mb_ret, opt);

L
Linus Torvalds 已提交
2718 2719
	mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
	if (HAS_EXTENDED_IDS(ha))
2720
		mcp->mb[1] = fcport->loop_id;
L
Linus Torvalds 已提交
2721
	else
2722
		mcp->mb[1] = fcport->loop_id << 8;
L
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2723 2724 2725 2726 2727
	mcp->mb[2] = opt;
	mcp->out_mb = MBX_2|MBX_1|MBX_0;
 	mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
	mcp->flags = 0;
2728
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2729 2730 2731 2732 2733 2734 2735 2736 2737 2738 2739 2740 2741 2742 2743 2744 2745 2746 2747

 	/* Return mailbox statuses. */
 	if (mb_ret != NULL) {
 		mb_ret[0] = mcp->mb[0];
 		mb_ret[1] = mcp->mb[1];
 		mb_ret[6] = mcp->mb[6];
 		mb_ret[7] = mcp->mb[7];
 	}

	if (rval != QLA_SUCCESS) {
 		/* AV tmp code: need to change main mailbox_command function to
 		 * return ok even when the mailbox completion value is not
 		 * SUCCESS. The caller needs to be responsible to interpret
 		 * the return values of this mailbox command if we're not
 		 * to change too much of the existing code.
 		 */
 		if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
 			rval = QLA_SUCCESS;

2748 2749 2750
		ql_dbg(ql_dbg_mbx, vha, 0x106b,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]);
L
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2751 2752
	} else {
		/*EMPTY*/
2753 2754
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,
		    "Done %s.\n", __func__);
L
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2755 2756 2757 2758 2759
	}

	return (rval);
}

2760
int
2761
qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2762 2763 2764 2765 2766
    uint8_t area, uint8_t al_pa)
{
	int		rval;
	struct logio_entry_24xx *lg;
	dma_addr_t	lg_dma;
2767
	struct qla_hw_data *ha = vha->hw;
2768
	struct req_que *req;
2769

2770 2771
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,
	    "Entered %s.\n", __func__);
2772

2773
	lg = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2774
	if (lg == NULL) {
2775 2776
		ql_log(ql_log_warn, vha, 0x106e,
		    "Failed to allocate logout IOCB.\n");
2777 2778 2779
		return QLA_MEMORY_ALLOC_FAILED;
	}

2780
	req = vha->req;
2781 2782
	lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
	lg->entry_count = 1;
2783
	lg->handle = make_handle(req->id, lg->handle);
2784 2785
	lg->nport_handle = cpu_to_le16(loop_id);
	lg->control_flags =
2786
	    cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
2787
		LCF_FREE_NPORT);
2788 2789 2790
	lg->port_id[0] = al_pa;
	lg->port_id[1] = area;
	lg->port_id[2] = domain;
2791
	lg->vp_index = vha->vp_idx;
2792 2793
	rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
	    (ha->r_a_tov / 10 * 2) + 2);
2794
	if (rval != QLA_SUCCESS) {
2795 2796
		ql_dbg(ql_dbg_mbx, vha, 0x106f,
		    "Failed to issue logout IOCB (%x).\n", rval);
2797
	} else if (lg->entry_status != 0) {
2798 2799 2800
		ql_dbg(ql_dbg_mbx, vha, 0x1070,
		    "Failed to complete IOCB -- error status (%x).\n",
		    lg->entry_status);
2801
		rval = QLA_FUNCTION_FAILED;
2802
	} else if (lg->comp_status != cpu_to_le16(CS_COMPLETE)) {
2803 2804 2805
		ql_dbg(ql_dbg_mbx, vha, 0x1071,
		    "Failed to complete IOCB -- completion status (%x) "
		    "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2806
		    le32_to_cpu(lg->io_parameter[0]),
2807
		    le32_to_cpu(lg->io_parameter[1]));
2808 2809
	} else {
		/*EMPTY*/
2810 2811
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,
		    "Done %s.\n", __func__);
2812 2813 2814 2815 2816 2817 2818
	}

	dma_pool_free(ha->s_dma_pool, lg, lg_dma);

	return rval;
}

L
Linus Torvalds 已提交
2819 2820 2821 2822 2823 2824 2825 2826 2827 2828 2829 2830 2831 2832 2833 2834 2835
/*
 * qla2x00_fabric_logout
 *	Issue logout fabric port mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	loop_id = device loop ID.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2836
qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2837
    uint8_t area, uint8_t al_pa)
L
Linus Torvalds 已提交
2838 2839 2840 2841 2842
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2843 2844
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2845 2846 2847

	mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
	mcp->out_mb = MBX_1|MBX_0;
2848
	if (HAS_EXTENDED_IDS(vha->hw)) {
L
Linus Torvalds 已提交
2849 2850 2851 2852 2853 2854 2855 2856
		mcp->mb[1] = loop_id;
		mcp->mb[10] = 0;
		mcp->out_mb |= MBX_10;
	} else {
		mcp->mb[1] = loop_id << 8;
	}

	mcp->in_mb = MBX_1|MBX_0;
2857
	mcp->tov = MBX_TOV_SECONDS;
L
Linus Torvalds 已提交
2858
	mcp->flags = 0;
2859
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2860 2861 2862

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2863 2864
		ql_dbg(ql_dbg_mbx, vha, 0x1074,
		    "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]);
L
Linus Torvalds 已提交
2865 2866
	} else {
		/*EMPTY*/
2867 2868
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2869 2870 2871 2872 2873 2874 2875 2876 2877 2878 2879 2880 2881 2882 2883 2884 2885 2886 2887 2888 2889
	}

	return rval;
}

/*
 * qla2x00_full_login_lip
 *	Issue full login LIP mailbox command.
 *
 * Input:
 *	ha = adapter block pointer.
 *	TARGET_QUEUE_LOCK must be released.
 *	ADAPTER_STATE_LOCK must be released.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2890
qla2x00_full_login_lip(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
2891 2892 2893 2894 2895
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2896 2897
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2898 2899

	mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2900
	mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_4 : 0;
2901
	mcp->mb[2] = 0;
L
Linus Torvalds 已提交
2902 2903 2904
	mcp->mb[3] = 0;
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
2905
	mcp->tov = MBX_TOV_SECONDS;
L
Linus Torvalds 已提交
2906
	mcp->flags = 0;
2907
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2908 2909 2910

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2911
		ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);
L
Linus Torvalds 已提交
2912 2913
	} else {
		/*EMPTY*/
2914 2915
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2916 2917 2918 2919 2920 2921 2922 2923 2924 2925 2926 2927 2928 2929 2930 2931 2932 2933
	}

	return rval;
}

/*
 * qla2x00_get_id_list
 *
 * Input:
 *	ha = adapter block pointer.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2934
qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
L
Linus Torvalds 已提交
2935 2936 2937 2938 2939 2940
    uint16_t *entries)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

2941 2942
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
2943 2944 2945 2946 2947

	if (id_list == NULL)
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_GET_ID_LIST;
2948
	mcp->out_mb = MBX_0;
2949
	if (IS_FWI2_CAPABLE(vha->hw)) {
2950 2951 2952 2953
		mcp->mb[2] = MSW(id_list_dma);
		mcp->mb[3] = LSW(id_list_dma);
		mcp->mb[6] = MSW(MSD(id_list_dma));
		mcp->mb[7] = LSW(MSD(id_list_dma));
2954
		mcp->mb[8] = 0;
2955
		mcp->mb[9] = vha->vp_idx;
2956
		mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
2957 2958 2959 2960 2961 2962 2963
	} else {
		mcp->mb[1] = MSW(id_list_dma);
		mcp->mb[2] = LSW(id_list_dma);
		mcp->mb[3] = MSW(MSD(id_list_dma));
		mcp->mb[6] = LSW(MSD(id_list_dma));
		mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
	}
L
Linus Torvalds 已提交
2964
	mcp->in_mb = MBX_1|MBX_0;
2965
	mcp->tov = MBX_TOV_SECONDS;
L
Linus Torvalds 已提交
2966
	mcp->flags = 0;
2967
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
2968 2969 2970

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
2971
		ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);
L
Linus Torvalds 已提交
2972 2973
	} else {
		*entries = mcp->mb[1];
2974 2975
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
2976 2977 2978 2979 2980 2981 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994
	}

	return rval;
}

/*
 * qla2x00_get_resource_cnts
 *	Get current firmware resource counts.
 *
 * Input:
 *	ha = adapter block pointer.
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
2995
qla2x00_get_resource_cnts(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
2996
{
2997
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
2998 2999 3000 3001
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3002 3003
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,
	    "Entered %s.\n", __func__);
L
Linus Torvalds 已提交
3004 3005 3006

	mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
	mcp->out_mb = MBX_0;
3007
	mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
3008 3009
	if (IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
	    IS_QLA27XX(ha) || IS_QLA28XX(ha))
3010
		mcp->in_mb |= MBX_12;
3011
	mcp->tov = MBX_TOV_SECONDS;
L
Linus Torvalds 已提交
3012
	mcp->flags = 0;
3013
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
3014 3015 3016

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
3017 3018
		ql_dbg(ql_dbg_mbx, vha, 0x107d,
		    "Failed mb[0]=%x.\n", mcp->mb[0]);
L
Linus Torvalds 已提交
3019
	} else {
3020
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,
3021 3022 3023 3024
		    "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "
		    "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2],
		    mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10],
		    mcp->mb[11], mcp->mb[12]);
L
Linus Torvalds 已提交
3025

3026 3027 3028 3029 3030 3031 3032 3033
		ha->orig_fw_tgt_xcb_count =  mcp->mb[1];
		ha->cur_fw_tgt_xcb_count = mcp->mb[2];
		ha->cur_fw_xcb_count = mcp->mb[3];
		ha->orig_fw_xcb_count = mcp->mb[6];
		ha->cur_fw_iocb_count = mcp->mb[7];
		ha->orig_fw_iocb_count = mcp->mb[10];
		if (ha->flags.npiv_supported)
			ha->max_npiv_vports = mcp->mb[11];
3034 3035
		if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
		    IS_QLA28XX(ha))
3036
			ha->fw_max_fcf_count = mcp->mb[12];
L
Linus Torvalds 已提交
3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 3056
	}

	return (rval);
}

/*
 * qla2x00_get_fcal_position_map
 *	Get FCAL (LILP) position map using mailbox command
 *
 * Input:
 *	ha = adapter state pointer.
 *	pos_map = buffer pointer (can be NULL).
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
3057
qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
L
Linus Torvalds 已提交
3058 3059 3060 3061 3062 3063
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	char *pmap;
	dma_addr_t pmap_dma;
3064
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
3065

3066 3067
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,
	    "Entered %s.\n", __func__);
3068

3069
	pmap = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
L
Linus Torvalds 已提交
3070
	if (pmap  == NULL) {
3071 3072
		ql_log(ql_log_warn, vha, 0x1080,
		    "Memory alloc failed.\n");
L
Linus Torvalds 已提交
3073 3074 3075 3076 3077 3078 3079 3080 3081 3082 3083 3084 3085
		return QLA_MEMORY_ALLOC_FAILED;
	}

	mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
	mcp->mb[2] = MSW(pmap_dma);
	mcp->mb[3] = LSW(pmap_dma);
	mcp->mb[6] = MSW(MSD(pmap_dma));
	mcp->mb[7] = LSW(MSD(pmap_dma));
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->buf_size = FCAL_MAP_SIZE;
	mcp->flags = MBX_DMA_IN;
	mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
3086
	rval = qla2x00_mailbox_command(vha, mcp);
L
Linus Torvalds 已提交
3087 3088

	if (rval == QLA_SUCCESS) {
3089
		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,
3090 3091 3092 3093
		    "mb0/mb1=%x/%X FC/AL position map size (%x).\n",
		    mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]);
		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,
		    pmap, pmap[0] + 1);
L
Linus Torvalds 已提交
3094 3095 3096 3097 3098 3099 3100

		if (pos_map)
			memcpy(pos_map, pmap, FCAL_MAP_SIZE);
	}
	dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);

	if (rval != QLA_SUCCESS) {
3101
		ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);
L
Linus Torvalds 已提交
3102
	} else {
3103 3104
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,
		    "Done %s.\n", __func__);
L
Linus Torvalds 已提交
3105 3106 3107 3108
	}

	return rval;
}
3109 3110 3111 3112 3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123

/*
 * qla2x00_get_link_status
 *
 * Input:
 *	ha = adapter block pointer.
 *	loop_id = device loop ID.
 *	ret_buf = pointer to link status return buffer.
 *
 * Returns:
 *	0 = success.
 *	BIT_0 = mem alloc error.
 *	BIT_1 = mailbox error.
 */
int
3124
qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
3125
    struct link_statistics *stats, dma_addr_t stats_dma)
3126 3127 3128 3129
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
3130
	uint32_t *iter = (uint32_t *)stats;
3131
	ushort dwords = offsetof(typeof(*stats), link_up_cnt)/sizeof(*iter);
3132
	struct qla_hw_data *ha = vha->hw;
3133

3134 3135
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
	    "Entered %s.\n", __func__);
3136 3137

	mcp->mb[0] = MBC_GET_LINK_STATUS;
3138 3139
	mcp->mb[2] = MSW(LSD(stats_dma));
	mcp->mb[3] = LSW(LSD(stats_dma));
3140 3141
	mcp->mb[6] = MSW(MSD(stats_dma));
	mcp->mb[7] = LSW(MSD(stats_dma));
3142 3143
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
	mcp->in_mb = MBX_0;
3144
	if (IS_FWI2_CAPABLE(ha)) {
3145 3146 3147 3148 3149 3150 3151 3152 3153 3154 3155 3156 3157
		mcp->mb[1] = loop_id;
		mcp->mb[4] = 0;
		mcp->mb[10] = 0;
		mcp->out_mb |= MBX_10|MBX_4|MBX_1;
		mcp->in_mb |= MBX_1;
	} else if (HAS_EXTENDED_IDS(ha)) {
		mcp->mb[1] = loop_id;
		mcp->mb[10] = 0;
		mcp->out_mb |= MBX_10|MBX_1;
	} else {
		mcp->mb[1] = loop_id << 8;
		mcp->out_mb |= MBX_1;
	}
3158
	mcp->tov = MBX_TOV_SECONDS;
3159
	mcp->flags = IOCTL_CMD;
3160
	rval = qla2x00_mailbox_command(vha, mcp);
3161 3162 3163

	if (rval == QLA_SUCCESS) {
		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
3164 3165
			ql_dbg(ql_dbg_mbx, vha, 0x1085,
			    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3166
			rval = QLA_FUNCTION_FAILED;
3167
		} else {
3168
			/* Re-endianize - firmware data is le32. */
3169 3170
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,
			    "Done %s.\n", __func__);
3171 3172
			for ( ; dwords--; iter++)
				le32_to_cpus(iter);
3173 3174 3175
		}
	} else {
		/* Failed. */
3176
		ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval);
3177 3178 3179 3180 3181 3182
	}

	return rval;
}

int
3183
qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
3184
    dma_addr_t stats_dma, uint16_t options)
3185 3186 3187 3188
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
3189
	uint32_t *iter = (uint32_t *)stats;
3190
	ushort dwords = sizeof(*stats)/sizeof(*iter);
3191

3192 3193
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
	    "Entered %s.\n", __func__);
3194

3195 3196
	memset(&mc, 0, sizeof(mc));
	mc.mb[0] = MBC_GET_LINK_PRIV_STATS;
3197 3198
	mc.mb[2] = MSW(LSD(stats_dma));
	mc.mb[3] = LSW(LSD(stats_dma));
3199 3200
	mc.mb[6] = MSW(MSD(stats_dma));
	mc.mb[7] = LSW(MSD(stats_dma));
3201
	mc.mb[8] = dwords;
3202 3203
	mc.mb[9] = vha->vp_idx;
	mc.mb[10] = options;
3204 3205

	rval = qla24xx_send_mb_cmd(vha, &mc);
3206 3207 3208

	if (rval == QLA_SUCCESS) {
		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
3209 3210
			ql_dbg(ql_dbg_mbx, vha, 0x1089,
			    "Failed mb[0]=%x.\n", mcp->mb[0]);
3211
			rval = QLA_FUNCTION_FAILED;
3212
		} else {
3213 3214
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,
			    "Done %s.\n", __func__);
3215
			/* Re-endianize - firmware data is le32. */
3216 3217
			for ( ; dwords--; iter++)
				le32_to_cpus(iter);
3218 3219 3220
		}
	} else {
		/* Failed. */
3221
		ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval);
3222 3223 3224 3225 3226 3227
	}

	return rval;
}

int
3228
qla24xx_abort_command(srb_t *sp)
3229 3230 3231 3232 3233 3234 3235
{
	int		rval;
	unsigned long   flags = 0;

	struct abort_entry_24xx *abt;
	dma_addr_t	abt_dma;
	uint32_t	handle;
3236 3237
	fc_port_t	*fcport = sp->fcport;
	struct scsi_qla_host *vha = fcport->vha;
3238
	struct qla_hw_data *ha = vha->hw;
3239
	struct req_que *req = vha->req;
3240
	struct qla_qpair *qpair = sp->qpair;
3241

3242 3243
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
	    "Entered %s.\n", __func__);
3244

3245
	if (sp->qpair)
3246
		req = sp->qpair->req;
3247
	else
3248
		return QLA_ERR_NO_QPAIR;
3249

3250 3251 3252
	if (ql2xasynctmfenable)
		return qla24xx_async_abort_command(sp);

3253
	spin_lock_irqsave(qpair->qp_lock_ptr, flags);
3254
	for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
3255
		if (req->outstanding_cmds[handle] == sp)
3256 3257
			break;
	}
3258
	spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
3259
	if (handle == req->num_outstanding_cmds) {
3260
		/* Command not found. */
3261
		return QLA_ERR_NOT_FOUND;
3262 3263
	}

3264
	abt = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
3265
	if (abt == NULL) {
3266 3267
		ql_log(ql_log_warn, vha, 0x108d,
		    "Failed to allocate abort IOCB.\n");
3268 3269 3270 3271 3272
		return QLA_MEMORY_ALLOC_FAILED;
	}

	abt->entry_type = ABORT_IOCB_TYPE;
	abt->entry_count = 1;
3273
	abt->handle = make_handle(req->id, abt->handle);
3274
	abt->nport_handle = cpu_to_le16(fcport->loop_id);
3275
	abt->handle_to_abort = make_handle(req->id, handle);
3276 3277 3278
	abt->port_id[0] = fcport->d_id.b.al_pa;
	abt->port_id[1] = fcport->d_id.b.area;
	abt->port_id[2] = fcport->d_id.b.domain;
3279
	abt->vp_index = fcport->vha->vp_idx;
3280 3281

	abt->req_que_no = cpu_to_le16(req->id);
3282 3283
	/* Need to pass original sp */
	qla_nvme_abort_set_option(abt, sp);
3284

3285
	rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
3286
	if (rval != QLA_SUCCESS) {
3287 3288
		ql_dbg(ql_dbg_mbx, vha, 0x108e,
		    "Failed to issue IOCB (%x).\n", rval);
3289
	} else if (abt->entry_status != 0) {
3290 3291 3292
		ql_dbg(ql_dbg_mbx, vha, 0x108f,
		    "Failed to complete IOCB -- error status (%x).\n",
		    abt->entry_status);
3293
		rval = QLA_FUNCTION_FAILED;
3294
	} else if (abt->nport_handle != cpu_to_le16(0)) {
3295 3296 3297
		ql_dbg(ql_dbg_mbx, vha, 0x1090,
		    "Failed to complete IOCB -- completion status (%x).\n",
		    le16_to_cpu(abt->nport_handle));
3298
		if (abt->nport_handle == cpu_to_le16(CS_IOCB_ERROR))
3299 3300 3301
			rval = QLA_FUNCTION_PARAMETER_ERROR;
		else
			rval = QLA_FUNCTION_FAILED;
3302
	} else {
3303 3304
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,
		    "Done %s.\n", __func__);
3305
	}
3306 3307 3308 3309
	if (rval == QLA_SUCCESS)
		qla_nvme_abort_process_comp_status(abt, sp);

	qla_wait_nvme_release_cmd_kref(sp);
3310 3311 3312 3313 3314 3315 3316 3317 3318 3319 3320 3321 3322

	dma_pool_free(ha->s_dma_pool, abt, abt_dma);

	return rval;
}

struct tsk_mgmt_cmd {
	union {
		struct tsk_mgmt_entry tsk;
		struct sts_entry_24xx sts;
	} p;
};

3323 3324
static int
__qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
H
Hannes Reinecke 已提交
3325
    uint64_t l, int tag)
3326
{
3327
	int		rval, rval2;
3328
	struct tsk_mgmt_cmd *tsk;
3329
	struct sts_entry_24xx *sts;
3330
	dma_addr_t	tsk_dma;
3331 3332
	scsi_qla_host_t *vha;
	struct qla_hw_data *ha;
3333
	struct req_que *req;
3334
	struct qla_qpair *qpair;
3335

3336 3337
	vha = fcport->vha;
	ha = vha->hw;
3338
	req = vha->req;
3339

3340 3341
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,
	    "Entered %s.\n", __func__);
3342

3343 3344 3345 3346 3347 3348
	if (vha->vp_idx && vha->qpair) {
		/* NPIV port */
		qpair = vha->qpair;
		req = qpair->req;
	}

3349
	tsk = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
3350
	if (tsk == NULL) {
3351 3352
		ql_log(ql_log_warn, vha, 0x1093,
		    "Failed to allocate task management IOCB.\n");
3353 3354 3355 3356 3357
		return QLA_MEMORY_ALLOC_FAILED;
	}

	tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
	tsk->p.tsk.entry_count = 1;
3358
	tsk->p.tsk.handle = make_handle(req->id, tsk->p.tsk.handle);
3359
	tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
3360
	tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
3361
	tsk->p.tsk.control_flags = cpu_to_le32(type);
3362 3363 3364
	tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
	tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
	tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
3365
	tsk->p.tsk.vp_index = fcport->vha->vp_idx;
3366 3367 3368 3369 3370
	if (type == TCF_LUN_RESET) {
		int_to_scsilun(l, &tsk->p.tsk.lun);
		host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
		    sizeof(tsk->p.tsk.lun));
	}
3371

3372
	sts = &tsk->p.sts;
3373
	rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
3374
	if (rval != QLA_SUCCESS) {
3375 3376
		ql_dbg(ql_dbg_mbx, vha, 0x1094,
		    "Failed to issue %s reset IOCB (%x).\n", name, rval);
3377
	} else if (sts->entry_status != 0) {
3378 3379 3380
		ql_dbg(ql_dbg_mbx, vha, 0x1095,
		    "Failed to complete IOCB -- error status (%x).\n",
		    sts->entry_status);
3381
		rval = QLA_FUNCTION_FAILED;
3382
	} else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
3383 3384 3385
		ql_dbg(ql_dbg_mbx, vha, 0x1096,
		    "Failed to complete IOCB -- completion status (%x).\n",
		    le16_to_cpu(sts->comp_status));
3386
		rval = QLA_FUNCTION_FAILED;
3387 3388 3389
	} else if (le16_to_cpu(sts->scsi_status) &
	    SS_RESPONSE_INFO_LEN_VALID) {
		if (le32_to_cpu(sts->rsp_data_len) < 4) {
3390
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,
3391 3392 3393
			    "Ignoring inconsistent data length -- not enough "
			    "response info (%d).\n",
			    le32_to_cpu(sts->rsp_data_len));
3394
		} else if (sts->data[3]) {
3395 3396 3397
			ql_dbg(ql_dbg_mbx, vha, 0x1098,
			    "Failed to complete IOCB -- response (%x).\n",
			    sts->data[3]);
3398 3399
			rval = QLA_FUNCTION_FAILED;
		}
3400 3401 3402
	}

	/* Issue marker IOCB. */
3403
	rval2 = qla2x00_marker(vha, ha->base_qpair, fcport->loop_id, l,
3404
	    type == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
3405
	if (rval2 != QLA_SUCCESS) {
3406 3407
		ql_dbg(ql_dbg_mbx, vha, 0x1099,
		    "Failed to issue marker IOCB (%x).\n", rval2);
3408
	} else {
3409 3410
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,
		    "Done %s.\n", __func__);
3411 3412
	}

3413
	dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
3414 3415 3416 3417

	return rval;
}

3418
int
H
Hannes Reinecke 已提交
3419
qla24xx_abort_target(struct fc_port *fcport, uint64_t l, int tag)
3420
{
3421 3422 3423 3424 3425
	struct qla_hw_data *ha = fcport->vha->hw;

	if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
		return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);

3426
	return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
3427 3428 3429
}

int
H
Hannes Reinecke 已提交
3430
qla24xx_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
3431
{
3432 3433 3434 3435 3436
	struct qla_hw_data *ha = fcport->vha->hw;

	if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
		return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);

3437
	return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
3438 3439
}

3440
int
3441
qla2x00_system_error(scsi_qla_host_t *vha)
3442 3443 3444 3445
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
3446
	struct qla_hw_data *ha = vha->hw;
3447

3448
	if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
3449 3450
		return QLA_FUNCTION_FAILED;

3451 3452
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,
	    "Entered %s.\n", __func__);
3453 3454 3455 3456 3457 3458

	mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = 5;
	mcp->flags = 0;
3459
	rval = qla2x00_mailbox_command(vha, mcp);
3460 3461

	if (rval != QLA_SUCCESS) {
3462
		ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);
3463
	} else {
3464 3465
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,
		    "Done %s.\n", __func__);
3466 3467 3468 3469 3470
	}

	return rval;
}

3471 3472 3473 3474 3475 3476 3477
int
qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3478
	if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
3479
	    !IS_QLA27XX(vha->hw) && !IS_QLA28XX(vha->hw))
3480 3481 3482 3483 3484 3485 3486
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_WRITE_SERDES;
	mcp->mb[1] = addr;
3487 3488 3489 3490 3491
	if (IS_QLA2031(vha->hw))
		mcp->mb[2] = data & 0xff;
	else
		mcp->mb[2] = data;

3492 3493 3494 3495 3496 3497 3498 3499 3500 3501 3502 3503 3504 3505 3506 3507 3508 3509 3510 3511 3512 3513 3514 3515 3516
	mcp->mb[3] = 0;
	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1183,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1184,
		    "Done %s.\n", __func__);
	}

	return rval;
}

int
qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3517
	if (!IS_QLA25XX(vha->hw) && !IS_QLA2031(vha->hw) &&
3518
	    !IS_QLA27XX(vha->hw) && !IS_QLA28XX(vha->hw))
3519 3520 3521 3522 3523 3524 3525 3526 3527 3528 3529 3530 3531 3532
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_READ_SERDES;
	mcp->mb[1] = addr;
	mcp->mb[3] = 0;
	mcp->out_mb = MBX_3|MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

3533 3534 3535 3536
	if (IS_QLA2031(vha->hw))
		*data = mcp->mb[1] & 0xff;
	else
		*data = mcp->mb[1];
3537 3538 3539 3540 3541 3542 3543 3544 3545 3546 3547 3548

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1186,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1187,
		    "Done %s.\n", __func__);
	}

	return rval;
}

3549 3550 3551 3552 3553 3554 3555 3556 3557 3558
int
qla8044_write_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_QLA8044(vha->hw))
		return QLA_FUNCTION_FAILED;

3559
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x11a0,
3560 3561 3562 3563 3564 3565 3566 3567 3568 3569 3570 3571 3572 3573 3574
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
	mcp->mb[1] = HCS_WRITE_SERDES;
	mcp->mb[3] = LSW(addr);
	mcp->mb[4] = MSW(addr);
	mcp->mb[5] = LSW(data);
	mcp->mb[6] = MSW(data);
	mcp->out_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
3575
		ql_dbg(ql_dbg_mbx, vha, 0x11a1,
3576 3577 3578 3579 3580 3581 3582 3583 3584 3585 3586 3587 3588 3589 3590 3591 3592 3593 3594 3595 3596 3597 3598 3599 3600 3601 3602 3603 3604 3605 3606 3607 3608 3609 3610 3611 3612 3613 3614 3615 3616 3617 3618 3619 3620
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1188,
		    "Done %s.\n", __func__);
	}

	return rval;
}

int
qla8044_read_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t *data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_QLA8044(vha->hw))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1189,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
	mcp->mb[1] = HCS_READ_SERDES;
	mcp->mb[3] = LSW(addr);
	mcp->mb[4] = MSW(addr);
	mcp->out_mb = MBX_4|MBX_3|MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	*data = mcp->mb[2] << 16 | mcp->mb[1];

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x118a,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118b,
		    "Done %s.\n", __func__);
	}

	return rval;
}

3621 3622
/**
 * qla2x00_set_serdes_params() -
3623
 * @vha: HA context
3624 3625 3626
 * @sw_em_1g: serial link options
 * @sw_em_2g: serial link options
 * @sw_em_4g: serial link options
3627 3628 3629 3630
 *
 * Returns
 */
int
3631
qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
3632 3633 3634 3635 3636 3637
    uint16_t sw_em_2g, uint16_t sw_em_4g)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3638 3639
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,
	    "Entered %s.\n", __func__);
3640 3641 3642

	mcp->mb[0] = MBC_SERDES_PARAMS;
	mcp->mb[1] = BIT_0;
3643 3644 3645
	mcp->mb[2] = sw_em_1g | BIT_15;
	mcp->mb[3] = sw_em_2g | BIT_15;
	mcp->mb[4] = sw_em_4g | BIT_15;
3646 3647
	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
3648
	mcp->tov = MBX_TOV_SECONDS;
3649
	mcp->flags = 0;
3650
	rval = qla2x00_mailbox_command(vha, mcp);
3651 3652 3653

	if (rval != QLA_SUCCESS) {
		/*EMPTY*/
3654 3655
		ql_dbg(ql_dbg_mbx, vha, 0x109f,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3656 3657
	} else {
		/*EMPTY*/
3658 3659
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,
		    "Done %s.\n", __func__);
3660 3661 3662 3663
	}

	return rval;
}
3664 3665

int
3666
qla2x00_stop_firmware(scsi_qla_host_t *vha)
3667 3668 3669 3670 3671
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3672
	if (!IS_FWI2_CAPABLE(vha->hw))
3673 3674
		return QLA_FUNCTION_FAILED;

3675 3676
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,
	    "Entered %s.\n", __func__);
3677 3678

	mcp->mb[0] = MBC_STOP_FIRMWARE;
3679 3680
	mcp->mb[1] = 0;
	mcp->out_mb = MBX_1|MBX_0;
3681 3682 3683
	mcp->in_mb = MBX_0;
	mcp->tov = 5;
	mcp->flags = 0;
3684
	rval = qla2x00_mailbox_command(vha, mcp);
3685 3686

	if (rval != QLA_SUCCESS) {
3687
		ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval);
3688 3689
		if (mcp->mb[0] == MBS_INVALID_COMMAND)
			rval = QLA_INVALID_COMMAND;
3690
	} else {
3691 3692
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,
		    "Done %s.\n", __func__);
3693 3694 3695 3696
	}

	return rval;
}
3697 3698

int
3699
qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
3700 3701 3702 3703 3704 3705
    uint16_t buffers)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3706 3707
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,
	    "Entered %s.\n", __func__);
3708

3709
	if (!IS_FWI2_CAPABLE(vha->hw))
3710 3711
		return QLA_FUNCTION_FAILED;

3712 3713 3714
	if (unlikely(pci_channel_offline(vha->hw->pdev)))
		return QLA_FUNCTION_FAILED;

3715
	mcp->mb[0] = MBC_TRACE_CONTROL;
3716 3717 3718 3719 3720 3721 3722 3723
	mcp->mb[1] = TC_EFT_ENABLE;
	mcp->mb[2] = LSW(eft_dma);
	mcp->mb[3] = MSW(eft_dma);
	mcp->mb[4] = LSW(MSD(eft_dma));
	mcp->mb[5] = MSW(MSD(eft_dma));
	mcp->mb[6] = buffers;
	mcp->mb[7] = TC_AEN_DISABLE;
	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3724
	mcp->in_mb = MBX_1|MBX_0;
3725
	mcp->tov = MBX_TOV_SECONDS;
3726
	mcp->flags = 0;
3727
	rval = qla2x00_mailbox_command(vha, mcp);
3728
	if (rval != QLA_SUCCESS) {
3729 3730 3731
		ql_dbg(ql_dbg_mbx, vha, 0x10a5,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3732
	} else {
3733 3734
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,
		    "Done %s.\n", __func__);
3735 3736 3737 3738
	}

	return rval;
}
3739

3740
int
3741
qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
3742 3743 3744 3745 3746
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3747 3748
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,
	    "Entered %s.\n", __func__);
3749

3750
	if (!IS_FWI2_CAPABLE(vha->hw))
3751 3752
		return QLA_FUNCTION_FAILED;

3753 3754 3755
	if (unlikely(pci_channel_offline(vha->hw->pdev)))
		return QLA_FUNCTION_FAILED;

3756 3757 3758 3759
	mcp->mb[0] = MBC_TRACE_CONTROL;
	mcp->mb[1] = TC_EFT_DISABLE;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
3760
	mcp->tov = MBX_TOV_SECONDS;
3761
	mcp->flags = 0;
3762
	rval = qla2x00_mailbox_command(vha, mcp);
3763
	if (rval != QLA_SUCCESS) {
3764 3765 3766
		ql_dbg(ql_dbg_mbx, vha, 0x10a8,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3767
	} else {
3768 3769
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,
		    "Done %s.\n", __func__);
3770 3771 3772 3773 3774
	}

	return rval;
}

3775
int
3776
qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
3777 3778 3779 3780 3781 3782
    uint16_t buffers, uint16_t *mb, uint32_t *dwords)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3783 3784
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,
	    "Entered %s.\n", __func__);
3785

3786
	if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
3787 3788
	    !IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw) &&
	    !IS_QLA28XX(vha->hw))
3789 3790
		return QLA_FUNCTION_FAILED;

3791 3792 3793
	if (unlikely(pci_channel_offline(vha->hw->pdev)))
		return QLA_FUNCTION_FAILED;

3794 3795 3796 3797 3798 3799 3800 3801 3802 3803 3804 3805 3806 3807
	mcp->mb[0] = MBC_TRACE_CONTROL;
	mcp->mb[1] = TC_FCE_ENABLE;
	mcp->mb[2] = LSW(fce_dma);
	mcp->mb[3] = MSW(fce_dma);
	mcp->mb[4] = LSW(MSD(fce_dma));
	mcp->mb[5] = MSW(MSD(fce_dma));
	mcp->mb[6] = buffers;
	mcp->mb[7] = TC_AEN_DISABLE;
	mcp->mb[8] = 0;
	mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
	mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
	    MBX_1|MBX_0;
	mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3808
	mcp->tov = MBX_TOV_SECONDS;
3809
	mcp->flags = 0;
3810
	rval = qla2x00_mailbox_command(vha, mcp);
3811
	if (rval != QLA_SUCCESS) {
3812 3813 3814
		ql_dbg(ql_dbg_mbx, vha, 0x10ab,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3815
	} else {
3816 3817
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,
		    "Done %s.\n", __func__);
3818 3819 3820 3821

		if (mb)
			memcpy(mb, mcp->mb, 8 * sizeof(*mb));
		if (dwords)
3822
			*dwords = buffers;
3823 3824 3825 3826 3827 3828
	}

	return rval;
}

int
3829
qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
3830 3831 3832 3833 3834
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3835 3836
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,
	    "Entered %s.\n", __func__);
3837

3838
	if (!IS_FWI2_CAPABLE(vha->hw))
3839 3840
		return QLA_FUNCTION_FAILED;

3841 3842 3843
	if (unlikely(pci_channel_offline(vha->hw->pdev)))
		return QLA_FUNCTION_FAILED;

3844 3845 3846 3847 3848 3849
	mcp->mb[0] = MBC_TRACE_CONTROL;
	mcp->mb[1] = TC_FCE_DISABLE;
	mcp->mb[2] = TC_FCE_DISABLE_TRACE;
	mcp->out_mb = MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
	    MBX_1|MBX_0;
3850
	mcp->tov = MBX_TOV_SECONDS;
3851
	mcp->flags = 0;
3852
	rval = qla2x00_mailbox_command(vha, mcp);
3853
	if (rval != QLA_SUCCESS) {
3854 3855 3856
		ql_dbg(ql_dbg_mbx, vha, 0x10ae,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
3857
	} else {
3858 3859
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,
		    "Done %s.\n", __func__);
3860 3861 3862 3863 3864 3865 3866 3867 3868 3869 3870 3871 3872 3873 3874 3875

		if (wr)
			*wr = (uint64_t) mcp->mb[5] << 48 |
			    (uint64_t) mcp->mb[4] << 32 |
			    (uint64_t) mcp->mb[3] << 16 |
			    (uint64_t) mcp->mb[2];
		if (rd)
			*rd = (uint64_t) mcp->mb[9] << 48 |
			    (uint64_t) mcp->mb[8] << 32 |
			    (uint64_t) mcp->mb[7] << 16 |
			    (uint64_t) mcp->mb[6];
	}

	return rval;
}

3876 3877 3878 3879 3880 3881 3882 3883
int
qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
	uint16_t *port_speed, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3884 3885
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,
	    "Entered %s.\n", __func__);
3886

3887 3888 3889 3890 3891 3892 3893 3894 3895 3896 3897 3898 3899 3900
	if (!IS_IIDMA_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_PORT_PARAMS;
	mcp->mb[1] = loop_id;
	mcp->mb[2] = mcp->mb[3] = 0;
	mcp->mb[9] = vha->vp_idx;
	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	/* Return mailbox statuses. */
3901
	if (mb) {
3902 3903 3904 3905 3906 3907
		mb[0] = mcp->mb[0];
		mb[1] = mcp->mb[1];
		mb[3] = mcp->mb[3];
	}

	if (rval != QLA_SUCCESS) {
3908
		ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);
3909
	} else {
3910 3911
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,
		    "Done %s.\n", __func__);
3912 3913 3914 3915 3916 3917 3918
		if (port_speed)
			*port_speed = mcp->mb[3];
	}

	return rval;
}

3919
int
3920
qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3921 3922 3923 3924 3925 3926
    uint16_t port_speed, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

3927 3928
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,
	    "Entered %s.\n", __func__);
3929

3930
	if (!IS_IIDMA_CAPABLE(vha->hw))
3931 3932 3933 3934 3935
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_PORT_PARAMS;
	mcp->mb[1] = loop_id;
	mcp->mb[2] = BIT_0;
3936
	mcp->mb[3] = port_speed & 0x3F;
3937 3938 3939
	mcp->mb[9] = vha->vp_idx;
	mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_1|MBX_0;
3940
	mcp->tov = MBX_TOV_SECONDS;
3941
	mcp->flags = 0;
3942
	rval = qla2x00_mailbox_command(vha, mcp);
3943 3944

	/* Return mailbox statuses. */
3945
	if (mb) {
3946 3947 3948 3949 3950 3951
		mb[0] = mcp->mb[0];
		mb[1] = mcp->mb[1];
		mb[3] = mcp->mb[3];
	}

	if (rval != QLA_SUCCESS) {
3952 3953
		ql_dbg(ql_dbg_mbx, vha, 0x10b4,
		    "Failed=%x.\n", rval);
3954
	} else {
3955 3956
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,
		    "Done %s.\n", __func__);
3957 3958 3959 3960
	}

	return rval;
}
3961 3962

void
3963
qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
3964 3965
	struct vp_rpt_id_entry_24xx *rptid_entry)
{
3966
	struct qla_hw_data *ha = vha->hw;
3967
	scsi_qla_host_t *vp = NULL;
3968
	unsigned long   flags;
3969
	int found;
3970
	port_id_t id;
3971
	struct fc_port *fcport;
3972

3973 3974
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,
	    "Entered %s.\n", __func__);
3975

3976 3977 3978
	if (rptid_entry->entry_status != 0)
		return;

3979 3980 3981 3982
	id.b.domain = rptid_entry->port_id[2];
	id.b.area   = rptid_entry->port_id[1];
	id.b.al_pa  = rptid_entry->port_id[0];
	id.b.rsvd_1 = 0;
3983
	ha->flags.n2n_ae = 0;
3984

3985
	if (rptid_entry->format == 0) {
3986
		/* loop */
3987
		ql_dbg(ql_dbg_async, vha, 0x10b7,
3988
		    "Format 0 : Number of VPs setup %d, number of "
3989 3990
		    "VPs acquired %d.\n", rptid_entry->vp_setup,
		    rptid_entry->vp_acquired);
3991
		ql_dbg(ql_dbg_async, vha, 0x10b8,
3992 3993 3994
		    "Primary port id %02x%02x%02x.\n",
		    rptid_entry->port_id[2], rptid_entry->port_id[1],
		    rptid_entry->port_id[0]);
3995
		ha->current_topology = ISP_CFG_NL;
3996
		qlt_update_host_map(vha, id);
3997

3998
	} else if (rptid_entry->format == 1) {
3999
		/* fabric */
4000
		ql_dbg(ql_dbg_async, vha, 0x10b9,
4001
		    "Format 1: VP[%d] enabled - status %d - with "
4002 4003
		    "port id %02x%02x%02x.\n", rptid_entry->vp_idx,
			rptid_entry->vp_status,
4004
		    rptid_entry->port_id[2], rptid_entry->port_id[1],
4005
		    rptid_entry->port_id[0]);
4006 4007 4008 4009 4010 4011 4012 4013
		ql_dbg(ql_dbg_async, vha, 0x5075,
		   "Format 1: Remote WWPN %8phC.\n",
		   rptid_entry->u.f1.port_name);

		ql_dbg(ql_dbg_async, vha, 0x5075,
		   "Format 1: WWPN %8phC.\n",
		   vha->port_name);

4014 4015 4016 4017
		switch (rptid_entry->u.f1.flags & TOPO_MASK) {
		case TOPO_N2N:
			ha->current_topology = ISP_CFG_N;
			spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
4018 4019 4020 4021
			list_for_each_entry(fcport, &vha->vp_fcports, list) {
				fcport->scan_state = QLA_FCPORT_SCAN;
				fcport->n2n_flag = 0;
			}
4022 4023 4024 4025 4026 4027 4028 4029 4030 4031 4032 4033 4034 4035 4036 4037 4038
			id.b24 = 0;
			if (wwn_to_u64(vha->port_name) >
			    wwn_to_u64(rptid_entry->u.f1.port_name)) {
				vha->d_id.b24 = 0;
				vha->d_id.b.al_pa = 1;
				ha->flags.n2n_bigger = 1;

				id.b.al_pa = 2;
				ql_dbg(ql_dbg_async, vha, 0x5075,
				    "Format 1: assign local id %x remote id %x\n",
				    vha->d_id.b24, id.b24);
			} else {
				ql_dbg(ql_dbg_async, vha, 0x5075,
				    "Format 1: Remote login - Waiting for WWPN %8phC.\n",
				    rptid_entry->u.f1.port_name);
				ha->flags.n2n_bigger = 0;
			}
4039

4040 4041 4042 4043
			fcport = qla2x00_find_fcport_by_wwpn(vha,
			    rptid_entry->u.f1.port_name, 1);
			spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);

4044

4045 4046
			if (fcport) {
				fcport->plogi_nack_done_deadline = jiffies + HZ;
4047 4048
				fcport->dm_login_expire = jiffies +
					QLA_N2N_WAIT_TIME * HZ;
4049
				fcport->scan_state = QLA_FCPORT_FOUND;
4050
				fcport->n2n_flag = 1;
4051
				fcport->keep_nport_handle = 1;
4052
				fcport->login_retry = vha->hw->login_retry_count;
4053 4054 4055
				fcport->fc4_type = FS_FC4TYPE_FCP;
				if (vha->flags.nvme_enabled)
					fcport->fc4_type |= FS_FC4TYPE_NVME;
4056

4057 4058 4059 4060 4061
				if (wwn_to_u64(vha->port_name) >
				    wwn_to_u64(fcport->port_name)) {
					fcport->d_id = id;
				}

4062 4063 4064 4065 4066 4067 4068 4069 4070 4071 4072
				switch (fcport->disc_state) {
				case DSC_DELETED:
					set_bit(RELOGIN_NEEDED,
					    &vha->dpc_flags);
					break;
				case DSC_DELETE_PEND:
					break;
				default:
					qlt_schedule_sess_for_deletion(fcport);
					break;
				}
4073
			} else {
4074 4075 4076 4077
				qla24xx_post_newsess_work(vha, &id,
				    rptid_entry->u.f1.port_name,
				    rptid_entry->u.f1.node_name,
				    NULL,
4078
				    FS_FCP_IS_N2N);
4079 4080
			}

4081 4082
			/* if our portname is higher then initiate N2N login */

4083 4084
			set_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags);
			return;
4085 4086 4087 4088 4089 4090 4091 4092
		case TOPO_FL:
			ha->current_topology = ISP_CFG_FL;
			break;
		case TOPO_F:
			ha->current_topology = ISP_CFG_F;
			break;
		default:
			break;
4093
		}
4094

4095 4096
		ha->flags.gpsc_supported = 1;
		ha->current_topology = ISP_CFG_F;
4097
		/* buffer to buffer credit flag */
4098 4099 4100 4101 4102 4103 4104 4105
		vha->flags.bbcr_enable = (rptid_entry->u.f1.bbcr & 0xf) != 0;

		if (rptid_entry->vp_idx == 0) {
			if (rptid_entry->vp_status == VP_STAT_COMPL) {
				/* FA-WWN is only for physical port */
				if (qla_ini_mode_enabled(vha) &&
				    ha->flags.fawwpn_enabled &&
				    (rptid_entry->u.f1.flags &
4106
				     BIT_6)) {
4107 4108 4109 4110
					memcpy(vha->port_name,
					    rptid_entry->u.f1.port_name,
					    WWN_SIZE);
				}
4111

4112
				qlt_update_host_map(vha, id);
4113
			}
4114 4115 4116 4117 4118 4119 4120 4121 4122 4123

			set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
			set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
		} else {
			if (rptid_entry->vp_status != VP_STAT_COMPL &&
				rptid_entry->vp_status != VP_STAT_ID_CHG) {
				ql_dbg(ql_dbg_mbx, vha, 0x10ba,
				    "Could not acquire ID for VP[%d].\n",
				    rptid_entry->vp_idx);
				return;
4124
			}
4125

4126 4127 4128 4129 4130 4131 4132 4133 4134
			found = 0;
			spin_lock_irqsave(&ha->vport_slock, flags);
			list_for_each_entry(vp, &ha->vp_list, list) {
				if (rptid_entry->vp_idx == vp->vp_idx) {
					found = 1;
					break;
				}
			}
			spin_unlock_irqrestore(&ha->vport_slock, flags);
4135

4136 4137
			if (!found)
				return;
4138

4139
			qlt_update_host_map(vp, id);
4140

4141 4142 4143 4144 4145 4146 4147 4148
			/*
			 * Cannot configure here as we are still sitting on the
			 * response queue. Handle it in dpc context.
			 */
			set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
			set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
			set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
		}
4149
		set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
4150
		qla2xxx_wake_dpc(vha);
4151
	} else if (rptid_entry->format == 2) {
4152
		ql_dbg(ql_dbg_async, vha, 0x505f,
4153 4154 4155 4156
		    "RIDA: format 2/N2N Primary port id %02x%02x%02x.\n",
		    rptid_entry->port_id[2], rptid_entry->port_id[1],
		    rptid_entry->port_id[0]);

4157
		ql_dbg(ql_dbg_async, vha, 0x5075,
4158 4159 4160 4161
		    "N2N: Remote WWPN %8phC.\n",
		    rptid_entry->u.f2.port_name);

		/* N2N.  direct connect */
4162 4163
		ha->current_topology = ISP_CFG_N;
		ha->flags.rida_fmt2 = 1;
4164 4165 4166 4167
		vha->d_id.b.domain = rptid_entry->port_id[2];
		vha->d_id.b.area = rptid_entry->port_id[1];
		vha->d_id.b.al_pa = rptid_entry->port_id[0];

4168
		ha->flags.n2n_ae = 1;
4169 4170 4171
		spin_lock_irqsave(&ha->vport_slock, flags);
		qlt_update_vp_map(vha, SET_AL_PA);
		spin_unlock_irqrestore(&ha->vport_slock, flags);
4172 4173 4174

		list_for_each_entry(fcport, &vha->vp_fcports, list) {
			fcport->scan_state = QLA_FCPORT_SCAN;
4175
			fcport->n2n_flag = 0;
4176 4177 4178 4179 4180 4181
		}

		fcport = qla2x00_find_fcport_by_wwpn(vha,
		    rptid_entry->u.f2.port_name, 1);

		if (fcport) {
4182
			fcport->login_retry = vha->hw->login_retry_count;
4183 4184
			fcport->plogi_nack_done_deadline = jiffies + HZ;
			fcport->scan_state = QLA_FCPORT_FOUND;
4185
			fcport->keep_nport_handle = 1;
4186 4187 4188 4189 4190 4191 4192
			fcport->n2n_flag = 1;
			fcport->d_id.b.domain =
				rptid_entry->u.f2.remote_nport_id[2];
			fcport->d_id.b.area =
				rptid_entry->u.f2.remote_nport_id[1];
			fcport->d_id.b.al_pa =
				rptid_entry->u.f2.remote_nport_id[0];
4193 4194 4195 4196 4197 4198 4199 4200 4201 4202

			/*
			 * For the case where remote port sending PRLO, FW
			 * sends up RIDA Format 2 as an indication of session
			 * loss. In other word, FW state change from PRLI
			 * complete back to PLOGI complete. Delete the
			 * session and let relogin drive the reconnect.
			 */
			if (atomic_read(&fcport->state) == FCS_ONLINE)
				qlt_schedule_sess_for_deletion(fcport);
4203
		}
4204 4205 4206 4207 4208 4209 4210 4211 4212 4213 4214 4215 4216 4217 4218 4219 4220 4221 4222 4223 4224 4225
	}
}

/*
 * qla24xx_modify_vp_config
 *	Change VP configuration for vha
 *
 * Input:
 *	vha = adapter block pointer.
 *
 * Returns:
 *	qla2xxx local function return status code.
 *
 * Context:
 *	Kernel context.
 */
int
qla24xx_modify_vp_config(scsi_qla_host_t *vha)
{
	int		rval;
	struct vp_config_entry_24xx *vpmod;
	dma_addr_t	vpmod_dma;
4226 4227
	struct qla_hw_data *ha = vha->hw;
	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
4228 4229 4230

	/* This can be called by the parent */

4231 4232
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,
	    "Entered %s.\n", __func__);
4233

4234
	vpmod = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
4235
	if (!vpmod) {
4236 4237
		ql_log(ql_log_warn, vha, 0x10bc,
		    "Failed to allocate modify VP IOCB.\n");
4238 4239 4240 4241 4242 4243 4244 4245 4246
		return QLA_MEMORY_ALLOC_FAILED;
	}

	vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
	vpmod->entry_count = 1;
	vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
	vpmod->vp_count = 1;
	vpmod->vp_index1 = vha->vp_idx;
	vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
4247 4248 4249

	qlt_modify_vp_config(vha, vpmod);

4250 4251 4252 4253
	memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
	memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
	vpmod->entry_count = 1;

4254
	rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
4255
	if (rval != QLA_SUCCESS) {
4256 4257
		ql_dbg(ql_dbg_mbx, vha, 0x10bd,
		    "Failed to issue VP config IOCB (%x).\n", rval);
4258
	} else if (vpmod->comp_status != 0) {
4259 4260 4261
		ql_dbg(ql_dbg_mbx, vha, 0x10be,
		    "Failed to complete IOCB -- error status (%x).\n",
		    vpmod->comp_status);
4262
		rval = QLA_FUNCTION_FAILED;
4263
	} else if (vpmod->comp_status != cpu_to_le16(CS_COMPLETE)) {
4264 4265 4266
		ql_dbg(ql_dbg_mbx, vha, 0x10bf,
		    "Failed to complete IOCB -- completion status (%x).\n",
		    le16_to_cpu(vpmod->comp_status));
4267 4268 4269
		rval = QLA_FUNCTION_FAILED;
	} else {
		/* EMPTY */
4270 4271
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,
		    "Done %s.\n", __func__);
4272 4273
		fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
	}
4274
	dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
4275 4276 4277 4278 4279 4280 4281 4282 4283 4284 4285 4286 4287 4288 4289 4290 4291 4292 4293 4294 4295 4296 4297 4298 4299 4300

	return rval;
}

/*
 * qla2x00_send_change_request
 *	Receive or disable RSCN request from fabric controller
 *
 * Input:
 *	ha = adapter block pointer
 *	format = registration format:
 *		0 - Reserved
 *		1 - Fabric detected registration
 *		2 - N_port detected registration
 *		3 - Full registration
 *		FF - clear registration
 *	vp_idx = Virtual port index
 *
 * Returns:
 *	qla2x00 local function return status code.
 *
 * Context:
 *	Kernel Context
 */

int
4301
qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
4302 4303 4304 4305 4306 4307
			    uint16_t vp_idx)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4308 4309
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,
	    "Entered %s.\n", __func__);
4310

4311 4312 4313 4314 4315 4316 4317
	mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
	mcp->mb[1] = format;
	mcp->mb[9] = vp_idx;
	mcp->out_mb = MBX_9|MBX_1|MBX_0;
	mcp->in_mb = MBX_0|MBX_1;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
4318
	rval = qla2x00_mailbox_command(vha, mcp);
4319 4320 4321 4322 4323 4324 4325 4326 4327 4328

	if (rval == QLA_SUCCESS) {
		if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
			rval = BIT_1;
		}
	} else
		rval = BIT_1;

	return rval;
}
4329 4330

int
4331
qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
4332 4333 4334 4335 4336 4337
    uint32_t size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4338 4339
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,
	    "Entered %s.\n", __func__);
4340

4341
	if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
4342 4343
		mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
		mcp->mb[8] = MSW(addr);
4344 4345
		mcp->mb[10] = 0;
		mcp->out_mb = MBX_10|MBX_8|MBX_0;
4346 4347 4348 4349 4350 4351 4352 4353 4354 4355
	} else {
		mcp->mb[0] = MBC_DUMP_RISC_RAM;
		mcp->out_mb = MBX_0;
	}
	mcp->mb[1] = LSW(addr);
	mcp->mb[2] = MSW(req_dma);
	mcp->mb[3] = LSW(req_dma);
	mcp->mb[6] = MSW(MSD(req_dma));
	mcp->mb[7] = LSW(MSD(req_dma));
	mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
4356
	if (IS_FWI2_CAPABLE(vha->hw)) {
4357 4358 4359 4360 4361 4362 4363 4364 4365
		mcp->mb[4] = MSW(size);
		mcp->mb[5] = LSW(size);
		mcp->out_mb |= MBX_5|MBX_4;
	} else {
		mcp->mb[4] = LSW(size);
		mcp->out_mb |= MBX_4;
	}

	mcp->in_mb = MBX_0;
4366
	mcp->tov = MBX_TOV_SECONDS;
4367
	mcp->flags = 0;
4368
	rval = qla2x00_mailbox_command(vha, mcp);
4369 4370

	if (rval != QLA_SUCCESS) {
4371 4372
		ql_dbg(ql_dbg_mbx, vha, 0x1008,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4373
	} else {
4374 4375
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,
		    "Done %s.\n", __func__);
4376 4377 4378 4379
	}

	return rval;
}
4380 4381 4382 4383 4384 4385 4386 4387 4388 4389
/* 84XX Support **************************************************************/

struct cs84xx_mgmt_cmd {
	union {
		struct verify_chip_entry_84xx req;
		struct verify_chip_rsp_84xx rsp;
	} p;
};

int
4390
qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
4391 4392 4393 4394 4395 4396
{
	int rval, retry;
	struct cs84xx_mgmt_cmd *mn;
	dma_addr_t mn_dma;
	uint16_t options;
	unsigned long flags;
4397
	struct qla_hw_data *ha = vha->hw;
4398

4399 4400
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,
	    "Entered %s.\n", __func__);
4401 4402 4403 4404 4405 4406 4407 4408 4409 4410 4411 4412 4413 4414

	mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
	if (mn == NULL) {
		return QLA_MEMORY_ALLOC_FAILED;
	}

	/* Force Update? */
	options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
	/* Diagnostic firmware? */
	/* options |= MENLO_DIAG_FW; */
	/* We update the firmware with only one data sequence. */
	options |= VCO_END_OF_DATA;

	do {
4415
		retry = 0;
4416 4417 4418 4419 4420
		memset(mn, 0, sizeof(*mn));
		mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
		mn->p.req.entry_count = 1;
		mn->p.req.options = cpu_to_le16(options);

4421 4422 4423
		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c,
		    "Dump of Verify Request.\n");
		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e,
4424
		    mn, sizeof(*mn));
4425

4426
		rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
4427
		if (rval != QLA_SUCCESS) {
4428 4429
			ql_dbg(ql_dbg_mbx, vha, 0x10cb,
			    "Failed to issue verify IOCB (%x).\n", rval);
4430 4431 4432
			goto verify_done;
		}

4433 4434 4435
		ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110,
		    "Dump of Verify Response.\n");
		ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118,
4436
		    mn, sizeof(*mn));
4437 4438 4439 4440

		status[0] = le16_to_cpu(mn->p.rsp.comp_status);
		status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
		    le16_to_cpu(mn->p.rsp.failure_code) : 0;
4441
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,
4442
		    "cs=%x fc=%x.\n", status[0], status[1]);
4443 4444 4445 4446

		if (status[0] != CS_COMPLETE) {
			rval = QLA_FUNCTION_FAILED;
			if (!(options & VCO_DONT_UPDATE_FW)) {
4447 4448 4449
				ql_dbg(ql_dbg_mbx, vha, 0x10cf,
				    "Firmware update failed. Retrying "
				    "without update firmware.\n");
4450 4451 4452 4453 4454
				options |= VCO_DONT_UPDATE_FW;
				options &= ~VCO_FORCE_UPDATE;
				retry = 1;
			}
		} else {
4455
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,
4456 4457
			    "Firmware updated to %x.\n",
			    le32_to_cpu(mn->p.rsp.fw_ver));
4458 4459 4460 4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471

			/* NOTE: we only update OP firmware. */
			spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
			ha->cs84xx->op_fw_version =
			    le32_to_cpu(mn->p.rsp.fw_ver);
			spin_unlock_irqrestore(&ha->cs84xx->access_lock,
			    flags);
		}
	} while (retry);

verify_done:
	dma_pool_free(ha->s_dma_pool, mn, mn_dma);

	if (rval != QLA_SUCCESS) {
4472 4473
		ql_dbg(ql_dbg_mbx, vha, 0x10d1,
		    "Failed=%x.\n", rval);
4474
	} else {
4475 4476
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,
		    "Done %s.\n", __func__);
4477 4478 4479 4480
	}

	return rval;
}
4481 4482

int
4483
qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
4484 4485 4486 4487 4488 4489 4490
{
	int rval;
	unsigned long flags;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

4491 4492 4493
	if (!ha->flags.fw_started)
		return QLA_SUCCESS;

4494 4495
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
	    "Entered %s.\n", __func__);
4496

4497 4498 4499
	if (IS_SHADOW_REG_CAPABLE(ha))
		req->options |= BIT_13;

4500
	mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4501
	mcp->mb[1] = req->options;
4502 4503 4504 4505 4506 4507 4508 4509 4510 4511
	mcp->mb[2] = MSW(LSD(req->dma));
	mcp->mb[3] = LSW(LSD(req->dma));
	mcp->mb[6] = MSW(MSD(req->dma));
	mcp->mb[7] = LSW(MSD(req->dma));
	mcp->mb[5] = req->length;
	if (req->rsp)
		mcp->mb[10] = req->rsp->id;
	mcp->mb[12] = req->qos;
	mcp->mb[11] = req->vp_idx;
	mcp->mb[13] = req->rid;
4512
	if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
4513
		mcp->mb[15] = 0;
4514 4515 4516 4517 4518

	mcp->mb[4] = req->id;
	/* que in ptr index */
	mcp->mb[8] = 0;
	/* que out ptr index */
4519
	mcp->mb[9] = *req->out_ptr = 0;
4520 4521 4522 4523
	mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
			MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->flags = MBX_DMA_OUT;
4524 4525
	mcp->tov = MBX_TOV_SECONDS * 2;

4526 4527
	if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
	    IS_QLA28XX(ha))
4528
		mcp->in_mb |= MBX_1;
4529
	if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
4530 4531 4532 4533
		mcp->out_mb |= MBX_15;
		/* debug q create issue in SR-IOV */
		mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
	}
4534 4535

	spin_lock_irqsave(&ha->hardware_lock, flags);
4536
	if (!(req->options & BIT_0)) {
4537
		wrt_reg_dword(req->req_q_in, 0);
4538
		if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
4539
			wrt_reg_dword(req->req_q_out, 0);
4540 4541 4542
	}
	spin_unlock_irqrestore(&ha->hardware_lock, flags);

4543
	rval = qla2x00_mailbox_command(vha, mcp);
4544 4545 4546 4547
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x10d4,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
4548 4549
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,
		    "Done %s.\n", __func__);
4550 4551
	}

4552 4553 4554 4555
	return rval;
}

int
4556
qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
4557 4558 4559 4560 4561 4562 4563
{
	int rval;
	unsigned long flags;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

4564 4565 4566
	if (!ha->flags.fw_started)
		return QLA_SUCCESS;

4567 4568
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
	    "Entered %s.\n", __func__);
4569

4570 4571 4572
	if (IS_SHADOW_REG_CAPABLE(ha))
		rsp->options |= BIT_13;

4573
	mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
4574
	mcp->mb[1] = rsp->options;
4575 4576 4577 4578 4579
	mcp->mb[2] = MSW(LSD(rsp->dma));
	mcp->mb[3] = LSW(LSD(rsp->dma));
	mcp->mb[6] = MSW(MSD(rsp->dma));
	mcp->mb[7] = LSW(MSD(rsp->dma));
	mcp->mb[5] = rsp->length;
4580
	mcp->mb[14] = rsp->msix->entry;
4581
	mcp->mb[13] = rsp->rid;
4582
	if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
4583
		mcp->mb[15] = 0;
4584 4585 4586

	mcp->mb[4] = rsp->id;
	/* que in ptr index */
4587
	mcp->mb[8] = *rsp->in_ptr = 0;
4588 4589
	/* que out ptr index */
	mcp->mb[9] = 0;
4590
	mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
4591 4592 4593
			|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->flags = MBX_DMA_OUT;
4594 4595 4596 4597 4598
	mcp->tov = MBX_TOV_SECONDS * 2;

	if (IS_QLA81XX(ha)) {
		mcp->out_mb |= MBX_12|MBX_11|MBX_10;
		mcp->in_mb |= MBX_1;
4599
	} else if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
4600 4601 4602 4603 4604
		mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
		mcp->in_mb |= MBX_1;
		/* debug q create issue in SR-IOV */
		mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
	}
4605 4606

	spin_lock_irqsave(&ha->hardware_lock, flags);
4607
	if (!(rsp->options & BIT_0)) {
4608
		wrt_reg_dword(rsp->rsp_q_out, 0);
4609
		if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
4610
			wrt_reg_dword(rsp->rsp_q_in, 0);
4611 4612 4613 4614
	}

	spin_unlock_irqrestore(&ha->hardware_lock, flags);

4615
	rval = qla2x00_mailbox_command(vha, mcp);
4616 4617 4618 4619
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x10d7,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
4620 4621
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,
		    "Done %s.\n", __func__);
4622 4623
	}

4624 4625 4626
	return rval;
}

4627 4628 4629 4630 4631 4632 4633
int
qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4634 4635
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,
	    "Entered %s.\n", __func__);
4636 4637 4638 4639 4640 4641 4642 4643 4644 4645

	mcp->mb[0] = MBC_IDC_ACK;
	memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
	mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4646 4647
		ql_dbg(ql_dbg_mbx, vha, 0x10da,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4648
	} else {
4649 4650
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,
		    "Done %s.\n", __func__);
4651 4652 4653 4654
	}

	return rval;
}
4655 4656 4657 4658 4659 4660 4661 4662

int
qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4663 4664
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,
	    "Entered %s.\n", __func__);
4665

4666
	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4667
	    !IS_QLA27XX(vha->hw) && !IS_QLA28XX(vha->hw))
4668 4669 4670 4671 4672 4673 4674 4675 4676 4677 4678
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
	mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4679 4680 4681
		ql_dbg(ql_dbg_mbx, vha, 0x10dd,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
4682
	} else {
4683 4684
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,
		    "Done %s.\n", __func__);
4685 4686 4687 4688 4689 4690 4691 4692 4693 4694 4695 4696 4697
		*sector_size = mcp->mb[1];
	}

	return rval;
}

int
qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4698
	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4699
	    !IS_QLA27XX(vha->hw) && !IS_QLA28XX(vha->hw))
4700 4701
		return QLA_FUNCTION_FAILED;

4702 4703
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,
	    "Entered %s.\n", __func__);
4704 4705 4706 4707 4708 4709 4710 4711 4712 4713 4714

	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
	mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
	    FAC_OPT_CMD_WRITE_PROTECT;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4715 4716 4717
		ql_dbg(ql_dbg_mbx, vha, 0x10e0,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
4718
	} else {
4719 4720
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,
		    "Done %s.\n", __func__);
4721 4722 4723 4724 4725 4726 4727 4728 4729 4730 4731 4732
	}

	return rval;
}

int
qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4733
	if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4734
	    !IS_QLA27XX(vha->hw) && !IS_QLA28XX(vha->hw))
4735 4736
		return QLA_FUNCTION_FAILED;

4737 4738
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
	    "Entered %s.\n", __func__);
4739 4740 4741 4742 4743 4744 4745 4746 4747 4748 4749 4750 4751 4752

	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
	mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
	mcp->mb[2] = LSW(start);
	mcp->mb[3] = MSW(start);
	mcp->mb[4] = LSW(finish);
	mcp->mb[5] = MSW(finish);
	mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4753 4754 4755
		ql_dbg(ql_dbg_mbx, vha, 0x10e3,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4756
	} else {
4757 4758
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
		    "Done %s.\n", __func__);
4759 4760 4761 4762
	}

	return rval;
}
4763

4764 4765 4766 4767 4768 4769 4770 4771 4772 4773 4774 4775 4776 4777 4778 4779 4780 4781 4782 4783 4784 4785 4786 4787 4788 4789 4790 4791 4792 4793 4794 4795 4796 4797 4798 4799
int
qla81xx_fac_semaphore_access(scsi_qla_host_t *vha, int lock)
{
	int rval = QLA_SUCCESS;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

	if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
	    !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
		return rval;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
	mcp->mb[1] = (lock ? FAC_OPT_CMD_LOCK_SEMAPHORE :
	    FAC_OPT_CMD_UNLOCK_SEMAPHORE);
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x10e3,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
		    "Done %s.\n", __func__);
	}

	return rval;
}

4800 4801 4802 4803 4804 4805 4806
int
qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
{
	int rval = 0;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

4807 4808
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,
	    "Entered %s.\n", __func__);
4809 4810 4811 4812 4813 4814 4815 4816 4817

	mcp->mb[0] = MBC_RESTART_MPI_FW;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_0|MBX_1;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
4818 4819 4820
		ql_dbg(ql_dbg_mbx, vha, 0x10e6,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
4821
	} else {
4822 4823
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,
		    "Done %s.\n", __func__);
4824 4825 4826 4827
	}

	return rval;
}
4828

4829 4830 4831 4832 4833 4834 4835 4836
int
qla82xx_set_driver_version(scsi_qla_host_t *vha, char *version)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int i;
	int len;
4837
	__le16 *str;
4838 4839 4840 4841 4842 4843 4844 4845
	struct qla_hw_data *ha = vha->hw;

	if (!IS_P3P_TYPE(ha))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117b,
	    "Entered %s.\n", __func__);

4846
	str = (__force __le16 *)version;
4847 4848 4849 4850 4851 4852
	len = strlen(version);

	mcp->mb[0] = MBC_SET_RNID_PARAMS;
	mcp->mb[1] = RNID_TYPE_SET_VERSION << 8;
	mcp->out_mb = MBX_1|MBX_0;
	for (i = 4; i < 16 && len; i++, str++, len -= 2) {
4853
		mcp->mb[i] = le16_to_cpup(str);
4854 4855 4856 4857 4858 4859 4860 4861 4862 4863 4864 4865 4866 4867 4868 4869 4870 4871 4872 4873 4874 4875 4876 4877 4878 4879 4880 4881 4882 4883 4884 4885 4886 4887 4888 4889 4890 4891 4892 4893 4894 4895 4896 4897 4898 4899 4900 4901 4902 4903 4904 4905 4906 4907 4908 4909 4910 4911 4912 4913 4914 4915 4916 4917 4918 4919 4920 4921 4922 4923 4924 4925 4926 4927 4928 4929 4930 4931 4932 4933 4934
		mcp->out_mb |= 1<<i;
	}
	for (; i < 16; i++) {
		mcp->mb[i] = 0;
		mcp->out_mb |= 1<<i;
	}
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x117c,
		    "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117d,
		    "Done %s.\n", __func__);
	}

	return rval;
}

int
qla25xx_set_driver_version(scsi_qla_host_t *vha, char *version)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int len;
	uint16_t dwlen;
	uint8_t *str;
	dma_addr_t str_dma;
	struct qla_hw_data *ha = vha->hw;

	if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha) ||
	    IS_P3P_TYPE(ha))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117e,
	    "Entered %s.\n", __func__);

	str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma);
	if (!str) {
		ql_log(ql_log_warn, vha, 0x117f,
		    "Failed to allocate driver version param.\n");
		return QLA_MEMORY_ALLOC_FAILED;
	}

	memcpy(str, "\x7\x3\x11\x0", 4);
	dwlen = str[0];
	len = dwlen * 4 - 4;
	memset(str + 4, 0, len);
	if (len > strlen(version))
		len = strlen(version);
	memcpy(str + 4, version, len);

	mcp->mb[0] = MBC_SET_RNID_PARAMS;
	mcp->mb[1] = RNID_TYPE_SET_VERSION << 8 | dwlen;
	mcp->mb[2] = MSW(LSD(str_dma));
	mcp->mb[3] = LSW(LSD(str_dma));
	mcp->mb[6] = MSW(MSD(str_dma));
	mcp->mb[7] = LSW(MSD(str_dma));
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1180,
		    "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1181,
		    "Done %s.\n", __func__);
	}

	dma_pool_free(ha->s_dma_pool, str, str_dma);

	return rval;
}

4935 4936 4937 4938 4939 4940 4941 4942 4943 4944 4945 4946 4947 4948 4949 4950 4951 4952 4953 4954 4955 4956 4957 4958 4959 4960 4961 4962 4963 4964 4965 4966 4967 4968 4969 4970
int
qla24xx_get_port_login_templ(scsi_qla_host_t *vha, dma_addr_t buf_dma,
			     void *buf, uint16_t bufsiz)
{
	int rval, i;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	uint32_t	*bp;

	if (!IS_FWI2_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_GET_RNID_PARAMS;
	mcp->mb[1] = RNID_TYPE_PORT_LOGIN << 8;
	mcp->mb[2] = MSW(buf_dma);
	mcp->mb[3] = LSW(buf_dma);
	mcp->mb[6] = MSW(MSD(buf_dma));
	mcp->mb[7] = LSW(MSD(buf_dma));
	mcp->mb[8] = bufsiz/4;
	mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x115a,
		    "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
		    "Done %s.\n", __func__);
		bp = (uint32_t *) buf;
		for (i = 0; i < (bufsiz-4)/4; i++, bp++)
4971
			*bp = le32_to_cpu((__force __le32)*bp);
4972 4973 4974 4975 4976
	}

	return rval;
}

4977
#define PUREX_CMD_COUNT	4
4978 4979 4980 4981 4982 4983 4984
int
qla25xx_set_els_cmds_supported(scsi_qla_host_t *vha)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	uint8_t *els_cmd_map;
4985
	uint8_t active_cnt = 0;
4986
	dma_addr_t els_cmd_map_dma;
4987 4988
	uint8_t cmd_opcode[PUREX_CMD_COUNT];
	uint8_t i, index, purex_bit;
4989 4990
	struct qla_hw_data *ha = vha->hw;

4991 4992
	if (!IS_QLA25XX(ha) && !IS_QLA2031(ha) &&
	    !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
4993 4994 4995 4996 4997 4998 4999 5000 5001 5002 5003 5004 5005
		return QLA_SUCCESS;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1197,
	    "Entered %s.\n", __func__);

	els_cmd_map = dma_alloc_coherent(&ha->pdev->dev, ELS_CMD_MAP_SIZE,
	    &els_cmd_map_dma, GFP_KERNEL);
	if (!els_cmd_map) {
		ql_log(ql_log_warn, vha, 0x7101,
		    "Failed to allocate RDP els command param.\n");
		return QLA_MEMORY_ALLOC_FAILED;
	}

5006
	/* List of Purex ELS */
5007 5008 5009 5010 5011 5012 5013 5014 5015 5016 5017 5018
	if (ql2xrdpenable) {
		cmd_opcode[active_cnt] = ELS_RDP;
		active_cnt++;
	}
	if (ha->flags.scm_supported_f) {
		cmd_opcode[active_cnt] = ELS_FPIN;
		active_cnt++;
	}
	if (ha->flags.edif_enabled) {
		cmd_opcode[active_cnt] = ELS_AUTH_ELS;
		active_cnt++;
	}
5019

5020
	for (i = 0; i < active_cnt; i++) {
5021 5022 5023 5024
		index = cmd_opcode[i] / 8;
		purex_bit = cmd_opcode[i] % 8;
		els_cmd_map[index] |= 1 << purex_bit;
	}
5025 5026 5027 5028 5029 5030 5031 5032 5033 5034 5035 5036 5037 5038 5039 5040 5041 5042 5043 5044 5045 5046

	mcp->mb[0] = MBC_SET_RNID_PARAMS;
	mcp->mb[1] = RNID_TYPE_ELS_CMD << 8;
	mcp->mb[2] = MSW(LSD(els_cmd_map_dma));
	mcp->mb[3] = LSW(LSD(els_cmd_map_dma));
	mcp->mb[6] = MSW(MSD(els_cmd_map_dma));
	mcp->mb[7] = LSW(MSD(els_cmd_map_dma));
	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = MBX_DMA_OUT;
	mcp->buf_size = ELS_CMD_MAP_SIZE;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x118d,
		    "Failed=%x (%x,%x).\n", rval, mcp->mb[0], mcp->mb[1]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118c,
		    "Done %s.\n", __func__);
	}

5047
	dma_free_coherent(&ha->pdev->dev, ELS_CMD_MAP_SIZE,
5048 5049 5050 5051 5052
	   els_cmd_map, els_cmd_map_dma);

	return rval;
}

5053 5054 5055 5056 5057 5058 5059 5060 5061 5062 5063 5064 5065 5066 5067 5068 5069 5070 5071 5072 5073 5074 5075 5076 5077 5078 5079 5080 5081 5082 5083 5084 5085
static int
qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_FWI2_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_GET_RNID_PARAMS;
	mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	*temp = mcp->mb[1];

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x115a,
		    "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
		    "Done %s.\n", __func__);
	}

	return rval;
}

5086
int
5087 5088
qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
	uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
5089 5090 5091 5092
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
5093 5094
	struct qla_hw_data *ha = vha->hw;

5095 5096
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
	    "Entered %s.\n", __func__);
5097

5098 5099
	if (!IS_FWI2_CAPABLE(ha))
		return QLA_FUNCTION_FAILED;
5100

5101 5102 5103
	if (len == 1)
		opt |= BIT_0;

5104 5105
	mcp->mb[0] = MBC_READ_SFP;
	mcp->mb[1] = dev;
5106 5107
	mcp->mb[2] = MSW(LSD(sfp_dma));
	mcp->mb[3] = LSW(LSD(sfp_dma));
5108 5109 5110
	mcp->mb[6] = MSW(MSD(sfp_dma));
	mcp->mb[7] = LSW(MSD(sfp_dma));
	mcp->mb[8] = len;
5111
	mcp->mb[9] = off;
5112 5113
	mcp->mb[10] = opt;
	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
5114
	mcp->in_mb = MBX_1|MBX_0;
5115 5116 5117 5118 5119
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (opt & BIT_0)
5120
		*sfp = mcp->mb[1];
5121 5122

	if (rval != QLA_SUCCESS) {
5123 5124
		ql_dbg(ql_dbg_mbx, vha, 0x10e9,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5125
		if (mcp->mb[0] == MBS_COMMAND_ERROR && mcp->mb[1] == 0x22) {
5126 5127
			/* sfp is not there */
			rval = QLA_INTERFACE_ERROR;
5128
		}
5129
	} else {
5130 5131
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
		    "Done %s.\n", __func__);
5132 5133 5134 5135 5136 5137
	}

	return rval;
}

int
5138 5139
qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
	uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
5140 5141 5142 5143
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
5144 5145
	struct qla_hw_data *ha = vha->hw;

5146 5147
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,
	    "Entered %s.\n", __func__);
5148

5149 5150
	if (!IS_FWI2_CAPABLE(ha))
		return QLA_FUNCTION_FAILED;
5151

5152 5153 5154
	if (len == 1)
		opt |= BIT_0;

5155
	if (opt & BIT_0)
5156
		len = *sfp;
5157 5158 5159

	mcp->mb[0] = MBC_WRITE_SFP;
	mcp->mb[1] = dev;
5160 5161
	mcp->mb[2] = MSW(LSD(sfp_dma));
	mcp->mb[3] = LSW(LSD(sfp_dma));
5162 5163 5164
	mcp->mb[6] = MSW(MSD(sfp_dma));
	mcp->mb[7] = LSW(MSD(sfp_dma));
	mcp->mb[8] = len;
5165
	mcp->mb[9] = off;
5166 5167
	mcp->mb[10] = opt;
	mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
5168
	mcp->in_mb = MBX_1|MBX_0;
5169 5170 5171 5172 5173
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
5174 5175
		ql_dbg(ql_dbg_mbx, vha, 0x10ec,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5176
	} else {
5177 5178
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,
		    "Done %s.\n", __func__);
5179 5180 5181 5182
	}

	return rval;
}
5183 5184 5185 5186 5187 5188 5189 5190 5191

int
qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
    uint16_t size_in_bytes, uint16_t *actual_size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

5192 5193
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,
	    "Entered %s.\n", __func__);
5194

5195
	if (!IS_CNA_CAPABLE(vha->hw))
5196 5197 5198 5199 5200 5201 5202 5203 5204 5205 5206 5207 5208 5209 5210
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_GET_XGMAC_STATS;
	mcp->mb[2] = MSW(stats_dma);
	mcp->mb[3] = LSW(stats_dma);
	mcp->mb[6] = MSW(MSD(stats_dma));
	mcp->mb[7] = LSW(MSD(stats_dma));
	mcp->mb[8] = size_in_bytes >> 2;
	mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
5211 5212 5213
		ql_dbg(ql_dbg_mbx, vha, 0x10ef,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
5214
	} else {
5215 5216
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,
		    "Done %s.\n", __func__);
5217

5218 5219 5220 5221 5222 5223

		*actual_size = mcp->mb[2] << 2;
	}

	return rval;
}
5224 5225 5226 5227 5228 5229 5230 5231 5232

int
qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
    uint16_t size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

5233 5234
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,
	    "Entered %s.\n", __func__);
5235

5236
	if (!IS_CNA_CAPABLE(vha->hw))
5237 5238 5239 5240 5241 5242 5243 5244 5245 5246 5247 5248 5249 5250 5251 5252
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_GET_DCBX_PARAMS;
	mcp->mb[1] = 0;
	mcp->mb[2] = MSW(tlv_dma);
	mcp->mb[3] = LSW(tlv_dma);
	mcp->mb[6] = MSW(MSD(tlv_dma));
	mcp->mb[7] = LSW(MSD(tlv_dma));
	mcp->mb[8] = size;
	mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
5253 5254 5255
		ql_dbg(ql_dbg_mbx, vha, 0x10f2,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
5256
	} else {
5257 5258
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,
		    "Done %s.\n", __func__);
5259 5260 5261 5262
	}

	return rval;
}
5263 5264 5265 5266 5267 5268 5269 5270

int
qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

5271 5272
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,
	    "Entered %s.\n", __func__);
5273

5274 5275 5276 5277 5278 5279 5280 5281
	if (!IS_FWI2_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_READ_RAM_EXTENDED;
	mcp->mb[1] = LSW(risc_addr);
	mcp->mb[8] = MSW(risc_addr);
	mcp->out_mb = MBX_8|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_0;
5282
	mcp->tov = MBX_TOV_SECONDS;
5283 5284 5285
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
5286 5287
		ql_dbg(ql_dbg_mbx, vha, 0x10f5,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5288
	} else {
5289 5290
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,
		    "Done %s.\n", __func__);
5291 5292 5293 5294 5295 5296
		*data = mcp->mb[3] << 16 | mcp->mb[2];
	}

	return rval;
}

5297
int
5298 5299
qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
	uint16_t *mresp)
5300 5301 5302 5303 5304
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

5305 5306
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,
	    "Entered %s.\n", __func__);
5307 5308 5309 5310 5311 5312 5313 5314 5315 5316 5317 5318 5319 5320 5321

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
	mcp->mb[1] = mreq->options | BIT_6;	// BIT_6 specifies 64 bit addressing

	/* transfer count */
	mcp->mb[10] = LSW(mreq->transfer_size);
	mcp->mb[11] = MSW(mreq->transfer_size);

	/* send data address */
	mcp->mb[14] = LSW(mreq->send_dma);
	mcp->mb[15] = MSW(mreq->send_dma);
	mcp->mb[20] = LSW(MSD(mreq->send_dma));
	mcp->mb[21] = MSW(MSD(mreq->send_dma));

L
Lucas De Marchi 已提交
5322
	/* receive data address */
5323 5324 5325 5326 5327 5328
	mcp->mb[16] = LSW(mreq->rcv_dma);
	mcp->mb[17] = MSW(mreq->rcv_dma);
	mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
	mcp->mb[7] = MSW(MSD(mreq->rcv_dma));

	/* Iteration count */
5329 5330
	mcp->mb[18] = LSW(mreq->iteration_count);
	mcp->mb[19] = MSW(mreq->iteration_count);
5331 5332 5333

	mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
	    MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
5334
	if (IS_CNA_CAPABLE(vha->hw))
5335 5336 5337 5338 5339 5340 5341 5342 5343 5344
		mcp->out_mb |= MBX_2;
	mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;

	mcp->buf_size = mreq->transfer_size;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;

	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
5345 5346 5347 5348
		ql_dbg(ql_dbg_mbx, vha, 0x10f8,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x "
		    "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
		    mcp->mb[3], mcp->mb[18], mcp->mb[19]);
5349
	} else {
5350 5351
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,
		    "Done %s.\n", __func__);
5352 5353 5354 5355 5356 5357 5358 5359
	}

	/* Copy mailbox information */
	memcpy( mresp, mcp->mb, 64);
	return rval;
}

int
5360 5361
qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
	uint16_t *mresp)
5362 5363 5364 5365 5366 5367
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

5368 5369
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,
	    "Entered %s.\n", __func__);
5370 5371 5372

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
5373 5374
	/* BIT_6 specifies 64bit address */
	mcp->mb[1] = mreq->options | BIT_15 | BIT_6;
5375
	if (IS_CNA_CAPABLE(ha)) {
5376 5377
		mcp->mb[2] = vha->fcoe_fcf_idx;
	}
5378 5379 5380 5381 5382 5383 5384 5385 5386 5387 5388 5389 5390 5391
	mcp->mb[16] = LSW(mreq->rcv_dma);
	mcp->mb[17] = MSW(mreq->rcv_dma);
	mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
	mcp->mb[7] = MSW(MSD(mreq->rcv_dma));

	mcp->mb[10] = LSW(mreq->transfer_size);

	mcp->mb[14] = LSW(mreq->send_dma);
	mcp->mb[15] = MSW(mreq->send_dma);
	mcp->mb[20] = LSW(MSD(mreq->send_dma));
	mcp->mb[21] = MSW(MSD(mreq->send_dma));

	mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
	    MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
5392
	if (IS_CNA_CAPABLE(ha))
5393 5394 5395
		mcp->out_mb |= MBX_2;

	mcp->in_mb = MBX_0;
5396 5397
	if (IS_CNA_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
	    IS_QLA2031(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
5398
		mcp->in_mb |= MBX_1;
5399 5400
	if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
	    IS_QLA28XX(ha))
5401 5402 5403 5404 5405 5406 5407 5408 5409
		mcp->in_mb |= MBX_3;

	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
	mcp->buf_size = mreq->transfer_size;

	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
5410 5411 5412
		ql_dbg(ql_dbg_mbx, vha, 0x10fb,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
5413
	} else {
5414 5415
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,
		    "Done %s.\n", __func__);
5416 5417 5418
	}

	/* Copy mailbox information */
5419
	memcpy(mresp, mcp->mb, 64);
5420 5421
	return rval;
}
5422

5423
int
5424
qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)
5425 5426 5427 5428 5429
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

5430
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,
5431
	    "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);
5432 5433 5434 5435 5436 5437 5438

	mcp->mb[0] = MBC_ISP84XX_RESET;
	mcp->mb[1] = enable_diagnostic;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5439
	rval = qla2x00_mailbox_command(vha, mcp);
5440 5441

	if (rval != QLA_SUCCESS)
5442
		ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);
5443
	else
5444 5445
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,
		    "Done %s.\n", __func__);
5446 5447 5448 5449

	return rval;
}

5450 5451 5452 5453 5454 5455 5456
int
qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

5457 5458
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,
	    "Entered %s.\n", __func__);
5459

5460
	if (!IS_FWI2_CAPABLE(vha->hw))
5461
		return QLA_FUNCTION_FAILED;
5462 5463 5464 5465 5466 5467 5468

	mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
	mcp->mb[1] = LSW(risc_addr);
	mcp->mb[2] = LSW(data);
	mcp->mb[3] = MSW(data);
	mcp->mb[8] = MSW(risc_addr);
	mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
5469
	mcp->in_mb = MBX_1|MBX_0;
5470
	mcp->tov = MBX_TOV_SECONDS;
5471 5472 5473
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
5474
		ql_dbg(ql_dbg_mbx, vha, 0x1101,
5475 5476
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
5477
	} else {
5478 5479
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,
		    "Done %s.\n", __func__);
5480 5481 5482 5483
	}

	return rval;
}
5484

5485 5486 5487 5488 5489 5490 5491 5492 5493 5494 5495
int
qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
{
	int rval;
	uint32_t stat, timer;
	uint16_t mb0 = 0;
	struct qla_hw_data *ha = vha->hw;
	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;

	rval = QLA_SUCCESS;

5496 5497
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,
	    "Entered %s.\n", __func__);
5498 5499 5500 5501

	clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);

	/* Write the MBC data to the registers */
5502 5503 5504 5505 5506
	wrt_reg_word(&reg->mailbox0, MBC_WRITE_MPI_REGISTER);
	wrt_reg_word(&reg->mailbox1, mb[0]);
	wrt_reg_word(&reg->mailbox2, mb[1]);
	wrt_reg_word(&reg->mailbox3, mb[2]);
	wrt_reg_word(&reg->mailbox4, mb[3]);
5507

5508
	wrt_reg_dword(&reg->hccr, HCCRX_SET_HOST_INT);
5509 5510 5511 5512

	/* Poll for MBC interrupt */
	for (timer = 6000000; timer; timer--) {
		/* Check for pending interrupts. */
5513
		stat = rd_reg_dword(&reg->host_status);
5514 5515 5516 5517 5518 5519 5520
		if (stat & HSRX_RISC_INT) {
			stat &= 0xff;

			if (stat == 0x1 || stat == 0x2 ||
			    stat == 0x10 || stat == 0x11) {
				set_bit(MBX_INTERRUPT,
				    &ha->mbx_cmd_flags);
5521 5522
				mb0 = rd_reg_word(&reg->mailbox0);
				wrt_reg_dword(&reg->hccr,
5523
				    HCCRX_CLR_RISC_INT);
5524
				rd_reg_dword(&reg->hccr);
5525 5526 5527 5528 5529 5530 5531 5532 5533 5534 5535 5536
				break;
			}
		}
		udelay(5);
	}

	if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
		rval = mb0 & MBS_MASK;
	else
		rval = QLA_FUNCTION_FAILED;

	if (rval != QLA_SUCCESS) {
5537 5538
		ql_dbg(ql_dbg_mbx, vha, 0x1104,
		    "Failed=%x mb[0]=%x.\n", rval, mb[0]);
5539
	} else {
5540 5541
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,
		    "Done %s.\n", __func__);
5542 5543 5544 5545
	}

	return rval;
}
5546

5547 5548 5549 5550 5551 5552 5553 5554 5555 5556 5557 5558 5559 5560 5561 5562 5563 5564 5565 5566 5567 5568 5569 5570 5571 5572 5573 5574 5575 5576 5577 5578 5579 5580 5581 5582 5583 5584 5585 5586
/* Set the specified data rate */
int
qla2x00_set_data_rate(scsi_qla_host_t *vha, uint16_t mode)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;
	uint16_t val;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
	    "Entered %s speed:0x%x mode:0x%x.\n", __func__, ha->set_data_rate,
	    mode);

	if (!IS_FWI2_CAPABLE(ha))
		return QLA_FUNCTION_FAILED;

	memset(mcp, 0, sizeof(*mcp));
	switch (ha->set_data_rate) {
	case PORT_SPEED_AUTO:
	case PORT_SPEED_4GB:
	case PORT_SPEED_8GB:
	case PORT_SPEED_16GB:
	case PORT_SPEED_32GB:
		val = ha->set_data_rate;
		break;
	default:
		ql_log(ql_log_warn, vha, 0x1199,
		    "Unrecognized speed setting:%d. Setting Autoneg\n",
		    ha->set_data_rate);
		val = ha->set_data_rate = PORT_SPEED_AUTO;
		break;
	}

	mcp->mb[0] = MBC_DATA_RATE;
	mcp->mb[1] = mode;
	mcp->mb[2] = val;

	mcp->out_mb = MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
5587
	if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
5588 5589 5590 5591 5592 5593 5594 5595 5596 5597 5598 5599 5600 5601 5602 5603 5604 5605 5606
		mcp->in_mb |= MBX_4|MBX_3;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1107,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		if (mcp->mb[1] != 0x7)
			ql_dbg(ql_dbg_mbx, vha, 0x1179,
				"Speed set:0x%x\n", mcp->mb[1]);

		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
		    "Done %s.\n", __func__);
	}

	return rval;
}

5607 5608 5609 5610 5611 5612 5613 5614
int
qla2x00_get_data_rate(scsi_qla_host_t *vha)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

5615 5616
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
	    "Entered %s.\n", __func__);
5617

5618 5619 5620 5621
	if (!IS_FWI2_CAPABLE(ha))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_DATA_RATE;
5622
	mcp->mb[1] = QLA_GET_DATA_RATE;
5623 5624
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
5625
	if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
5626
		mcp->in_mb |= MBX_3;
5627 5628 5629 5630
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
5631 5632
		ql_dbg(ql_dbg_mbx, vha, 0x1107,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5633
	} else {
5634 5635 5636 5637 5638 5639 5640 5641 5642
		if (mcp->mb[1] != 0x7)
			ha->link_data_rate = mcp->mb[1];

		if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
			if (mcp->mb[4] & BIT_0)
				ql_log(ql_log_info, vha, 0x11a2,
				    "FEC=enabled (data rate).\n");
		}

5643 5644
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
		    "Done %s.\n", __func__);
5645 5646 5647 5648 5649 5650
		if (mcp->mb[1] != 0x7)
			ha->link_data_rate = mcp->mb[1];
	}

	return rval;
}
5651

5652 5653 5654 5655 5656 5657 5658 5659
int
qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

5660 5661
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,
	    "Entered %s.\n", __func__);
5662

5663
	if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA8044(ha) &&
5664
	    !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
5665 5666 5667 5668 5669 5670 5671 5672 5673 5674
		return QLA_FUNCTION_FAILED;
	mcp->mb[0] = MBC_GET_PORT_CONFIG;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
5675 5676
		ql_dbg(ql_dbg_mbx, vha, 0x110a,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5677 5678 5679 5680
	} else {
		/* Copy all bits to preserve original value */
		memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);

5681 5682
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,
		    "Done %s.\n", __func__);
5683 5684 5685 5686 5687 5688 5689 5690 5691 5692 5693
	}
	return rval;
}

int
qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

5694 5695
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,
	    "Entered %s.\n", __func__);
5696 5697 5698 5699 5700 5701 5702 5703 5704 5705 5706

	mcp->mb[0] = MBC_SET_PORT_CONFIG;
	/* Copy all bits to preserve original setting */
	memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
5707 5708
		ql_dbg(ql_dbg_mbx, vha, 0x110d,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5709
	} else
5710 5711
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,
		    "Done %s.\n", __func__);
5712 5713 5714 5715 5716

	return rval;
}


5717 5718 5719 5720 5721 5722 5723 5724 5725
int
qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
		uint16_t *mb)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

5726 5727
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,
	    "Entered %s.\n", __func__);
5728

5729 5730 5731 5732 5733 5734 5735 5736 5737 5738 5739 5740 5741
	if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
		return QLA_FUNCTION_FAILED;

	mcp->mb[0] = MBC_PORT_PARAMS;
	mcp->mb[1] = loop_id;
	if (ha->flags.fcp_prio_enabled)
		mcp->mb[2] = BIT_1;
	else
		mcp->mb[2] = BIT_2;
	mcp->mb[4] = priority & 0xf;
	mcp->mb[9] = vha->vp_idx;
	mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
5742
	mcp->tov = MBX_TOV_SECONDS;
5743 5744 5745 5746 5747 5748 5749 5750 5751 5752
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (mb != NULL) {
		mb[0] = mcp->mb[0];
		mb[1] = mcp->mb[1];
		mb[3] = mcp->mb[3];
		mb[4] = mcp->mb[4];
	}

	if (rval != QLA_SUCCESS) {
5753
		ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);
5754
	} else {
5755 5756
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,
		    "Done %s.\n", __func__);
5757 5758 5759 5760
	}

	return rval;
}
5761

5762
int
5763
qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp)
5764
{
5765
	int rval = QLA_FUNCTION_FAILED;
5766
	struct qla_hw_data *ha = vha->hw;
5767
	uint8_t byte;
5768

5769 5770 5771 5772 5773 5774 5775 5776 5777 5778 5779 5780 5781 5782 5783 5784 5785 5786 5787 5788 5789 5790 5791 5792
	if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha)) {
		ql_dbg(ql_dbg_mbx, vha, 0x1150,
		    "Thermal not supported by this card.\n");
		return rval;
	}

	if (IS_QLA25XX(ha)) {
		if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
		    ha->pdev->subsystem_device == 0x0175) {
			rval = qla2x00_read_sfp(vha, 0, &byte,
			    0x98, 0x1, 1, BIT_13|BIT_0);
			*temp = byte;
			return rval;
		}
		if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
		    ha->pdev->subsystem_device == 0x338e) {
			rval = qla2x00_read_sfp(vha, 0, &byte,
			    0x98, 0x1, 1, BIT_15|BIT_14|BIT_0);
			*temp = byte;
			return rval;
		}
		ql_dbg(ql_dbg_mbx, vha, 0x10c9,
		    "Thermal not supported by this card.\n");
		return rval;
5793 5794
	}

5795 5796 5797 5798 5799 5800 5801 5802
	if (IS_QLA82XX(ha)) {
		*temp = qla82xx_read_temperature(vha);
		rval = QLA_SUCCESS;
		return rval;
	} else if (IS_QLA8044(ha)) {
		*temp = qla8044_read_temperature(vha);
		rval = QLA_SUCCESS;
		return rval;
5803 5804
	}

5805
	rval = qla2x00_read_asic_temperature(vha, temp);
5806 5807 5808
	return rval;
}

5809 5810 5811 5812 5813 5814 5815 5816
int
qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

5817 5818
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,
	    "Entered %s.\n", __func__);
5819

5820 5821 5822 5823
	if (!IS_FWI2_CAPABLE(ha))
		return QLA_FUNCTION_FAILED;

	memset(mcp, 0, sizeof(mbx_cmd_t));
5824
	mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5825 5826 5827 5828
	mcp->mb[1] = 1;

	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
5829
	mcp->tov = MBX_TOV_SECONDS;
5830 5831 5832 5833
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
5834 5835
		ql_dbg(ql_dbg_mbx, vha, 0x1016,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5836
	} else {
5837 5838
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,
		    "Done %s.\n", __func__);
5839 5840 5841 5842 5843 5844 5845 5846 5847 5848 5849 5850 5851
	}

	return rval;
}

int
qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

5852 5853
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,
	    "Entered %s.\n", __func__);
5854

5855
	if (!IS_P3P_TYPE(ha))
5856 5857 5858
		return QLA_FUNCTION_FAILED;

	memset(mcp, 0, sizeof(mbx_cmd_t));
5859
	mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
5860 5861 5862 5863
	mcp->mb[1] = 0;

	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
5864
	mcp->tov = MBX_TOV_SECONDS;
5865 5866 5867 5868
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
5869 5870
		ql_dbg(ql_dbg_mbx, vha, 0x100c,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5871
	} else {
5872 5873
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,
		    "Done %s.\n", __func__);
5874 5875 5876 5877
	}

	return rval;
}
5878 5879 5880 5881 5882 5883 5884 5885 5886

int
qla82xx_md_get_template_size(scsi_qla_host_t *vha)
{
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int rval = QLA_FUNCTION_FAILED;

5887 5888
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,
	    "Entered %s.\n", __func__);
5889 5890 5891 5892 5893 5894 5895 5896 5897 5898 5899 5900 5901 5902 5903 5904 5905 5906 5907 5908 5909 5910

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
	mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
	mcp->mb[2] = LSW(RQST_TMPLT_SIZE);
	mcp->mb[3] = MSW(RQST_TMPLT_SIZE);

	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
	    MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;

	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
	mcp->tov = MBX_TOV_SECONDS;
	rval = qla2x00_mailbox_command(vha, mcp);

	/* Always copy back return mailbox values. */
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1120,
		    "mailbox command FAILED=0x%x, subcode=%x.\n",
		    (mcp->mb[1] << 16) | mcp->mb[0],
		    (mcp->mb[3] << 16) | mcp->mb[2]);
	} else {
5911 5912
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,
		    "Done %s.\n", __func__);
5913 5914 5915 5916 5917 5918 5919 5920 5921 5922 5923 5924 5925 5926 5927 5928 5929 5930
		ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]);
		if (!ha->md_template_size) {
			ql_dbg(ql_dbg_mbx, vha, 0x1122,
			    "Null template size obtained.\n");
			rval = QLA_FUNCTION_FAILED;
		}
	}
	return rval;
}

int
qla82xx_md_get_template(scsi_qla_host_t *vha)
{
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int rval = QLA_FUNCTION_FAILED;

5931 5932
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,
	    "Entered %s.\n", __func__);
5933 5934 5935 5936 5937 5938 5939 5940 5941 5942 5943 5944 5945 5946 5947 5948 5949 5950 5951 5952 5953 5954 5955 5956 5957 5958 5959 5960 5961 5962 5963 5964 5965 5966

	ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
	   ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
	if (!ha->md_tmplt_hdr) {
		ql_log(ql_log_warn, vha, 0x1124,
		    "Unable to allocate memory for Minidump template.\n");
		return rval;
	}

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
	mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
	mcp->mb[2] = LSW(RQST_TMPLT);
	mcp->mb[3] = MSW(RQST_TMPLT);
	mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma));
	mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma));
	mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma));
	mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma));
	mcp->mb[8] = LSW(ha->md_template_size);
	mcp->mb[9] = MSW(ha->md_template_size);

	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
	    MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1125,
		    "mailbox command FAILED=0x%x, subcode=%x.\n",
		    ((mcp->mb[1] << 16) | mcp->mb[0]),
		    ((mcp->mb[3] << 16) | mcp->mb[2]));
	} else
5967 5968
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,
		    "Done %s.\n", __func__);
5969 5970
	return rval;
}
5971

5972 5973 5974 5975 5976 5977 5978 5979
int
qla8044_md_get_template(scsi_qla_host_t *vha)
{
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int rval = QLA_FUNCTION_FAILED;
	int offset = 0, size = MINIDUMP_SIZE_36K;
5980

5981 5982 5983 5984 5985 5986 5987 5988 5989 5990 5991 5992 5993 5994 5995 5996 5997 5998 5999 6000 6001 6002 6003 6004 6005 6006 6007 6008 6009 6010 6011 6012 6013 6014 6015 6016 6017 6018 6019 6020 6021 6022 6023 6024 6025 6026
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11f,
	    "Entered %s.\n", __func__);

	ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
	   ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
	if (!ha->md_tmplt_hdr) {
		ql_log(ql_log_warn, vha, 0xb11b,
		    "Unable to allocate memory for Minidump template.\n");
		return rval;
	}

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	while (offset < ha->md_template_size) {
		mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
		mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
		mcp->mb[2] = LSW(RQST_TMPLT);
		mcp->mb[3] = MSW(RQST_TMPLT);
		mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma + offset));
		mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma + offset));
		mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma + offset));
		mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma + offset));
		mcp->mb[8] = LSW(size);
		mcp->mb[9] = MSW(size);
		mcp->mb[10] = offset & 0x0000FFFF;
		mcp->mb[11] = offset & 0xFFFF0000;
		mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
		mcp->tov = MBX_TOV_SECONDS;
		mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
			MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
		mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
		rval = qla2x00_mailbox_command(vha, mcp);

		if (rval != QLA_SUCCESS) {
			ql_dbg(ql_dbg_mbx, vha, 0xb11c,
				"mailbox command FAILED=0x%x, subcode=%x.\n",
				((mcp->mb[1] << 16) | mcp->mb[0]),
				((mcp->mb[3] << 16) | mcp->mb[2]));
			return rval;
		} else
			ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11d,
				"Done %s.\n", __func__);
		offset = offset + size;
	}
	return rval;
}

6027 6028 6029 6030 6031 6032 6033 6034 6035 6036 6037
int
qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
		return QLA_FUNCTION_FAILED;

6038 6039
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,
	    "Entered %s.\n", __func__);
6040 6041 6042 6043 6044 6045 6046 6047 6048 6049 6050 6051 6052 6053 6054 6055

	memset(mcp, 0, sizeof(mbx_cmd_t));
	mcp->mb[0] = MBC_SET_LED_CONFIG;
	mcp->mb[1] = led_cfg[0];
	mcp->mb[2] = led_cfg[1];
	if (IS_QLA8031(ha)) {
		mcp->mb[3] = led_cfg[2];
		mcp->mb[4] = led_cfg[3];
		mcp->mb[5] = led_cfg[4];
		mcp->mb[6] = led_cfg[5];
	}

	mcp->out_mb = MBX_2|MBX_1|MBX_0;
	if (IS_QLA8031(ha))
		mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
	mcp->in_mb = MBX_0;
6056
	mcp->tov = MBX_TOV_SECONDS;
6057 6058 6059 6060 6061 6062 6063
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1134,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
6064 6065
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,
		    "Done %s.\n", __func__);
6066 6067 6068 6069 6070 6071 6072 6073 6074 6075 6076 6077 6078 6079 6080 6081
	}

	return rval;
}

int
qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
		return QLA_FUNCTION_FAILED;

6082 6083
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,
	    "Entered %s.\n", __func__);
6084 6085 6086 6087 6088 6089 6090 6091

	memset(mcp, 0, sizeof(mbx_cmd_t));
	mcp->mb[0] = MBC_GET_LED_CONFIG;

	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	if (IS_QLA8031(ha))
		mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
6092
	mcp->tov = MBX_TOV_SECONDS;
6093 6094 6095 6096 6097 6098 6099 6100 6101 6102 6103 6104 6105 6106 6107
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1137,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		led_cfg[0] = mcp->mb[1];
		led_cfg[1] = mcp->mb[2];
		if (IS_QLA8031(ha)) {
			led_cfg[2] = mcp->mb[3];
			led_cfg[3] = mcp->mb[4];
			led_cfg[4] = mcp->mb[5];
			led_cfg[5] = mcp->mb[6];
		}
6108 6109
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,
		    "Done %s.\n", __func__);
6110 6111 6112 6113 6114
	}

	return rval;
}

6115 6116 6117 6118 6119 6120 6121 6122
int
qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

6123
	if (!IS_P3P_TYPE(ha))
6124 6125
		return QLA_FUNCTION_FAILED;

6126
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,
6127 6128 6129 6130 6131 6132 6133 6134 6135 6136 6137
		"Entered %s.\n", __func__);

	memset(mcp, 0, sizeof(mbx_cmd_t));
	mcp->mb[0] = MBC_SET_LED_CONFIG;
	if (enable)
		mcp->mb[7] = 0xE;
	else
		mcp->mb[7] = 0xD;

	mcp->out_mb = MBX_7|MBX_0;
	mcp->in_mb = MBX_0;
6138
	mcp->tov = MBX_TOV_SECONDS;
6139 6140 6141 6142 6143 6144 6145
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1128,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
6146
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,
6147 6148 6149 6150 6151
		    "Done %s.\n", __func__);
	}

	return rval;
}
6152 6153

int
6154
qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
6155 6156 6157 6158 6159 6160
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

6161
	if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
6162 6163
		return QLA_FUNCTION_FAILED;

6164 6165
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,
	    "Entered %s.\n", __func__);
6166 6167 6168 6169 6170 6171 6172 6173 6174 6175 6176 6177 6178 6179 6180 6181 6182

	mcp->mb[0] = MBC_WRITE_REMOTE_REG;
	mcp->mb[1] = LSW(reg);
	mcp->mb[2] = MSW(reg);
	mcp->mb[3] = LSW(data);
	mcp->mb[4] = MSW(data);
	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;

	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1131,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
6183
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,
6184 6185
		    "Done %s.\n", __func__);
	}
6186

6187 6188
	return rval;
}
6189 6190 6191 6192 6193 6194 6195 6196 6197 6198

int
qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)
{
	int rval;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
6199
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,
6200 6201 6202 6203 6204
		    "Implicit LOGO Unsupported.\n");
		return QLA_FUNCTION_FAILED;
	}


6205 6206
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,
	    "Entering %s.\n",  __func__);
6207 6208 6209 6210 6211 6212 6213 6214 6215 6216 6217 6218 6219 6220

	/* Perform Implicit LOGO. */
	mcp->mb[0] = MBC_PORT_LOGOUT;
	mcp->mb[1] = fcport->loop_id;
	mcp->mb[10] = BIT_15;
	mcp->out_mb = MBX_10|MBX_1|MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval != QLA_SUCCESS)
		ql_dbg(ql_dbg_mbx, vha, 0x113d,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	else
6221 6222
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,
		    "Done %s.\n", __func__);
6223 6224 6225 6226

	return rval;
}

6227 6228 6229 6230 6231 6232 6233 6234 6235
int
qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;
	unsigned long retry_max_time = jiffies + (2 * HZ);

6236
	if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
6237 6238 6239 6240 6241 6242 6243 6244 6245 6246 6247 6248 6249 6250 6251 6252 6253 6254 6255 6256 6257 6258 6259 6260 6261 6262 6263 6264 6265 6266 6267 6268 6269 6270 6271 6272 6273 6274 6275 6276 6277 6278 6279 6280 6281 6282 6283 6284 6285
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__);

retry_rd_reg:
	mcp->mb[0] = MBC_READ_REMOTE_REG;
	mcp->mb[1] = LSW(reg);
	mcp->mb[2] = MSW(reg);
	mcp->out_mb = MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x114c,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
	} else {
		*data = (mcp->mb[3] | (mcp->mb[4] << 16));
		if (*data == QLA8XXX_BAD_VALUE) {
			/*
			 * During soft-reset CAMRAM register reads might
			 * return 0xbad0bad0. So retry for MAX of 2 sec
			 * while reading camram registers.
			 */
			if (time_after(jiffies, retry_max_time)) {
				ql_dbg(ql_dbg_mbx, vha, 0x1141,
				    "Failure to read CAMRAM register. "
				    "data=0x%x.\n", *data);
				return QLA_FUNCTION_FAILED;
			}
			msleep(100);
			goto retry_rd_reg;
		}
		ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__);
	}

	return rval;
}

int
qla83xx_restart_nic_firmware(scsi_qla_host_t *vha)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	struct qla_hw_data *ha = vha->hw;

6286
	if (!IS_QLA83XX(ha))
6287 6288 6289 6290 6291 6292 6293 6294 6295 6296 6297 6298 6299 6300 6301
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE;
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1144,
		    "Failed=%x mb[0]=%x mb[1]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1]);
6302
		qla2xxx_dump_fw(vha);
6303 6304 6305 6306 6307 6308 6309 6310 6311 6312 6313 6314 6315 6316 6317 6318 6319 6320 6321 6322 6323 6324 6325 6326 6327 6328 6329 6330 6331 6332 6333 6334 6335 6336 6337 6338 6339 6340 6341 6342 6343 6344 6345 6346
	} else {
		ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__);
	}

	return rval;
}

int
qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options,
	uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	uint8_t subcode = (uint8_t)options;
	struct qla_hw_data *ha = vha->hw;

	if (!IS_QLA8031(ha))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_SET_ACCESS_CONTROL;
	mcp->mb[1] = options;
	mcp->out_mb = MBX_1|MBX_0;
	if (subcode & BIT_2) {
		mcp->mb[2] = LSW(start_addr);
		mcp->mb[3] = MSW(start_addr);
		mcp->mb[4] = LSW(end_addr);
		mcp->mb[5] = MSW(end_addr);
		mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2;
	}
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	if (!(subcode & (BIT_2 | BIT_5)))
		mcp->in_mb |= MBX_4|MBX_3;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1147,
		    "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n",
		    rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
		    mcp->mb[4]);
6347
		qla2xxx_dump_fw(vha);
6348 6349 6350 6351 6352 6353 6354 6355 6356 6357 6358 6359 6360 6361 6362
	} else {
		if (subcode & BIT_5)
			*sector_size = mcp->mb[1];
		else if (subcode & (BIT_6 | BIT_7)) {
			ql_dbg(ql_dbg_mbx, vha, 0x1148,
			    "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
		} else if (subcode & (BIT_3 | BIT_4)) {
			ql_dbg(ql_dbg_mbx, vha, 0x1149,
			    "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
		}
		ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__);
	}

	return rval;
}
6363 6364 6365 6366 6367 6368 6369 6370 6371 6372 6373 6374 6375 6376 6377 6378 6379 6380 6381 6382 6383 6384 6385 6386 6387 6388

int
qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
	uint32_t size)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	if (!IS_MCTP_CAPABLE(vha->hw))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
	mcp->mb[1] = LSW(addr);
	mcp->mb[2] = MSW(req_dma);
	mcp->mb[3] = LSW(req_dma);
	mcp->mb[4] = MSW(size);
	mcp->mb[5] = LSW(size);
	mcp->mb[6] = MSW(MSD(req_dma));
	mcp->mb[7] = LSW(MSD(req_dma));
	mcp->mb[8] = MSW(addr);
	/* Setting RAM ID to valid */
	/* For MCTP RAM ID is 0x40 */
6389
	mcp->mb[10] = BIT_7 | 0x40;
6390 6391 6392 6393 6394 6395 6396 6397 6398 6399 6400 6401 6402 6403 6404 6405 6406 6407 6408

	mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|
	    MBX_0;

	mcp->in_mb = MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x114e,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d,
		    "Done %s.\n", __func__);
	}

	return rval;
}
6409 6410 6411 6412 6413 6414 6415 6416 6417 6418

int
qla26xx_dport_diagnostics(scsi_qla_host_t *vha,
	void *dd_buf, uint size, uint options)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	dma_addr_t dd_dma;

6419 6420
	if (!IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw) &&
	    !IS_QLA28XX(vha->hw))
6421 6422
		return QLA_FUNCTION_FAILED;

6423
	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x119f,
6424 6425 6426 6427
	    "Entered %s.\n", __func__);

	dd_dma = dma_map_single(&vha->hw->pdev->dev,
	    dd_buf, size, DMA_FROM_DEVICE);
6428
	if (dma_mapping_error(&vha->hw->pdev->dev, dd_dma)) {
6429 6430 6431 6432 6433 6434 6435 6436 6437 6438 6439 6440 6441 6442 6443 6444 6445 6446 6447 6448 6449 6450 6451 6452 6453 6454 6455 6456 6457 6458 6459 6460
		ql_log(ql_log_warn, vha, 0x1194, "Failed to map dma buffer.\n");
		return QLA_MEMORY_ALLOC_FAILED;
	}

	memset(dd_buf, 0, size);

	mcp->mb[0] = MBC_DPORT_DIAGNOSTICS;
	mcp->mb[1] = options;
	mcp->mb[2] = MSW(LSD(dd_dma));
	mcp->mb[3] = LSW(LSD(dd_dma));
	mcp->mb[6] = MSW(MSD(dd_dma));
	mcp->mb[7] = LSW(MSD(dd_dma));
	mcp->mb[8] = size;
	mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->buf_size = size;
	mcp->flags = MBX_DMA_IN;
	mcp->tov = MBX_TOV_SECONDS * 4;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x1195, "Failed=%x.\n", rval);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1196,
		    "Done %s.\n", __func__);
	}

	dma_unmap_single(&vha->hw->pdev->dev, dd_dma,
	    size, DMA_FROM_DEVICE);

	return rval;
}
6461

6462
static void qla2x00_async_mb_sp_done(srb_t *sp, int res)
6463 6464 6465 6466 6467 6468 6469 6470 6471 6472 6473 6474 6475 6476 6477 6478 6479 6480 6481 6482 6483 6484 6485 6486 6487 6488 6489 6490 6491 6492 6493 6494
{
	sp->u.iocb_cmd.u.mbx.rc = res;

	complete(&sp->u.iocb_cmd.u.mbx.comp);
	/* don't free sp here. Let the caller do the free */
}

/*
 * This mailbox uses the iocb interface to send MB command.
 * This allows non-critial (non chip setup) command to go
 * out in parrallel.
 */
int qla24xx_send_mb_cmd(struct scsi_qla_host *vha, mbx_cmd_t *mcp)
{
	int rval = QLA_FUNCTION_FAILED;
	srb_t *sp;
	struct srb_iocb *c;

	if (!vha->hw->flags.fw_started)
		goto done;

	sp = qla2x00_get_sp(vha, NULL, GFP_KERNEL);
	if (!sp)
		goto done;

	sp->type = SRB_MB_IOCB;
	sp->name = mb_to_str(mcp->mb[0]);

	c = &sp->u.iocb_cmd;
	c->timeout = qla2x00_async_iocb_timeout;
	init_completion(&c->u.mbx.comp);

6495 6496 6497 6498
	qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);

	memcpy(sp->u.iocb_cmd.u.mbx.out_mb, mcp->mb, SIZEOF_IOCB_MB_REG);

6499 6500 6501 6502
	sp->done = qla2x00_async_mb_sp_done;

	rval = qla2x00_start_sp(sp);
	if (rval != QLA_SUCCESS) {
6503
		ql_dbg(ql_dbg_mbx, vha, 0x1018,
6504 6505 6506 6507 6508
		    "%s: %s Failed submission. %x.\n",
		    __func__, sp->name, rval);
		goto done_free_sp;
	}

6509
	ql_dbg(ql_dbg_mbx, vha, 0x113f, "MB:%s hndl %x submitted\n",
6510 6511 6512 6513 6514 6515 6516 6517
	    sp->name, sp->handle);

	wait_for_completion(&c->u.mbx.comp);
	memcpy(mcp->mb, sp->u.iocb_cmd.u.mbx.in_mb, SIZEOF_IOCB_MB_REG);

	rval = c->u.mbx.rc;
	switch (rval) {
	case QLA_FUNCTION_TIMEOUT:
6518
		ql_dbg(ql_dbg_mbx, vha, 0x1140, "%s: %s Timeout. %x.\n",
6519 6520 6521
		    __func__, sp->name, rval);
		break;
	case  QLA_SUCCESS:
6522
		ql_dbg(ql_dbg_mbx, vha, 0x119d, "%s: %s done.\n",
6523 6524 6525
		    __func__, sp->name);
		break;
	default:
6526
		ql_dbg(ql_dbg_mbx, vha, 0x119e, "%s: %s Failed. %x.\n",
6527 6528 6529 6530 6531 6532 6533 6534 6535 6536 6537 6538 6539 6540 6541 6542 6543 6544 6545 6546 6547 6548 6549 6550 6551
		    __func__, sp->name, rval);
		break;
	}

done_free_sp:
	sp->free(sp);
done:
	return rval;
}

/*
 * qla24xx_gpdb_wait
 * NOTE: Do not call this routine from DPC thread
 */
int qla24xx_gpdb_wait(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
{
	int rval = QLA_FUNCTION_FAILED;
	dma_addr_t pd_dma;
	struct port_database_24xx *pd;
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;

	if (!vha->hw->flags.fw_started)
		goto done;

6552
	pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
6553
	if (pd  == NULL) {
6554 6555
		ql_log(ql_log_warn, vha, 0xd047,
		    "Failed to allocate port database structure.\n");
6556 6557 6558 6559 6560
		goto done_free_sp;
	}

	memset(&mc, 0, sizeof(mc));
	mc.mb[0] = MBC_GET_PORT_DATABASE;
6561
	mc.mb[1] = fcport->loop_id;
6562 6563 6564 6565
	mc.mb[2] = MSW(pd_dma);
	mc.mb[3] = LSW(pd_dma);
	mc.mb[6] = MSW(MSD(pd_dma));
	mc.mb[7] = LSW(MSD(pd_dma));
6566 6567
	mc.mb[9] = vha->vp_idx;
	mc.mb[10] = opt;
6568 6569 6570

	rval = qla24xx_send_mb_cmd(vha, &mc);
	if (rval != QLA_SUCCESS) {
6571
		ql_dbg(ql_dbg_mbx, vha, 0x1193,
6572 6573 6574 6575 6576 6577
		    "%s: %8phC fail\n", __func__, fcport->port_name);
		goto done_free_sp;
	}

	rval = __qla24xx_parse_gpdb(vha, fcport, pd);

6578
	ql_dbg(ql_dbg_mbx, vha, 0x1197, "%s: %8phC done\n",
6579 6580 6581 6582 6583 6584 6585 6586 6587 6588 6589 6590 6591 6592
	    __func__, fcport->port_name);

done_free_sp:
	if (pd)
		dma_pool_free(ha->s_dma_pool, pd, pd_dma);
done:
	return rval;
}

int __qla24xx_parse_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport,
    struct port_database_24xx *pd)
{
	int rval = QLA_SUCCESS;
	uint64_t zero = 0;
6593 6594
	u8 current_login_state, last_login_state;

6595
	if (NVME_TARGET(vha->hw, fcport)) {
6596 6597 6598 6599 6600 6601
		current_login_state = pd->current_login_state >> 4;
		last_login_state = pd->last_login_state >> 4;
	} else {
		current_login_state = pd->current_login_state & 0xf;
		last_login_state = pd->last_login_state & 0xf;
	}
6602 6603

	/* Check for logged in state. */
6604
	if (current_login_state != PDS_PRLI_COMPLETE) {
6605 6606
		ql_dbg(ql_dbg_mbx, vha, 0x119a,
		    "Unable to verify login-state (%x/%x) for loop_id %x.\n",
6607
		    current_login_state, last_login_state, fcport->loop_id);
6608 6609 6610 6611 6612 6613 6614 6615 6616 6617 6618 6619 6620 6621 6622 6623 6624 6625 6626 6627 6628 6629
		rval = QLA_FUNCTION_FAILED;
		goto gpd_error_out;
	}

	if (fcport->loop_id == FC_NO_LOOP_ID ||
	    (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
	     memcmp(fcport->port_name, pd->port_name, 8))) {
		/* We lost the device mid way. */
		rval = QLA_NOT_LOGGED_IN;
		goto gpd_error_out;
	}

	/* Names are little-endian. */
	memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
	memcpy(fcport->port_name, pd->port_name, WWN_SIZE);

	/* Get port_id of device. */
	fcport->d_id.b.domain = pd->port_id[0];
	fcport->d_id.b.area = pd->port_id[1];
	fcport->d_id.b.al_pa = pd->port_id[2];
	fcport->d_id.b.rsvd_1 = 0;

6630 6631 6632 6633 6634 6635
	ql_dbg(ql_dbg_disc, vha, 0x2062,
	     "%8phC SVC Param w3 %02x%02x",
	     fcport->port_name,
	     pd->prli_svc_param_word_3[1],
	     pd->prli_svc_param_word_3[0]);

6636 6637
	if (NVME_TARGET(vha->hw, fcport)) {
		fcport->port_type = FCT_NVME;
6638 6639 6640 6641 6642 6643
		if ((pd->prli_svc_param_word_3[0] & BIT_5) == 0)
			fcport->port_type |= FCT_NVME_INITIATOR;
		if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
			fcport->port_type |= FCT_NVME_TARGET;
		if ((pd->prli_svc_param_word_3[0] & BIT_3) == 0)
			fcport->port_type |= FCT_NVME_DISCOVERY;
6644 6645 6646 6647 6648 6649 6650
	} else {
		/* If not target must be initiator or unknown type. */
		if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
			fcport->port_type = FCT_INITIATOR;
		else
			fcport->port_type = FCT_TARGET;
	}
6651 6652 6653 6654 6655 6656 6657 6658 6659 6660 6661 6662 6663 6664 6665 6666 6667 6668 6669 6670 6671 6672 6673 6674 6675 6676 6677 6678 6679 6680 6681 6682 6683
	/* Passback COS information. */
	fcport->supported_classes = (pd->flags & PDF_CLASS_2) ?
		FC_COS_CLASS2 : FC_COS_CLASS3;

	if (pd->prli_svc_param_word_3[0] & BIT_7) {
		fcport->flags |= FCF_CONF_COMP_SUPPORTED;
		fcport->conf_compl_supported = 1;
	}

gpd_error_out:
	return rval;
}

/*
 * qla24xx_gidlist__wait
 * NOTE: don't call this routine from DPC thread.
 */
int qla24xx_gidlist_wait(struct scsi_qla_host *vha,
	void *id_list, dma_addr_t id_list_dma, uint16_t *entries)
{
	int rval = QLA_FUNCTION_FAILED;
	mbx_cmd_t mc;

	if (!vha->hw->flags.fw_started)
		goto done;

	memset(&mc, 0, sizeof(mc));
	mc.mb[0] = MBC_GET_ID_LIST;
	mc.mb[2] = MSW(id_list_dma);
	mc.mb[3] = LSW(id_list_dma);
	mc.mb[6] = MSW(MSD(id_list_dma));
	mc.mb[7] = LSW(MSD(id_list_dma));
	mc.mb[8] = 0;
6684
	mc.mb[9] = vha->vp_idx;
6685 6686 6687

	rval = qla24xx_send_mb_cmd(vha, &mc);
	if (rval != QLA_SUCCESS) {
6688 6689
		ql_dbg(ql_dbg_mbx, vha, 0x119b,
		    "%s:  fail\n", __func__);
6690 6691
	} else {
		*entries = mc.mb[1];
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		ql_dbg(ql_dbg_mbx, vha, 0x119c,
		    "%s:  done\n", __func__);
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	}
done:
	return rval;
}
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int qla27xx_set_zio_threshold(scsi_qla_host_t *vha, uint16_t value)
{
	int rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1200,
	    "Entered %s\n", __func__);

	memset(mcp->mb, 0 , sizeof(mcp->mb));
	mcp->mb[0] = MBC_GET_SET_ZIO_THRESHOLD;
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	mcp->mb[1] = 1;
	mcp->mb[2] = value;
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	mcp->out_mb = MBX_2 | MBX_1 | MBX_0;
	mcp->in_mb = MBX_2 | MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);

	ql_dbg(ql_dbg_mbx, vha, 0x1201, "%s %x\n",
	    (rval != QLA_SUCCESS) ? "Failed"  : "Done", rval);

	return rval;
}

int qla27xx_get_zio_threshold(scsi_qla_host_t *vha, uint16_t *value)
{
	int rval;
	mbx_cmd_t	mc;
	mbx_cmd_t	*mcp = &mc;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1203,
	    "Entered %s\n", __func__);

	memset(mcp->mb, 0, sizeof(mcp->mb));
	mcp->mb[0] = MBC_GET_SET_ZIO_THRESHOLD;
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	mcp->mb[1] = 0;
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	mcp->out_mb = MBX_1 | MBX_0;
	mcp->in_mb = MBX_2 | MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;

	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval == QLA_SUCCESS)
		*value = mc.mb[2];

	ql_dbg(ql_dbg_mbx, vha, 0x1205, "%s %x\n",
	    (rval != QLA_SUCCESS) ? "Failed" : "Done", rval);

	return rval;
}
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int
qla2x00_read_sfp_dev(struct scsi_qla_host *vha, char *buf, int count)
{
	struct qla_hw_data *ha = vha->hw;
	uint16_t iter, addr, offset;
	dma_addr_t phys_addr;
	int rval, c;
	u8 *sfp_data;

	memset(ha->sfp_data, 0, SFP_DEV_SIZE);
	addr = 0xa0;
	phys_addr = ha->sfp_data_dma;
	sfp_data = ha->sfp_data;
	offset = c = 0;

	for (iter = 0; iter < SFP_DEV_SIZE / SFP_BLOCK_SIZE; iter++) {
		if (iter == 4) {
			/* Skip to next device address. */
			addr = 0xa2;
			offset = 0;
		}

		rval = qla2x00_read_sfp(vha, phys_addr, sfp_data,
		    addr, offset, SFP_BLOCK_SIZE, BIT_1);
		if (rval != QLA_SUCCESS) {
			ql_log(ql_log_warn, vha, 0x706d,
			    "Unable to read SFP data (%x/%x/%x).\n", rval,
			    addr, offset);

			return rval;
		}

		if (buf && (c < count)) {
			u16 sz;

			if ((count - c) >= SFP_BLOCK_SIZE)
				sz = SFP_BLOCK_SIZE;
			else
				sz = count - c;

			memcpy(buf, sfp_data, sz);
			buf += SFP_BLOCK_SIZE;
			c += sz;
		}
		phys_addr += SFP_BLOCK_SIZE;
		sfp_data  += SFP_BLOCK_SIZE;
		offset += SFP_BLOCK_SIZE;
	}

	return rval;
}
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int qla24xx_res_count_wait(struct scsi_qla_host *vha,
    uint16_t *out_mb, int out_mb_sz)
{
	int rval = QLA_FUNCTION_FAILED;
	mbx_cmd_t mc;

	if (!vha->hw->flags.fw_started)
		goto done;

	memset(&mc, 0, sizeof(mc));
	mc.mb[0] = MBC_GET_RESOURCE_COUNTS;

	rval = qla24xx_send_mb_cmd(vha, &mc);
	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0xffff,
			"%s:  fail\n", __func__);
	} else {
		if (out_mb_sz <= SIZEOF_IOCB_MB_REG)
			memcpy(out_mb, mc.mb, out_mb_sz);
		else
			memcpy(out_mb, mc.mb, SIZEOF_IOCB_MB_REG);

		ql_dbg(ql_dbg_mbx, vha, 0xffff,
			"%s:  done\n", __func__);
	}
done:
	return rval;
}
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int qla28xx_secure_flash_update(scsi_qla_host_t *vha, uint16_t opts,
    uint16_t region, uint32_t len, dma_addr_t sfub_dma_addr,
    uint32_t sfub_len)
{
	int		rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	mcp->mb[0] = MBC_SECURE_FLASH_UPDATE;
	mcp->mb[1] = opts;
	mcp->mb[2] = region;
	mcp->mb[3] = MSW(len);
	mcp->mb[4] = LSW(len);
	mcp->mb[5] = MSW(sfub_dma_addr);
	mcp->mb[6] = LSW(sfub_dma_addr);
	mcp->mb[7] = MSW(MSD(sfub_dma_addr));
	mcp->mb[8] = LSW(MSD(sfub_dma_addr));
	mcp->mb[9] = sfub_len;
	mcp->out_mb =
	    MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0xffff, "%s(%ld): failed rval 0x%x, %x %x %x",
			__func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1],
			mcp->mb[2]);
	}

	return rval;
}

int qla2xxx_write_remote_register(scsi_qla_host_t *vha, uint32_t addr,
    uint32_t data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_WRITE_REMOTE_REG;
	mcp->mb[1] = LSW(addr);
	mcp->mb[2] = MSW(addr);
	mcp->mb[3] = LSW(data);
	mcp->mb[4] = MSW(data);
	mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x10e9,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
		    "Done %s.\n", __func__);
	}

	return rval;
}

int qla2xxx_read_remote_register(scsi_qla_host_t *vha, uint32_t addr,
    uint32_t *data)
{
	int rval;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;

	ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
	    "Entered %s.\n", __func__);

	mcp->mb[0] = MBC_READ_REMOTE_REG;
	mcp->mb[1] = LSW(addr);
	mcp->mb[2] = MSW(addr);
	mcp->out_mb = MBX_2|MBX_1|MBX_0;
	mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	*data = (uint32_t)((((uint32_t)mcp->mb[4]) << 16) | mcp->mb[3]);

	if (rval != QLA_SUCCESS) {
		ql_dbg(ql_dbg_mbx, vha, 0x10e9,
		    "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
	} else {
		ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
		    "Done %s.\n", __func__);
	}

	return rval;
}
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int
ql26xx_led_config(scsi_qla_host_t *vha, uint16_t options, uint16_t *led)
{
	struct qla_hw_data *ha = vha->hw;
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int rval;

	if (!IS_QLA2031(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
		return QLA_FUNCTION_FAILED;

	ql_dbg(ql_dbg_mbx, vha, 0x7070, "Entered %s (options=%x).\n",
	    __func__, options);

	mcp->mb[0] = MBC_SET_GET_FC_LED_CONFIG;
	mcp->mb[1] = options;
	mcp->out_mb = MBX_1|MBX_0;
	mcp->in_mb = MBX_1|MBX_0;
	if (options & BIT_0) {
		if (options & BIT_1) {
			mcp->mb[2] = led[2];
			mcp->out_mb |= MBX_2;
		}
		if (options & BIT_2) {
			mcp->mb[3] = led[0];
			mcp->out_mb |= MBX_3;
		}
		if (options & BIT_3) {
			mcp->mb[4] = led[1];
			mcp->out_mb |= MBX_4;
		}
	} else {
		mcp->in_mb |= MBX_4|MBX_3|MBX_2;
	}
	mcp->tov = MBX_TOV_SECONDS;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);
	if (rval) {
		ql_dbg(ql_dbg_mbx, vha, 0x7071, "Failed %s %x (mb=%x,%x)\n",
		    __func__, rval, mcp->mb[0], mcp->mb[1]);
		return rval;
	}

	if (options & BIT_0) {
		ha->beacon_blink_led = 0;
		ql_dbg(ql_dbg_mbx, vha, 0x7072, "Done %s\n", __func__);
	} else {
		led[2] = mcp->mb[2];
		led[0] = mcp->mb[3];
		led[1] = mcp->mb[4];
		ql_dbg(ql_dbg_mbx, vha, 0x7073, "Done %s (led=%x,%x,%x)\n",
		    __func__, led[0], led[1], led[2]);
	}

	return rval;
}
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/**
 * qla_no_op_mb(): This MB is used to check if FW is still alive and
 * able to generate an interrupt. Otherwise, a timeout will trigger
 * FW dump + reset
 * @vha: host adapter pointer
 * Return: None
 */
void qla_no_op_mb(struct scsi_qla_host *vha)
{
	mbx_cmd_t mc;
	mbx_cmd_t *mcp = &mc;
	int rval;

	memset(&mc, 0, sizeof(mc));
	mcp->mb[0] = 0; // noop cmd= 0
	mcp->out_mb = MBX_0;
	mcp->in_mb = MBX_0;
	mcp->tov = 5;
	mcp->flags = 0;
	rval = qla2x00_mailbox_command(vha, mcp);

	if (rval) {
		ql_dbg(ql_dbg_async, vha, 0x7071,
			"Failed %s %x\n", __func__, rval);
	}
}