intel_panel.c 69.8 KB
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/*
 * Copyright © 2006-2010 Intel Corporation
 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Eric Anholt <eric@anholt.net>
 *      Dave Airlie <airlied@linux.ie>
 *      Jesse Barnes <jesse.barnes@intel.com>
 *      Chris Wilson <chris@chris-wilson.co.uk>
 */

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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

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#include <linux/kernel.h>
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#include <linux/moduleparam.h>
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#include <linux/pwm.h>
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#include "intel_connector.h"
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#include "intel_de.h"
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#include "intel_display_types.h"
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#include "intel_dp_aux_backlight.h"
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#include "intel_dsi_dcs_backlight.h"
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#include "intel_panel.h"
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void
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intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
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		       struct drm_display_mode *adjusted_mode)
{
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	drm_mode_copy(adjusted_mode, fixed_mode);
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	drm_mode_set_crtcinfo(adjusted_mode, 0);
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}

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static bool is_downclock_mode(const struct drm_display_mode *downclock_mode,
			      const struct drm_display_mode *fixed_mode)
{
	return drm_mode_match(downclock_mode, fixed_mode,
			      DRM_MODE_MATCH_TIMINGS |
			      DRM_MODE_MATCH_FLAGS |
			      DRM_MODE_MATCH_3D_FLAGS) &&
		downclock_mode->clock < fixed_mode->clock;
}

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struct drm_display_mode *
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intel_panel_edid_downclock_mode(struct intel_connector *connector,
				const struct drm_display_mode *fixed_mode)
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{
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	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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	const struct drm_display_mode *scan, *best_mode = NULL;
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	struct drm_display_mode *downclock_mode;
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	int best_clock = fixed_mode->clock;
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	list_for_each_entry(scan, &connector->base.probed_modes, head) {
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		/*
		 * If one mode has the same resolution with the fixed_panel
		 * mode while they have the different refresh rate, it means
		 * that the reduced downclock is found. In such
		 * case we can set the different FPx0/1 to dynamically select
		 * between low and high frequency.
		 */
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		if (is_downclock_mode(scan, fixed_mode) &&
		    scan->clock < best_clock) {
			/*
			 * The downclock is already found. But we
			 * expect to find the lower downclock.
			 */
			best_clock = scan->clock;
			best_mode = scan;
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		}
	}

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	if (!best_mode)
		return NULL;

	downclock_mode = drm_mode_duplicate(&dev_priv->drm, best_mode);
	if (!downclock_mode)
		return NULL;

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	drm_dbg_kms(&dev_priv->drm,
		    "[CONNECTOR:%d:%s] using downclock mode from EDID: ",
		    connector->base.base.id, connector->base.name);
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	drm_mode_debug_printmodeline(downclock_mode);
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	return downclock_mode;
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}

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struct drm_display_mode *
intel_panel_edid_fixed_mode(struct intel_connector *connector)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	const struct drm_display_mode *scan;
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	struct drm_display_mode *fixed_mode;

	if (list_empty(&connector->base.probed_modes))
		return NULL;
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	/* prefer fixed mode from EDID if available */
	list_for_each_entry(scan, &connector->base.probed_modes, head) {
		if ((scan->type & DRM_MODE_TYPE_PREFERRED) == 0)
			continue;

		fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan);
		if (!fixed_mode)
			return NULL;

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		drm_dbg_kms(&dev_priv->drm,
			    "[CONNECTOR:%d:%s] using preferred mode from EDID: ",
			    connector->base.base.id, connector->base.name);
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		drm_mode_debug_printmodeline(fixed_mode);

		return fixed_mode;
	}

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	scan = list_first_entry(&connector->base.probed_modes,
				typeof(*scan), head);

	fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan);
	if (!fixed_mode)
		return NULL;

	fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;

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	drm_dbg_kms(&dev_priv->drm,
		    "[CONNECTOR:%d:%s] using first mode from EDID: ",
		    connector->base.base.id, connector->base.name);
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	drm_mode_debug_printmodeline(fixed_mode);

	return fixed_mode;
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}

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struct drm_display_mode *
intel_panel_vbt_fixed_mode(struct intel_connector *connector)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct drm_display_info *info = &connector->base.display_info;
	struct drm_display_mode *fixed_mode;

	if (!dev_priv->vbt.lfp_lvds_vbt_mode)
		return NULL;

	fixed_mode = drm_mode_duplicate(&dev_priv->drm,
					dev_priv->vbt.lfp_lvds_vbt_mode);
	if (!fixed_mode)
		return NULL;

	fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;

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	drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s] using mode from VBT: ",
		    connector->base.base.id, connector->base.name);
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	drm_mode_debug_printmodeline(fixed_mode);

	info->width_mm = fixed_mode->width_mm;
	info->height_mm = fixed_mode->height_mm;

	return fixed_mode;
}

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/* adjusted_mode has been preset to be the panel's fixed mode */
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int intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
			    const struct drm_connector_state *conn_state)
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{
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	const struct drm_display_mode *adjusted_mode =
		&crtc_state->hw.adjusted_mode;
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	int x, y, width, height;
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	/* Native modes don't need fitting */
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	if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w &&
	    adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h &&
	    crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
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		return 0;
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	switch (conn_state->scaling_mode) {
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	case DRM_MODE_SCALE_CENTER:
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		width = crtc_state->pipe_src_w;
		height = crtc_state->pipe_src_h;
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		x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
		y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
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		break;

	case DRM_MODE_SCALE_ASPECT:
		/* Scale but preserve the aspect ratio */
		{
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			u32 scaled_width = adjusted_mode->crtc_hdisplay
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				* crtc_state->pipe_src_h;
			u32 scaled_height = crtc_state->pipe_src_w
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				* adjusted_mode->crtc_vdisplay;
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			if (scaled_width > scaled_height) { /* pillar */
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				width = scaled_height / crtc_state->pipe_src_h;
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				if (width & 1)
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					width++;
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				x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
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				y = 0;
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				height = adjusted_mode->crtc_vdisplay;
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			} else if (scaled_width < scaled_height) { /* letter */
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				height = scaled_width / crtc_state->pipe_src_w;
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				if (height & 1)
				    height++;
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				y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
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				x = 0;
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				width = adjusted_mode->crtc_hdisplay;
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			} else {
				x = y = 0;
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				width = adjusted_mode->crtc_hdisplay;
				height = adjusted_mode->crtc_vdisplay;
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			}
		}
		break;

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	case DRM_MODE_SCALE_NONE:
		WARN_ON(adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w);
		WARN_ON(adjusted_mode->crtc_vdisplay != crtc_state->pipe_src_h);
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		fallthrough;
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	case DRM_MODE_SCALE_FULLSCREEN:
		x = y = 0;
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		width = adjusted_mode->crtc_hdisplay;
		height = adjusted_mode->crtc_vdisplay;
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		break;
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	default:
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		MISSING_CASE(conn_state->scaling_mode);
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		return -EINVAL;
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	}

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	drm_rect_init(&crtc_state->pch_pfit.dst,
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		      x, y, width, height);
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	crtc_state->pch_pfit.enabled = true;
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	return 0;
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}
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static void
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centre_horizontally(struct drm_display_mode *adjusted_mode,
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		    int width)
{
	u32 border, sync_pos, blank_width, sync_width;

	/* keep the hsync and hblank widths constant */
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	sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
	blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
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	sync_pos = (blank_width - sync_width + 1) / 2;

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	border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
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	border += border & 1; /* make the border even */

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	adjusted_mode->crtc_hdisplay = width;
	adjusted_mode->crtc_hblank_start = width + border;
	adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
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	adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
	adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
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}

static void
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centre_vertically(struct drm_display_mode *adjusted_mode,
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		  int height)
{
	u32 border, sync_pos, blank_width, sync_width;

	/* keep the vsync and vblank widths constant */
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	sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
	blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
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	sync_pos = (blank_width - sync_width + 1) / 2;

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	border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
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	adjusted_mode->crtc_vdisplay = height;
	adjusted_mode->crtc_vblank_start = height + border;
	adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
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	adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
	adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
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}

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static u32 panel_fitter_scaling(u32 source, u32 target)
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{
	/*
	 * Floating point operation is not supported. So the FACTOR
	 * is defined, which can avoid the floating point computation
	 * when calculating the panel ratio.
	 */
#define ACCURACY 12
#define FACTOR (1 << ACCURACY)
	u32 ratio = source * FACTOR / target;
	return (FACTOR * ratio + FACTOR/2) / FACTOR;
}

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static void i965_scale_aspect(struct intel_crtc_state *crtc_state,
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			      u32 *pfit_control)
{
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	const struct drm_display_mode *adjusted_mode =
		&crtc_state->hw.adjusted_mode;
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	u32 scaled_width = adjusted_mode->crtc_hdisplay *
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		crtc_state->pipe_src_h;
	u32 scaled_height = crtc_state->pipe_src_w *
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		adjusted_mode->crtc_vdisplay;
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	/* 965+ is easy, it does everything in hw */
	if (scaled_width > scaled_height)
		*pfit_control |= PFIT_ENABLE |
			PFIT_SCALING_PILLAR;
	else if (scaled_width < scaled_height)
		*pfit_control |= PFIT_ENABLE |
			PFIT_SCALING_LETTER;
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	else if (adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w)
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		*pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
}

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static void i9xx_scale_aspect(struct intel_crtc_state *crtc_state,
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			      u32 *pfit_control, u32 *pfit_pgm_ratios,
			      u32 *border)
{
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	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
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	u32 scaled_width = adjusted_mode->crtc_hdisplay *
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		crtc_state->pipe_src_h;
	u32 scaled_height = crtc_state->pipe_src_w *
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		adjusted_mode->crtc_vdisplay;
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	u32 bits;

	/*
	 * For earlier chips we have to calculate the scaling
	 * ratio by hand and program it into the
	 * PFIT_PGM_RATIO register
	 */
	if (scaled_width > scaled_height) { /* pillar */
		centre_horizontally(adjusted_mode,
				    scaled_height /
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				    crtc_state->pipe_src_h);
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		*border = LVDS_BORDER_ENABLE;
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		if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay) {
			bits = panel_fitter_scaling(crtc_state->pipe_src_h,
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						    adjusted_mode->crtc_vdisplay);
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			*pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
					     bits << PFIT_VERT_SCALE_SHIFT);
			*pfit_control |= (PFIT_ENABLE |
					  VERT_INTERP_BILINEAR |
					  HORIZ_INTERP_BILINEAR);
		}
	} else if (scaled_width < scaled_height) { /* letter */
		centre_vertically(adjusted_mode,
				  scaled_width /
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				  crtc_state->pipe_src_w);
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		*border = LVDS_BORDER_ENABLE;
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		if (crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) {
			bits = panel_fitter_scaling(crtc_state->pipe_src_w,
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						    adjusted_mode->crtc_hdisplay);
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			*pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
					     bits << PFIT_VERT_SCALE_SHIFT);
			*pfit_control |= (PFIT_ENABLE |
					  VERT_INTERP_BILINEAR |
					  HORIZ_INTERP_BILINEAR);
		}
	} else {
		/* Aspects match, Let hw scale both directions */
		*pfit_control |= (PFIT_ENABLE |
				  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
				  VERT_INTERP_BILINEAR |
				  HORIZ_INTERP_BILINEAR);
	}
}

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int intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
			     const struct drm_connector_state *conn_state)
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{
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	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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	u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
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	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
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	/* Native modes don't need fitting */
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	if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w &&
	    adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h)
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		goto out;

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	switch (conn_state->scaling_mode) {
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	case DRM_MODE_SCALE_CENTER:
		/*
		 * For centered modes, we have to calculate border widths &
		 * heights and modify the values programmed into the CRTC.
		 */
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		centre_horizontally(adjusted_mode, crtc_state->pipe_src_w);
		centre_vertically(adjusted_mode, crtc_state->pipe_src_h);
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		border = LVDS_BORDER_ENABLE;
		break;
	case DRM_MODE_SCALE_ASPECT:
		/* Scale but preserve the aspect ratio */
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		if (DISPLAY_VER(dev_priv) >= 4)
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			i965_scale_aspect(crtc_state, &pfit_control);
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		else
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			i9xx_scale_aspect(crtc_state, &pfit_control,
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					  &pfit_pgm_ratios, &border);
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		break;
	case DRM_MODE_SCALE_FULLSCREEN:
		/*
		 * Full scaling, even if it changes the aspect ratio.
		 * Fortunately this is all done for us in hw.
		 */
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		if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay ||
		    crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) {
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			pfit_control |= PFIT_ENABLE;
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			if (DISPLAY_VER(dev_priv) >= 4)
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				pfit_control |= PFIT_SCALING_AUTO;
			else
				pfit_control |= (VERT_AUTO_SCALE |
						 VERT_INTERP_BILINEAR |
						 HORIZ_AUTO_SCALE |
						 HORIZ_INTERP_BILINEAR);
		}
		break;
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	default:
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		MISSING_CASE(conn_state->scaling_mode);
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		return -EINVAL;
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	}

	/* 965+ wants fuzzy fitting */
	/* FIXME: handle multiple panels by failing gracefully */
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	if (DISPLAY_VER(dev_priv) >= 4)
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		pfit_control |= PFIT_PIPE(crtc->pipe) | PFIT_FILTER_FUZZY;
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out:
	if ((pfit_control & PFIT_ENABLE) == 0) {
		pfit_control = 0;
		pfit_pgm_ratios = 0;
	}

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	/* Make sure pre-965 set dither correctly for 18bpp panels. */
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	if (DISPLAY_VER(dev_priv) < 4 && crtc_state->pipe_bpp == 18)
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		pfit_control |= PANEL_8TO6_DITHER_ENABLE;

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	crtc_state->gmch_pfit.control = pfit_control;
	crtc_state->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
	crtc_state->gmch_pfit.lvds_border_bits = border;
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	return 0;
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}

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/**
 * scale - scale values from one range to another
 * @source_val: value in range [@source_min..@source_max]
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 * @source_min: minimum legal value for @source_val
 * @source_max: maximum legal value for @source_val
 * @target_min: corresponding target value for @source_min
 * @target_max: corresponding target value for @source_max
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 *
 * Return @source_val in range [@source_min..@source_max] scaled to range
 * [@target_min..@target_max].
 */
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static u32 scale(u32 source_val,
		 u32 source_min, u32 source_max,
		 u32 target_min, u32 target_max)
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{
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	u64 target_val;
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	WARN_ON(source_min > source_max);
	WARN_ON(target_min > target_max);

	/* defensive */
	source_val = clamp(source_val, source_min, source_max);

	/* avoid overflows */
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	target_val = mul_u32_u32(source_val - source_min,
				 target_max - target_min);
	target_val = DIV_ROUND_CLOSEST_ULL(target_val, source_max - source_min);
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	target_val += target_min;

	return target_val;
}

/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
 * to [hw_min..hw_max]. */
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static u32 clamp_user_to_hw(struct intel_connector *connector,
			    u32 user_level, u32 user_max)
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{
	struct intel_panel *panel = &connector->panel;
	u32 hw_level;

	hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
	hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);

	return hw_level;
}

/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
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static u32 scale_hw_to_user(struct intel_connector *connector,
			    u32 hw_level, u32 user_max)
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{
	struct intel_panel *panel = &connector->panel;

	return scale(hw_level, panel->backlight.min, panel->backlight.max,
		     0, user_max);
}

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u32 intel_panel_invert_pwm_level(struct intel_connector *connector, u32 val)
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{
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	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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	struct intel_panel *panel = &connector->panel;

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	drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0);
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	if (dev_priv->params.invert_brightness < 0)
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		return val;

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	if (dev_priv->params.invert_brightness > 0 ||
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	    dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
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		return panel->backlight.pwm_level_max - val + panel->backlight.pwm_level_min;
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	}
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	return val;
}

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void intel_panel_set_pwm_level(const struct drm_connector_state *conn_state, u32 val)
{
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
	struct drm_i915_private *i915 = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;

	drm_dbg_kms(&i915->drm, "set backlight PWM = %d\n", val);
	panel->backlight.pwm_funcs->set(conn_state, val);
}

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u32 intel_panel_backlight_level_to_pwm(struct intel_connector *connector, u32 val)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;

	drm_WARN_ON_ONCE(&dev_priv->drm,
			 panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0);

	val = scale(val, panel->backlight.min, panel->backlight.max,
		    panel->backlight.pwm_level_min, panel->backlight.pwm_level_max);

	return intel_panel_invert_pwm_level(connector, val);
}

u32 intel_panel_backlight_level_from_pwm(struct intel_connector *connector, u32 val)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;

	drm_WARN_ON_ONCE(&dev_priv->drm,
			 panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0);

	if (dev_priv->params.invert_brightness > 0 ||
	    (dev_priv->params.invert_brightness == 0 && dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS))
		val = panel->backlight.pwm_level_max - (val - panel->backlight.pwm_level_min);

	return scale(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max,
		     panel->backlight.min, panel->backlight.max);
}

573
static u32 lpt_get_backlight(struct intel_connector *connector, enum pipe unused)
574
{
575
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
576

577
	return intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
578
}
579

580
static u32 pch_get_backlight(struct intel_connector *connector, enum pipe unused)
581
{
582
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
583

584
	return intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
585
}
586

587
static u32 i9xx_get_backlight(struct intel_connector *connector, enum pipe unused)
588
{
589
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
590
	struct intel_panel *panel = &connector->panel;
591
	u32 val;
592

593
	val = intel_de_read(dev_priv, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
594
	if (DISPLAY_VER(dev_priv) < 4)
595
		val >>= 1;
596

597
	if (panel->backlight.combination_mode) {
598
		u8 lbpc;
599

600
		pci_read_config_byte(to_pci_dev(dev_priv->drm.dev), LBPC, &lbpc);
601
		val *= lbpc;
602 603
	}

604 605 606
	return val;
}

607
static u32 vlv_get_backlight(struct intel_connector *connector, enum pipe pipe)
608
{
609 610
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);

611
	if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B))
612 613
		return 0;

614
	return intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
615 616
}

617
static u32 bxt_get_backlight(struct intel_connector *connector, enum pipe unused)
618
{
619
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
620
	struct intel_panel *panel = &connector->panel;
621

622 623
	return intel_de_read(dev_priv,
			     BXT_BLC_PWM_DUTY(panel->backlight.controller));
624 625
}

626
static u32 ext_pwm_get_backlight(struct intel_connector *connector, enum pipe unused)
627 628
{
	struct intel_panel *panel = &connector->panel;
629
	struct pwm_state state;
630

631 632
	pwm_get_state(panel->backlight.pwm, &state);
	return pwm_get_relative_duty_cycle(&state, 100);
633 634
}

635
static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
636
{
637
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
638
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
639

640 641
	u32 val = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, val | level);
642 643
}

644
static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level)
645
{
646
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
647
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
648 649
	u32 tmp;

650 651
	tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
	intel_de_write(dev_priv, BLC_PWM_CPU_CTL, tmp | level);
652 653
}

654
static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level)
655
{
656
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
657
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
658
	struct intel_panel *panel = &connector->panel;
659
	u32 tmp, mask;
660

661
	drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0);
662

663
	if (panel->backlight.combination_mode) {
664 665
		u8 lbpc;

666
		lbpc = level * 0xfe / panel->backlight.pwm_level_max + 1;
667
		level /= lbpc;
668
		pci_write_config_byte(to_pci_dev(dev_priv->drm.dev), LBPC, lbpc);
669 670
	}

671
	if (DISPLAY_VER(dev_priv) == 4) {
672 673
		mask = BACKLIGHT_DUTY_CYCLE_MASK;
	} else {
674
		level <<= 1;
675 676
		mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
	}
677

678 679
	tmp = intel_de_read(dev_priv, BLC_PWM_CTL) & ~mask;
	intel_de_write(dev_priv, BLC_PWM_CTL, tmp | level);
680 681
}

682
static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level)
683
{
684
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
685
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
686
	enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
687 688
	u32 tmp;

689 690
	tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
	intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), tmp | level);
691 692
}

693
static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
694
{
695
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
696
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
697
	struct intel_panel *panel = &connector->panel;
698

699 700
	intel_de_write(dev_priv,
		       BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
701 702
}

703
static void ext_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level)
704
{
705
	struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel;
706

707 708
	pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100);
	pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state);
709 710
}

711
static void
712
intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level)
713
{
714
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
715
	struct drm_i915_private *i915 = to_i915(connector->base.dev);
716
	struct intel_panel *panel = &connector->panel;
717

718
	drm_dbg_kms(&i915->drm, "set backlight level = %d\n", level);
719

720
	panel->backlight.funcs->set(conn_state, level);
721
}
722

723 724 725
/* set backlight brightness to level in range [0..max], assuming hw min is
 * respected.
 */
726
void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
727 728
				    u32 user_level, u32 user_max)
{
729
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
730
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
731 732 733
	struct intel_panel *panel = &connector->panel;
	u32 hw_level;

734
	/*
735
	 * Lack of crtc may occur during driver init because
736 737 738 739
	 * connection_mutex isn't held across the entire backlight
	 * setup + modeset readout, and the BIOS can issue the
	 * requests at any time.
	 */
740
	if (!panel->backlight.present || !conn_state->crtc)
741 742
		return;

743
	mutex_lock(&dev_priv->backlight_lock);
744

745
	drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
746 747 748

	hw_level = clamp_user_to_hw(connector, user_level, user_max);
	panel->backlight.level = hw_level;
749

750
	if (panel->backlight.device)
751 752 753 754
		panel->backlight.device->props.brightness =
			scale_hw_to_user(connector,
					 panel->backlight.level,
					 panel->backlight.device->props.max_brightness);
755

756
	if (panel->backlight.enabled)
757
		intel_panel_actually_set_backlight(conn_state, hw_level);
758

759
	mutex_unlock(&dev_priv->backlight_lock);
760 761
}

762
static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level)
763
{
764
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
765
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
766 767
	u32 tmp;

768
	intel_panel_set_pwm_level(old_conn_state, level);
769

770 771 772 773 774 775 776 777
	/*
	 * Although we don't support or enable CPU PWM with LPT/SPT based
	 * systems, it may have been enabled prior to loading the
	 * driver. Disable to avoid warnings on LCPLL disable.
	 *
	 * This needs rework if we need to add support for CPU PWM on PCH split
	 * platforms.
	 */
778
	tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
779
	if (tmp & BLM_PWM_ENABLE) {
780 781
		drm_dbg_kms(&dev_priv->drm,
			    "cpu backlight was enabled, disabling\n");
782 783
		intel_de_write(dev_priv, BLC_PWM_CPU_CTL2,
			       tmp & ~BLM_PWM_ENABLE);
784 785
	}

786 787
	tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
788 789
}

790
static void pch_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
791
{
792
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
793
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
794 795
	u32 tmp;

796
	intel_panel_set_pwm_level(old_conn_state, val);
797

798 799
	tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
	intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
800

801 802
	tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
803 804
}

805
static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
806
{
807
	intel_panel_set_pwm_level(old_conn_state, val);
808 809
}

810
static void i965_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
811
{
812
	struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev);
813 814
	u32 tmp;

815
	intel_panel_set_pwm_level(old_conn_state, val);
816

817 818
	tmp = intel_de_read(dev_priv, BLC_PWM_CTL2);
	intel_de_write(dev_priv, BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
819 820
}

821
static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
822
{
823
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
824
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
825
	enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe;
826 827
	u32 tmp;

828
	intel_panel_set_pwm_level(old_conn_state, val);
829

830 831 832
	tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
	intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe),
		       tmp & ~BLM_PWM_ENABLE);
833 834
}

835
static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
836
{
837
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
838
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
839
	struct intel_panel *panel = &connector->panel;
840
	u32 tmp;
841

842
	intel_panel_set_pwm_level(old_conn_state, val);
843

844 845 846 847
	tmp = intel_de_read(dev_priv,
			    BXT_BLC_PWM_CTL(panel->backlight.controller));
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       tmp & ~BXT_BLC_PWM_ENABLE);
848 849

	if (panel->backlight.controller == 1) {
850
		val = intel_de_read(dev_priv, UTIL_PIN_CTL);
851
		val &= ~UTIL_PIN_ENABLE;
852
		intel_de_write(dev_priv, UTIL_PIN_CTL, val);
853
	}
854 855
}

856
static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
857
{
858
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
859 860 861 862
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 tmp;

863
	intel_panel_set_pwm_level(old_conn_state, val);
864

865 866 867 868
	tmp = intel_de_read(dev_priv,
			    BXT_BLC_PWM_CTL(panel->backlight.controller));
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       tmp & ~BXT_BLC_PWM_ENABLE);
869 870
}

871
static void ext_pwm_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level)
872
{
873
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
874 875
	struct intel_panel *panel = &connector->panel;

876 877
	panel->backlight.pwm_state.enabled = false;
	pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state);
878 879
}

880
void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state)
881
{
882
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
883
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
884
	struct intel_panel *panel = &connector->panel;
885

886
	if (!panel->backlight.present)
887 888
		return;

889
	/*
890
	 * Do not disable backlight on the vga_switcheroo path. When switching
891 892 893 894
	 * away from i915, the other client may depend on i915 to handle the
	 * backlight. This will leave the backlight on unnecessarily when
	 * another client is not activated.
	 */
895
	if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) {
896 897
		drm_dbg_kms(&dev_priv->drm,
			    "Skipping backlight disable on vga switch\n");
898 899 900
		return;
	}

901
	mutex_lock(&dev_priv->backlight_lock);
902

903 904
	if (panel->backlight.device)
		panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
905
	panel->backlight.enabled = false;
906
	panel->backlight.funcs->disable(old_conn_state, 0);
907

908
	mutex_unlock(&dev_priv->backlight_lock);
909
}
910

911
static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,
912
				 const struct drm_connector_state *conn_state, u32 level)
913
{
914
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
915
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
916
	struct intel_panel *panel = &connector->panel;
917
	u32 pch_ctl1, pch_ctl2, schicken;
918

919
	pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
920
	if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
921
		drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n");
922
		pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
923
		intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1);
924
	}
925

926
	if (HAS_PCH_LPT(dev_priv)) {
927
		schicken = intel_de_read(dev_priv, SOUTH_CHICKEN2);
928 929 930 931
		if (panel->backlight.alternate_pwm_increment)
			schicken |= LPT_PWM_GRANULARITY;
		else
			schicken &= ~LPT_PWM_GRANULARITY;
932
		intel_de_write(dev_priv, SOUTH_CHICKEN2, schicken);
933
	} else {
934
		schicken = intel_de_read(dev_priv, SOUTH_CHICKEN1);
935 936 937 938
		if (panel->backlight.alternate_pwm_increment)
			schicken |= SPT_PWM_GRANULARITY;
		else
			schicken &= ~SPT_PWM_GRANULARITY;
939
		intel_de_write(dev_priv, SOUTH_CHICKEN1, schicken);
940 941
	}

942
	pch_ctl2 = panel->backlight.pwm_level_max << 16;
943
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2);
944

945 946 947
	pch_ctl1 = 0;
	if (panel->backlight.active_low_pwm)
		pch_ctl1 |= BLM_PCH_POLARITY;
948

949 950 951
	/* After LPT, override is the default. */
	if (HAS_PCH_LPT(dev_priv))
		pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
952

953 954 955 956
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1);
	intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1);
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1,
		       pch_ctl1 | BLM_PCH_PWM_ENABLE);
957 958

	/* This won't stick until the above enable. */
959
	intel_panel_set_pwm_level(conn_state, level);
960 961
}

962
static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
963
				 const struct drm_connector_state *conn_state, u32 level)
964
{
965
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
966
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
967
	struct intel_panel *panel = &connector->panel;
968
	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
969
	u32 cpu_ctl2, pch_ctl1, pch_ctl2;
970

971
	cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
972
	if (cpu_ctl2 & BLM_PWM_ENABLE) {
973
		drm_dbg_kms(&dev_priv->drm, "cpu backlight already enabled\n");
974
		cpu_ctl2 &= ~BLM_PWM_ENABLE;
975
		intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2);
976
	}
977

978
	pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
979
	if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
980
		drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n");
981
		pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
982
		intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1);
983
	}
984 985

	if (cpu_transcoder == TRANSCODER_EDP)
986
		cpu_ctl2 = BLM_TRANSCODER_EDP;
987
	else
988
		cpu_ctl2 = BLM_PIPE(cpu_transcoder);
989 990 991
	intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2);
	intel_de_posting_read(dev_priv, BLC_PWM_CPU_CTL2);
	intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
992

993
	/* This won't stick until the above enable. */
994
	intel_panel_set_pwm_level(conn_state, level);
995

996
	pch_ctl2 = panel->backlight.pwm_level_max << 16;
997
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2);
998 999 1000 1001

	pch_ctl1 = 0;
	if (panel->backlight.active_low_pwm)
		pch_ctl1 |= BLM_PCH_POLARITY;
1002

1003 1004 1005 1006
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1);
	intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1);
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1,
		       pch_ctl1 | BLM_PCH_PWM_ENABLE);
1007 1008
}

1009
static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,
1010
				  const struct drm_connector_state *conn_state, u32 level)
1011
{
1012
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1013
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1014
	struct intel_panel *panel = &connector->panel;
1015 1016
	u32 ctl, freq;

1017
	ctl = intel_de_read(dev_priv, BLC_PWM_CTL);
1018
	if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
1019
		drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1020
		intel_de_write(dev_priv, BLC_PWM_CTL, 0);
1021
	}
1022

1023
	freq = panel->backlight.pwm_level_max;
1024 1025 1026 1027
	if (panel->backlight.combination_mode)
		freq /= 0xff;

	ctl = freq << 17;
1028
	if (panel->backlight.combination_mode)
1029
		ctl |= BLM_LEGACY_MODE;
1030
	if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
1031 1032
		ctl |= BLM_POLARITY_PNV;

1033 1034
	intel_de_write(dev_priv, BLC_PWM_CTL, ctl);
	intel_de_posting_read(dev_priv, BLC_PWM_CTL);
1035 1036

	/* XXX: combine this into above write? */
1037
	intel_panel_set_pwm_level(conn_state, level);
1038 1039 1040 1041 1042 1043

	/*
	 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
	 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
	 * that has backlight.
	 */
1044
	if (DISPLAY_VER(dev_priv) == 2)
1045
		intel_de_write(dev_priv, BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
1046
}
1047

1048
static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,
1049
				  const struct drm_connector_state *conn_state, u32 level)
1050
{
1051
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1052
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1053
	struct intel_panel *panel = &connector->panel;
1054
	enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
1055
	u32 ctl, ctl2, freq;
1056

1057
	ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2);
1058
	if (ctl2 & BLM_PWM_ENABLE) {
1059
		drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1060
		ctl2 &= ~BLM_PWM_ENABLE;
1061
		intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2);
1062
	}
1063

1064
	freq = panel->backlight.pwm_level_max;
1065 1066
	if (panel->backlight.combination_mode)
		freq /= 0xff;
1067

1068
	ctl = freq << 16;
1069
	intel_de_write(dev_priv, BLC_PWM_CTL, ctl);
1070

1071 1072 1073 1074 1075
	ctl2 = BLM_PIPE(pipe);
	if (panel->backlight.combination_mode)
		ctl2 |= BLM_COMBINATION_MODE;
	if (panel->backlight.active_low_pwm)
		ctl2 |= BLM_POLARITY_I965;
1076 1077 1078
	intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2);
	intel_de_posting_read(dev_priv, BLC_PWM_CTL2);
	intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
1079

1080
	intel_panel_set_pwm_level(conn_state, level);
1081 1082
}

1083
static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,
1084
				 const struct drm_connector_state *conn_state, u32 level)
1085
{
1086
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1087
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1088
	struct intel_panel *panel = &connector->panel;
1089
	enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
1090
	u32 ctl, ctl2;
1091

1092
	ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
1093
	if (ctl2 & BLM_PWM_ENABLE) {
1094
		drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1095
		ctl2 &= ~BLM_PWM_ENABLE;
1096
		intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2);
1097
	}
1098

1099
	ctl = panel->backlight.pwm_level_max << 16;
1100
	intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), ctl);
1101

1102
	/* XXX: combine this into above write? */
1103
	intel_panel_set_pwm_level(conn_state, level);
1104

1105 1106 1107
	ctl2 = 0;
	if (panel->backlight.active_low_pwm)
		ctl2 |= BLM_POLARITY_I965;
1108 1109 1110 1111
	intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2);
	intel_de_posting_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
	intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe),
		       ctl2 | BLM_PWM_ENABLE);
1112 1113
}

1114
static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state,
1115
				 const struct drm_connector_state *conn_state, u32 level)
1116
{
1117
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1118
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1119
	struct intel_panel *panel = &connector->panel;
1120
	enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
1121 1122
	u32 pwm_ctl, val;

1123
	/* Controller 1 uses the utility pin. */
1124
	if (panel->backlight.controller == 1) {
1125
		val = intel_de_read(dev_priv, UTIL_PIN_CTL);
1126
		if (val & UTIL_PIN_ENABLE) {
1127 1128
			drm_dbg_kms(&dev_priv->drm,
				    "util pin already enabled\n");
1129
			val &= ~UTIL_PIN_ENABLE;
1130
			intel_de_write(dev_priv, UTIL_PIN_CTL, val);
1131
		}
1132

1133 1134 1135
		val = 0;
		if (panel->backlight.util_pin_active_low)
			val |= UTIL_PIN_POLARITY;
1136 1137
		intel_de_write(dev_priv, UTIL_PIN_CTL,
			       val | UTIL_PIN_PIPE(pipe) | UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
1138 1139
	}

1140 1141
	pwm_ctl = intel_de_read(dev_priv,
				BXT_BLC_PWM_CTL(panel->backlight.controller));
1142
	if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1143
		drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1144
		pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1145 1146 1147
		intel_de_write(dev_priv,
			       BXT_BLC_PWM_CTL(panel->backlight.controller),
			       pwm_ctl);
1148 1149
	}

1150 1151
	intel_de_write(dev_priv,
		       BXT_BLC_PWM_FREQ(panel->backlight.controller),
1152
		       panel->backlight.pwm_level_max);
1153

1154
	intel_panel_set_pwm_level(conn_state, level);
1155 1156 1157 1158 1159

	pwm_ctl = 0;
	if (panel->backlight.active_low_pwm)
		pwm_ctl |= BXT_BLC_PWM_POLARITY;

1160 1161 1162 1163 1164 1165
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       pwm_ctl);
	intel_de_posting_read(dev_priv,
			      BXT_BLC_PWM_CTL(panel->backlight.controller));
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       pwm_ctl | BXT_BLC_PWM_ENABLE);
1166 1167
}

1168
static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,
1169
				 const struct drm_connector_state *conn_state, u32 level)
1170
{
1171
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1172 1173 1174 1175
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 pwm_ctl;

1176 1177
	pwm_ctl = intel_de_read(dev_priv,
				BXT_BLC_PWM_CTL(panel->backlight.controller));
1178
	if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1179
		drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1180
		pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1181 1182 1183
		intel_de_write(dev_priv,
			       BXT_BLC_PWM_CTL(panel->backlight.controller),
			       pwm_ctl);
1184 1185
	}

1186 1187
	intel_de_write(dev_priv,
		       BXT_BLC_PWM_FREQ(panel->backlight.controller),
1188
		       panel->backlight.pwm_level_max);
1189

1190
	intel_panel_set_pwm_level(conn_state, level);
1191 1192 1193 1194 1195

	pwm_ctl = 0;
	if (panel->backlight.active_low_pwm)
		pwm_ctl |= BXT_BLC_PWM_POLARITY;

1196 1197 1198 1199 1200 1201
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       pwm_ctl);
	intel_de_posting_read(dev_priv,
			      BXT_BLC_PWM_CTL(panel->backlight.controller));
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       pwm_ctl | BXT_BLC_PWM_ENABLE);
1202 1203
}

1204
static void ext_pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
1205
				     const struct drm_connector_state *conn_state, u32 level)
1206
{
1207
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1208 1209
	struct intel_panel *panel = &connector->panel;

1210 1211 1212
	pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100);
	panel->backlight.pwm_state.enabled = true;
	pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state);
1213 1214
}

1215 1216
static void __intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
					   const struct drm_connector_state *conn_state)
1217
{
1218
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1219
	struct intel_panel *panel = &connector->panel;
1220

1221 1222
	WARN_ON(panel->backlight.max == 0);

1223
	if (panel->backlight.level <= panel->backlight.min) {
1224
		panel->backlight.level = panel->backlight.max;
1225 1226
		if (panel->backlight.device)
			panel->backlight.device->props.brightness =
1227 1228 1229
				scale_hw_to_user(connector,
						 panel->backlight.level,
						 panel->backlight.device->props.max_brightness);
1230
	}
1231

1232
	panel->backlight.funcs->enable(crtc_state, conn_state, panel->backlight.level);
1233
	panel->backlight.enabled = true;
1234 1235
	if (panel->backlight.device)
		panel->backlight.device->props.power = FB_BLANK_UNBLANK;
1236 1237 1238 1239 1240 1241 1242 1243
}

void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
				  const struct drm_connector_state *conn_state)
{
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
1244
	enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
1245 1246 1247 1248

	if (!panel->backlight.present)
		return;

1249
	drm_dbg_kms(&dev_priv->drm, "pipe %c\n", pipe_name(pipe));
1250 1251 1252 1253

	mutex_lock(&dev_priv->backlight_lock);

	__intel_panel_enable_backlight(crtc_state, conn_state);
1254

1255
	mutex_unlock(&dev_priv->backlight_lock);
1256 1257
}

1258
#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
1259 1260 1261 1262 1263 1264 1265 1266
static u32 intel_panel_get_backlight(struct intel_connector *connector)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 val = 0;

	mutex_lock(&dev_priv->backlight_lock);

1267
	if (panel->backlight.enabled)
1268
		val = panel->backlight.funcs->get(connector, intel_connector_get_pipe(connector));
1269 1270 1271

	mutex_unlock(&dev_priv->backlight_lock);

1272
	drm_dbg_kms(&dev_priv->drm, "get backlight PWM = %d\n", val);
1273 1274 1275
	return val;
}

1276 1277 1278 1279 1280 1281 1282 1283 1284 1285
/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
static u32 scale_user_to_hw(struct intel_connector *connector,
			    u32 user_level, u32 user_max)
{
	struct intel_panel *panel = &connector->panel;

	return scale(user_level, 0, user_max,
		     panel->backlight.min, panel->backlight.max);
}

1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299
/* set backlight brightness to level in range [0..max], scaling wrt hw min */
static void intel_panel_set_backlight(const struct drm_connector_state *conn_state,
				      u32 user_level, u32 user_max)
{
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 hw_level;

	if (!panel->backlight.present)
		return;

	mutex_lock(&dev_priv->backlight_lock);

1300
	drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
1301 1302 1303 1304 1305 1306 1307 1308 1309 1310

	hw_level = scale_user_to_hw(connector, user_level, user_max);
	panel->backlight.level = hw_level;

	if (panel->backlight.enabled)
		intel_panel_actually_set_backlight(conn_state, hw_level);

	mutex_unlock(&dev_priv->backlight_lock);
}

1311
static int intel_backlight_device_update_status(struct backlight_device *bd)
1312
{
1313
	struct intel_connector *connector = bl_get_data(bd);
1314
	struct intel_panel *panel = &connector->panel;
1315 1316
	struct drm_device *dev = connector->base.dev;

1317
	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1318 1319
	DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
		      bd->props.brightness, bd->props.max_brightness);
1320
	intel_panel_set_backlight(connector->base.state, bd->props.brightness,
1321
				  bd->props.max_brightness);
1322 1323 1324 1325 1326 1327 1328 1329

	/*
	 * Allow flipping bl_power as a sub-state of enabled. Sadly the
	 * backlight class device does not make it easy to to differentiate
	 * between callbacks for brightness and bl_power, so our backlight_power
	 * callback needs to take this into account.
	 */
	if (panel->backlight.enabled) {
1330
		if (panel->backlight.power) {
1331 1332
			bool enable = bd->props.power == FB_BLANK_UNBLANK &&
				bd->props.brightness != 0;
1333
			panel->backlight.power(connector, enable);
1334 1335 1336 1337 1338
		}
	} else {
		bd->props.power = FB_BLANK_POWERDOWN;
	}

1339
	drm_modeset_unlock(&dev->mode_config.connection_mutex);
1340 1341 1342
	return 0;
}

1343
static int intel_backlight_device_get_brightness(struct backlight_device *bd)
1344
{
1345 1346
	struct intel_connector *connector = bl_get_data(bd);
	struct drm_device *dev = connector->base.dev;
1347
	struct drm_i915_private *dev_priv = to_i915(dev);
1348
	intel_wakeref_t wakeref;
1349
	int ret = 0;
1350

1351
	with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) {
1352
		u32 hw_level;
1353

1354
		drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1355

1356 1357 1358 1359 1360 1361
		hw_level = intel_panel_get_backlight(connector);
		ret = scale_hw_to_user(connector,
				       hw_level, bd->props.max_brightness);

		drm_modeset_unlock(&dev->mode_config.connection_mutex);
	}
1362

1363
	return ret;
1364 1365
}

1366 1367 1368
static const struct backlight_ops intel_backlight_device_ops = {
	.update_status = intel_backlight_device_update_status,
	.get_brightness = intel_backlight_device_get_brightness,
1369 1370
};

1371
int intel_backlight_device_register(struct intel_connector *connector)
1372
{
1373
	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1374
	struct intel_panel *panel = &connector->panel;
1375
	struct backlight_properties props;
1376 1377 1378
	struct backlight_device *bd;
	const char *name;
	int ret = 0;
1379

1380
	if (WARN_ON(panel->backlight.device))
1381 1382
		return -ENODEV;

1383 1384 1385
	if (!panel->backlight.present)
		return 0;

1386
	WARN_ON(panel->backlight.max == 0);
1387

1388
	memset(&props, 0, sizeof(props));
1389
	props.type = BACKLIGHT_RAW;
1390 1391 1392 1393 1394

	/*
	 * Note: Everything should work even if the backlight device max
	 * presented to the userspace is arbitrarily chosen.
	 */
1395
	props.max_brightness = panel->backlight.max;
1396 1397 1398
	props.brightness = scale_hw_to_user(connector,
					    panel->backlight.level,
					    props.max_brightness);
1399

1400 1401 1402 1403 1404
	if (panel->backlight.enabled)
		props.power = FB_BLANK_UNBLANK;
	else
		props.power = FB_BLANK_POWERDOWN;

1405 1406 1407 1408 1409 1410
	name = kstrdup("intel_backlight", GFP_KERNEL);
	if (!name)
		return -ENOMEM;

	bd = backlight_device_register(name, connector->base.kdev, connector,
				       &intel_backlight_device_ops, &props);
1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429

	/*
	 * Using the same name independent of the drm device or connector
	 * prevents registration of multiple backlight devices in the
	 * driver. However, we need to use the default name for backward
	 * compatibility. Use unique names for subsequent backlight devices as a
	 * fallback when the default name already exists.
	 */
	if (IS_ERR(bd) && PTR_ERR(bd) == -EEXIST) {
		kfree(name);
		name = kasprintf(GFP_KERNEL, "card%d-%s-backlight",
				 i915->drm.primary->index, connector->base.name);
		if (!name)
			return -ENOMEM;

		bd = backlight_device_register(name, connector->base.kdev, connector,
					       &intel_backlight_device_ops, &props);
	}

1430 1431 1432 1433 1434 1435
	if (IS_ERR(bd)) {
		drm_err(&i915->drm,
			"[CONNECTOR:%d:%s] backlight device %s register failed: %ld\n",
			connector->base.base.id, connector->base.name, name, PTR_ERR(bd));
		ret = PTR_ERR(bd);
		goto out;
1436
	}
1437

1438 1439
	panel->backlight.device = bd;

1440
	drm_dbg_kms(&i915->drm,
1441 1442
		    "[CONNECTOR:%d:%s] backlight device %s registered\n",
		    connector->base.base.id, connector->base.name, name);
1443

1444 1445 1446 1447
out:
	kfree(name);

	return ret;
1448 1449
}

1450
void intel_backlight_device_unregister(struct intel_connector *connector)
1451
{
1452 1453 1454 1455 1456
	struct intel_panel *panel = &connector->panel;

	if (panel->backlight.device) {
		backlight_device_unregister(panel->backlight.device);
		panel->backlight.device = NULL;
1457
	}
1458
}
1459 1460
#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */

1461 1462 1463 1464 1465 1466 1467 1468
/*
 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz.
 *      PWM increment = 1
 */
static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);

1469 1470
	return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq),
				 pwm_freq_hz);
1471 1472
}

1473 1474 1475 1476 1477
/*
 * BXT: PWM clock frequency = 19.2 MHz.
 */
static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1478
	return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz);
1479 1480
}

1481
/*
1482 1483 1484 1485 1486 1487
 * SPT: This value represents the period of the PWM stream in clock periods
 * multiplied by 16 (default increment) or 128 (alternate increment selected in
 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
 */
static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1488
	struct intel_panel *panel = &connector->panel;
1489
	u32 mul;
1490

1491
	if (panel->backlight.alternate_pwm_increment)
1492 1493 1494 1495
		mul = 128;
	else
		mul = 16;

1496
	return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul);
1497 1498 1499 1500 1501 1502 1503 1504 1505
}

/*
 * LPT: This value represents the period of the PWM stream in clock periods
 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
 * LPT SOUTH_CHICKEN2 register bit 5).
 */
static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1506
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1507
	struct intel_panel *panel = &connector->panel;
1508 1509
	u32 mul, clock;

1510
	if (panel->backlight.alternate_pwm_increment)
1511 1512 1513 1514
		mul = 16;
	else
		mul = 128;

V
Ville Syrjälä 已提交
1515
	if (HAS_PCH_LPT_H(dev_priv))
1516 1517 1518 1519
		clock = MHz(135); /* LPT:H */
	else
		clock = MHz(24); /* LPT:LP */

1520
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1521 1522 1523 1524 1525 1526 1527 1528
}

/*
 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
 * display raw clocks multiplied by 128.
 */
static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1529
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1530

1531 1532
	return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq),
				 pwm_freq_hz * 128);
1533 1534 1535 1536 1537 1538
}

/*
 * Gen2: This field determines the number of time base events (display core
 * clock frequency/32) in total for a complete cycle of modulated backlight
 * control.
1539
 *
1540 1541 1542 1543 1544
 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
 * divided by 32.
 */
static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1545
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1546 1547
	int clock;

1548
	if (IS_PINEVIEW(dev_priv))
1549
		clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq);
1550
	else
1551
		clock = KHz(dev_priv->cdclk.hw.cdclk);
1552

1553
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);
1554 1555 1556 1557
}

/*
 * Gen4: This value represents the period of the PWM stream in display core
1558 1559
 * clocks ([DevCTG] HRAW clocks) multiplied by 128.
 *
1560 1561 1562
 */
static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1563
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1564 1565 1566
	int clock;

	if (IS_G4X(dev_priv))
1567
		clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq);
1568
	else
1569
		clock = KHz(dev_priv->cdclk.hw.cdclk);
1570

1571
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);
1572 1573 1574 1575 1576 1577 1578 1579 1580
}

/*
 * VLV: This value represents the period of the PWM stream in display core
 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
 */
static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1581 1582
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	int mul, clock;
1583

1584
	if ((intel_de_read(dev_priv, CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1585 1586
		if (IS_CHERRYVIEW(dev_priv))
			clock = KHz(19200);
1587
		else
1588 1589
			clock = MHz(25);
		mul = 16;
1590
	} else {
1591
		clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq);
1592
		mul = 128;
1593
	}
1594

1595
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1596 1597
}

1598
static u16 get_vbt_pwm_freq(struct drm_i915_private *dev_priv)
1599 1600 1601
{
	u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;

1602
	if (pwm_freq_hz) {
1603 1604 1605
		drm_dbg_kms(&dev_priv->drm,
			    "VBT defined backlight frequency %u Hz\n",
			    pwm_freq_hz);
1606 1607
	} else {
		pwm_freq_hz = 200;
1608 1609 1610
		drm_dbg_kms(&dev_priv->drm,
			    "default backlight frequency %u Hz\n",
			    pwm_freq_hz);
1611 1612
	}

1613 1614 1615 1616 1617 1618 1619 1620 1621 1622
	return pwm_freq_hz;
}

static u32 get_backlight_max_vbt(struct intel_connector *connector)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u16 pwm_freq_hz = get_vbt_pwm_freq(dev_priv);
	u32 pwm;

1623
	if (!panel->backlight.pwm_funcs->hz_to_pwm) {
1624 1625 1626 1627 1628
		drm_dbg_kms(&dev_priv->drm,
			    "backlight frequency conversion not supported\n");
		return 0;
	}

1629
	pwm = panel->backlight.pwm_funcs->hz_to_pwm(connector, pwm_freq_hz);
1630
	if (!pwm) {
1631 1632
		drm_dbg_kms(&dev_priv->drm,
			    "backlight frequency conversion failed\n");
1633 1634 1635 1636 1637 1638 1639 1640
		return 0;
	}

	return pwm;
}

/*
 * Note: The setup hooks can't assume pipe is set!
1641
 */
1642 1643
static u32 get_backlight_min_vbt(struct intel_connector *connector)
{
1644
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1645
	struct intel_panel *panel = &connector->panel;
1646
	int min;
1647

1648
	drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0);
1649

1650 1651 1652 1653 1654 1655 1656 1657 1658
	/*
	 * XXX: If the vbt value is 255, it makes min equal to max, which leads
	 * to problems. There are such machines out there. Either our
	 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
	 * against this by letting the minimum be at most (arbitrarily chosen)
	 * 25% of the max.
	 */
	min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
	if (min != dev_priv->vbt.backlight.min_brightness) {
1659 1660 1661
		drm_dbg_kms(&dev_priv->drm,
			    "clamping VBT min backlight %d/255 to %d/255\n",
			    dev_priv->vbt.backlight.min_brightness, min);
1662 1663
	}

1664
	/* vbt value is a coefficient in range [0..255] */
1665
	return scale(min, 0, 255, 0, panel->backlight.pwm_level_max);
1666 1667
}

1668
static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1669
{
1670
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1671
	struct intel_panel *panel = &connector->panel;
1672 1673
	u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
	bool alt, cpu_mode;
1674 1675

	if (HAS_PCH_LPT(dev_priv))
1676
		alt = intel_de_read(dev_priv, SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
1677
	else
1678
		alt = intel_de_read(dev_priv, SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
1679
	panel->backlight.alternate_pwm_increment = alt;
1680

1681
	pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
1682 1683
	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;

1684
	pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2);
1685
	panel->backlight.pwm_level_max = pch_ctl2 >> 16;
1686

1687
	cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
1688

1689 1690
	if (!panel->backlight.pwm_level_max)
		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
1691

1692
	if (!panel->backlight.pwm_level_max)
1693 1694
		return -ENODEV;

1695
	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
1696

1697
	panel->backlight.pwm_enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
1698

1699
	cpu_mode = panel->backlight.pwm_enabled && HAS_PCH_LPT(dev_priv) &&
1700 1701
		   !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) &&
		   (cpu_ctl2 & BLM_PWM_ENABLE);
1702

1703
	if (cpu_mode) {
1704 1705
		val = pch_get_backlight(connector, unused);

1706 1707
		drm_dbg_kms(&dev_priv->drm,
			    "CPU backlight register was enabled, switching to PCH override\n");
1708 1709

		/* Write converted CPU PWM value to PCH override register */
1710
		lpt_set_backlight(connector->base.state, val);
1711 1712
		intel_de_write(dev_priv, BLC_PWM_PCH_CTL1,
			       pch_ctl1 | BLM_PCH_OVERRIDE_ENABLE);
1713

1714 1715
		intel_de_write(dev_priv, BLC_PWM_CPU_CTL2,
			       cpu_ctl2 & ~BLM_PWM_ENABLE);
1716
	}
1717 1718 1719 1720

	return 0;
}

1721
static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
1722
{
1723
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1724
	struct intel_panel *panel = &connector->panel;
1725
	u32 cpu_ctl2, pch_ctl1, pch_ctl2;
1726

1727
	pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
1728 1729
	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;

1730
	pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2);
1731
	panel->backlight.pwm_level_max = pch_ctl2 >> 16;
1732

1733 1734
	if (!panel->backlight.pwm_level_max)
		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
1735

1736
	if (!panel->backlight.pwm_level_max)
1737 1738
		return -ENODEV;

1739
	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
1740

1741
	cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
1742
	panel->backlight.pwm_enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1743
		(pch_ctl1 & BLM_PCH_PWM_ENABLE);
1744

1745 1746 1747
	return 0;
}

1748
static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
1749
{
1750
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1751
	struct intel_panel *panel = &connector->panel;
1752 1753
	u32 ctl, val;

1754
	ctl = intel_de_read(dev_priv, BLC_PWM_CTL);
1755

1756
	if (DISPLAY_VER(dev_priv) == 2 || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
1757 1758
		panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;

1759
	if (IS_PINEVIEW(dev_priv))
1760 1761
		panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;

1762
	panel->backlight.pwm_level_max = ctl >> 17;
1763

1764 1765 1766
	if (!panel->backlight.pwm_level_max) {
		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
		panel->backlight.pwm_level_max >>= 1;
1767
	}
1768

1769
	if (!panel->backlight.pwm_level_max)
1770 1771
		return -ENODEV;

1772
	if (panel->backlight.combination_mode)
1773
		panel->backlight.pwm_level_max *= 0xff;
1774

1775
	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
1776

1777
	val = i9xx_get_backlight(connector, unused);
1778 1779
	val = intel_panel_invert_pwm_level(connector, val);
	val = clamp(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max);
1780

1781
	panel->backlight.pwm_enabled = val != 0;
1782

1783 1784 1785
	return 0;
}

1786
static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
1787
{
1788
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1789
	struct intel_panel *panel = &connector->panel;
1790
	u32 ctl, ctl2;
1791

1792
	ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2);
1793 1794 1795
	panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
	panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;

1796
	ctl = intel_de_read(dev_priv, BLC_PWM_CTL);
1797
	panel->backlight.pwm_level_max = ctl >> 16;
1798

1799 1800
	if (!panel->backlight.pwm_level_max)
		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
1801

1802
	if (!panel->backlight.pwm_level_max)
1803 1804
		return -ENODEV;

1805
	if (panel->backlight.combination_mode)
1806
		panel->backlight.pwm_level_max *= 0xff;
1807

1808
	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
1809

1810
	panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE;
1811

1812 1813 1814
	return 0;
}

1815
static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
1816
{
1817
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1818
	struct intel_panel *panel = &connector->panel;
1819
	u32 ctl, ctl2;
1820

1821
	if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B))
1822 1823
		return -ENODEV;

1824
	ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
1825 1826
	panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;

1827
	ctl = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe));
1828
	panel->backlight.pwm_level_max = ctl >> 16;
1829

1830 1831
	if (!panel->backlight.pwm_level_max)
		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
1832

1833
	if (!panel->backlight.pwm_level_max)
1834 1835
		return -ENODEV;

1836
	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
1837

1838
	panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE;
1839

1840 1841 1842
	return 0;
}

1843 1844 1845
static int
bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
{
1846
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1847 1848 1849
	struct intel_panel *panel = &connector->panel;
	u32 pwm_ctl, val;

1850
	panel->backlight.controller = dev_priv->vbt.backlight.controller;
1851

1852 1853
	pwm_ctl = intel_de_read(dev_priv,
				BXT_BLC_PWM_CTL(panel->backlight.controller));
1854

1855
	/* Controller 1 uses the utility pin. */
1856
	if (panel->backlight.controller == 1) {
1857
		val = intel_de_read(dev_priv, UTIL_PIN_CTL);
1858 1859 1860 1861 1862
		panel->backlight.util_pin_active_low =
					val & UTIL_PIN_POLARITY;
	}

	panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1863 1864
	panel->backlight.pwm_level_max =
		intel_de_read(dev_priv, BXT_BLC_PWM_FREQ(panel->backlight.controller));
1865

1866 1867
	if (!panel->backlight.pwm_level_max)
		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
1868

1869
	if (!panel->backlight.pwm_level_max)
1870 1871
		return -ENODEV;

1872
	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
1873

1874
	panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1875 1876 1877 1878

	return 0;
}

1879 1880 1881 1882 1883
static int
cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
1884
	u32 pwm_ctl;
1885 1886

	/*
1887 1888 1889
	 * CNP has the BXT implementation of backlight, but with only one
	 * controller. TODO: ICP has multiple controllers but we only use
	 * controller 0 for now.
1890 1891 1892
	 */
	panel->backlight.controller = 0;

1893 1894
	pwm_ctl = intel_de_read(dev_priv,
				BXT_BLC_PWM_CTL(panel->backlight.controller));
1895 1896

	panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1897 1898
	panel->backlight.pwm_level_max =
		intel_de_read(dev_priv, BXT_BLC_PWM_FREQ(panel->backlight.controller));
1899

1900 1901
	if (!panel->backlight.pwm_level_max)
		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
1902

1903
	if (!panel->backlight.pwm_level_max)
1904 1905
		return -ENODEV;

1906
	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
1907

1908
	panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1909 1910 1911 1912

	return 0;
}

1913 1914
static int ext_pwm_setup_backlight(struct intel_connector *connector,
				   enum pipe pipe)
1915 1916
{
	struct drm_device *dev = connector->base.dev;
1917
	struct drm_i915_private *dev_priv = to_i915(dev);
1918
	struct intel_panel *panel = &connector->panel;
1919
	const char *desc;
1920
	u32 level;
1921

1922 1923 1924 1925 1926 1927 1928 1929 1930
	/* Get the right PWM chip for DSI backlight according to VBT */
	if (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) {
		panel->backlight.pwm = pwm_get(dev->dev, "pwm_pmic_backlight");
		desc = "PMIC";
	} else {
		panel->backlight.pwm = pwm_get(dev->dev, "pwm_soc_backlight");
		desc = "SoC";
	}

1931
	if (IS_ERR(panel->backlight.pwm)) {
1932 1933
		drm_err(&dev_priv->drm, "Failed to get the %s PWM chip\n",
			desc);
1934 1935 1936 1937
		panel->backlight.pwm = NULL;
		return -ENODEV;
	}

1938 1939
	panel->backlight.pwm_level_max = 100; /* 100% */
	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
1940

1941 1942 1943 1944 1945 1946
	if (pwm_is_enabled(panel->backlight.pwm)) {
		/* PWM is already enabled, use existing settings */
		pwm_get_state(panel->backlight.pwm, &panel->backlight.pwm_state);

		level = pwm_get_relative_duty_cycle(&panel->backlight.pwm_state,
						    100);
1947 1948
		level = intel_panel_invert_pwm_level(connector, level);
		panel->backlight.pwm_enabled = true;
1949 1950 1951 1952 1953 1954 1955 1956 1957

		drm_dbg_kms(&dev_priv->drm, "PWM already enabled at freq %ld, VBT freq %d, level %d\n",
			    NSEC_PER_SEC / (unsigned long)panel->backlight.pwm_state.period,
			    get_vbt_pwm_freq(dev_priv), level);
	} else {
		/* Set period from VBT frequency, leave other settings at 0. */
		panel->backlight.pwm_state.period =
			NSEC_PER_SEC / get_vbt_pwm_freq(dev_priv);
	}
1958

1959 1960
	drm_info(&dev_priv->drm, "Using %s PWM for LCD backlight control\n",
		 desc);
1961 1962 1963
	return 0;
}

1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015
static void intel_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level)
{
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
	struct intel_panel *panel = &connector->panel;

	panel->backlight.pwm_funcs->set(conn_state,
				       intel_panel_invert_pwm_level(connector, level));
}

static u32 intel_pwm_get_backlight(struct intel_connector *connector, enum pipe pipe)
{
	struct intel_panel *panel = &connector->panel;

	return intel_panel_invert_pwm_level(connector,
					    panel->backlight.pwm_funcs->get(connector, pipe));
}

static void intel_pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
				       const struct drm_connector_state *conn_state, u32 level)
{
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
	struct intel_panel *panel = &connector->panel;

	panel->backlight.pwm_funcs->enable(crtc_state, conn_state,
					   intel_panel_invert_pwm_level(connector, level));
}

static void intel_pwm_disable_backlight(const struct drm_connector_state *conn_state, u32 level)
{
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
	struct intel_panel *panel = &connector->panel;

	panel->backlight.pwm_funcs->disable(conn_state,
					    intel_panel_invert_pwm_level(connector, level));
}

static int intel_pwm_setup_backlight(struct intel_connector *connector, enum pipe pipe)
{
	struct intel_panel *panel = &connector->panel;
	int ret = panel->backlight.pwm_funcs->setup(connector, pipe);

	if (ret < 0)
		return ret;

	panel->backlight.min = panel->backlight.pwm_level_min;
	panel->backlight.max = panel->backlight.pwm_level_max;
	panel->backlight.level = intel_pwm_get_backlight(connector, pipe);
	panel->backlight.enabled = panel->backlight.pwm_enabled;

	return 0;
}

2016 2017
void intel_panel_update_backlight(struct intel_atomic_state *state,
				  struct intel_encoder *encoder,
2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034
				  const struct intel_crtc_state *crtc_state,
				  const struct drm_connector_state *conn_state)
{
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;

	if (!panel->backlight.present)
		return;

	mutex_lock(&dev_priv->backlight_lock);
	if (!panel->backlight.enabled)
		__intel_panel_enable_backlight(crtc_state, conn_state);

	mutex_unlock(&dev_priv->backlight_lock);
}

2035
int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
2036
{
2037
	struct drm_i915_private *dev_priv = to_i915(connector->dev);
2038
	struct intel_connector *intel_connector = to_intel_connector(connector);
2039
	struct intel_panel *panel = &intel_connector->panel;
2040
	int ret;
2041

2042
	if (!dev_priv->vbt.backlight.present) {
2043
		if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
2044 2045
			drm_dbg_kms(&dev_priv->drm,
				    "no backlight present per VBT, but present per quirk\n");
2046
		} else {
2047 2048
			drm_dbg_kms(&dev_priv->drm,
				    "no backlight present per VBT\n");
2049 2050
			return 0;
		}
2051 2052
	}

2053
	/* ensure intel_panel has been initialized first */
2054
	if (drm_WARN_ON(&dev_priv->drm, !panel->backlight.funcs))
2055 2056
		return -ENODEV;

2057
	/* set level and max in panel struct */
2058
	mutex_lock(&dev_priv->backlight_lock);
2059
	ret = panel->backlight.funcs->setup(intel_connector, pipe);
2060
	mutex_unlock(&dev_priv->backlight_lock);
2061 2062

	if (ret) {
2063 2064 2065
		drm_dbg_kms(&dev_priv->drm,
			    "failed to setup backlight for connector %s\n",
			    connector->name);
2066 2067
		return ret;
	}
2068

2069 2070
	panel->backlight.present = true;

2071 2072 2073 2074 2075
	drm_dbg_kms(&dev_priv->drm,
		    "Connector %s backlight initialized, %s, brightness %u/%u\n",
		    connector->name,
		    enableddisabled(panel->backlight.enabled),
		    panel->backlight.level, panel->backlight.max);
2076

2077 2078 2079
	return 0;
}

2080
static void intel_panel_destroy_backlight(struct intel_panel *panel)
2081
{
2082 2083 2084 2085
	/* dispose of the pwm */
	if (panel->backlight.pwm)
		pwm_put(panel->backlight.pwm);

2086
	panel->backlight.present = false;
2087
}
2088

2089
static const struct intel_panel_bl_funcs bxt_pwm_funcs = {
2090 2091 2092 2093 2094 2095 2096 2097
	.setup = bxt_setup_backlight,
	.enable = bxt_enable_backlight,
	.disable = bxt_disable_backlight,
	.set = bxt_set_backlight,
	.get = bxt_get_backlight,
	.hz_to_pwm = bxt_hz_to_pwm,
};

2098
static const struct intel_panel_bl_funcs cnp_pwm_funcs = {
2099 2100 2101 2102 2103 2104 2105 2106
	.setup = cnp_setup_backlight,
	.enable = cnp_enable_backlight,
	.disable = cnp_disable_backlight,
	.set = bxt_set_backlight,
	.get = bxt_get_backlight,
	.hz_to_pwm = cnp_hz_to_pwm,
};

2107
static const struct intel_panel_bl_funcs lpt_pwm_funcs = {
2108 2109 2110 2111 2112 2113 2114 2115
	.setup = lpt_setup_backlight,
	.enable = lpt_enable_backlight,
	.disable = lpt_disable_backlight,
	.set = lpt_set_backlight,
	.get = lpt_get_backlight,
	.hz_to_pwm = lpt_hz_to_pwm,
};

2116
static const struct intel_panel_bl_funcs spt_pwm_funcs = {
2117 2118 2119 2120 2121 2122 2123 2124
	.setup = lpt_setup_backlight,
	.enable = lpt_enable_backlight,
	.disable = lpt_disable_backlight,
	.set = lpt_set_backlight,
	.get = lpt_get_backlight,
	.hz_to_pwm = spt_hz_to_pwm,
};

2125
static const struct intel_panel_bl_funcs pch_pwm_funcs = {
2126 2127 2128 2129 2130 2131 2132 2133
	.setup = pch_setup_backlight,
	.enable = pch_enable_backlight,
	.disable = pch_disable_backlight,
	.set = pch_set_backlight,
	.get = pch_get_backlight,
	.hz_to_pwm = pch_hz_to_pwm,
};

2134 2135 2136 2137 2138 2139
static const struct intel_panel_bl_funcs ext_pwm_funcs = {
	.setup = ext_pwm_setup_backlight,
	.enable = ext_pwm_enable_backlight,
	.disable = ext_pwm_disable_backlight,
	.set = ext_pwm_set_backlight,
	.get = ext_pwm_get_backlight,
2140 2141
};

2142
static const struct intel_panel_bl_funcs vlv_pwm_funcs = {
2143 2144 2145 2146 2147 2148 2149 2150
	.setup = vlv_setup_backlight,
	.enable = vlv_enable_backlight,
	.disable = vlv_disable_backlight,
	.set = vlv_set_backlight,
	.get = vlv_get_backlight,
	.hz_to_pwm = vlv_hz_to_pwm,
};

2151
static const struct intel_panel_bl_funcs i965_pwm_funcs = {
2152 2153 2154 2155 2156 2157 2158 2159
	.setup = i965_setup_backlight,
	.enable = i965_enable_backlight,
	.disable = i965_disable_backlight,
	.set = i9xx_set_backlight,
	.get = i9xx_get_backlight,
	.hz_to_pwm = i965_hz_to_pwm,
};

2160
static const struct intel_panel_bl_funcs i9xx_pwm_funcs = {
2161 2162 2163 2164 2165 2166 2167 2168
	.setup = i9xx_setup_backlight,
	.enable = i9xx_enable_backlight,
	.disable = i9xx_disable_backlight,
	.set = i9xx_set_backlight,
	.get = i9xx_get_backlight,
	.hz_to_pwm = i9xx_hz_to_pwm,
};

2169 2170 2171 2172 2173 2174 2175 2176
static const struct intel_panel_bl_funcs pwm_bl_funcs = {
	.setup = intel_pwm_setup_backlight,
	.enable = intel_pwm_enable_backlight,
	.disable = intel_pwm_disable_backlight,
	.set = intel_pwm_set_backlight,
	.get = intel_pwm_get_backlight,
};

2177
/* Set up chip specific backlight functions */
2178 2179
static void
intel_panel_init_backlight_funcs(struct intel_panel *panel)
2180
{
2181
	struct intel_connector *connector =
2182
		container_of(panel, struct intel_connector, panel);
2183
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
2184

2185 2186 2187 2188
	if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
	    intel_dsi_dcs_init_backlight_funcs(connector) == 0)
		return;

2189
	if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) {
2190
		panel->backlight.pwm_funcs = &bxt_pwm_funcs;
2191
	} else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) {
2192
		panel->backlight.pwm_funcs = &cnp_pwm_funcs;
2193
	} else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) {
2194
		if (HAS_PCH_LPT(dev_priv))
2195
			panel->backlight.pwm_funcs = &lpt_pwm_funcs;
2196
		else
2197
			panel->backlight.pwm_funcs = &spt_pwm_funcs;
2198
	} else if (HAS_PCH_SPLIT(dev_priv)) {
2199
		panel->backlight.pwm_funcs = &pch_pwm_funcs;
2200
	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
2201
		if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
2202
			panel->backlight.pwm_funcs = &ext_pwm_funcs;
2203
		} else {
2204
			panel->backlight.pwm_funcs = &vlv_pwm_funcs;
2205
		}
2206
	} else if (DISPLAY_VER(dev_priv) == 4) {
2207
		panel->backlight.pwm_funcs = &i965_pwm_funcs;
2208
	} else {
2209
		panel->backlight.pwm_funcs = &i9xx_pwm_funcs;
2210
	}
2211 2212 2213 2214

	if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
	    intel_dp_aux_init_backlight_funcs(connector) == 0)
		return;
2215 2216 2217

	/* We're using a standard PWM backlight interface */
	panel->backlight.funcs = &pwm_bl_funcs;
2218 2219
}

2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230
enum drm_connector_status
intel_panel_detect(struct drm_connector *connector, bool force)
{
	struct drm_i915_private *i915 = to_i915(connector->dev);

	if (!INTEL_DISPLAY_ENABLED(i915))
		return connector_status_disconnected;

	return connector_status_connected;
}

2231
int intel_panel_init(struct intel_panel *panel,
2232 2233
		     struct drm_display_mode *fixed_mode,
		     struct drm_display_mode *downclock_mode)
2234
{
2235 2236
	intel_panel_init_backlight_funcs(panel);

2237
	panel->fixed_mode = fixed_mode;
2238
	panel->downclock_mode = downclock_mode;
2239

2240 2241 2242 2243 2244
	return 0;
}

void intel_panel_fini(struct intel_panel *panel)
{
2245 2246 2247
	struct intel_connector *intel_connector =
		container_of(panel, struct intel_connector, panel);

2248 2249
	intel_panel_destroy_backlight(panel);

2250 2251
	if (panel->fixed_mode)
		drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
2252 2253 2254 2255

	if (panel->downclock_mode)
		drm_mode_destroy(intel_connector->base.dev,
				panel->downclock_mode);
2256
}