intel_panel.c 64.8 KB
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/*
 * Copyright © 2006-2010 Intel Corporation
 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Eric Anholt <eric@anholt.net>
 *      Dave Airlie <airlied@linux.ie>
 *      Jesse Barnes <jesse.barnes@intel.com>
 *      Chris Wilson <chris@chris-wilson.co.uk>
 */

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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

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#include <linux/kernel.h>
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#include <linux/moduleparam.h>
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#include <linux/pwm.h>
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#include "intel_connector.h"
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#include "intel_display_types.h"
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#include "intel_dp_aux_backlight.h"
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#include "intel_dsi_dcs_backlight.h"
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#include "intel_panel.h"
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#define CRC_PMIC_PWM_PERIOD_NS	21333

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void
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intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
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		       struct drm_display_mode *adjusted_mode)
{
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	drm_mode_copy(adjusted_mode, fixed_mode);
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	drm_mode_set_crtcinfo(adjusted_mode, 0);
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}

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static bool is_downclock_mode(const struct drm_display_mode *downclock_mode,
			      const struct drm_display_mode *fixed_mode)
{
	return drm_mode_match(downclock_mode, fixed_mode,
			      DRM_MODE_MATCH_TIMINGS |
			      DRM_MODE_MATCH_FLAGS |
			      DRM_MODE_MATCH_3D_FLAGS) &&
		downclock_mode->clock < fixed_mode->clock;
}

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struct drm_display_mode *
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intel_panel_edid_downclock_mode(struct intel_connector *connector,
				const struct drm_display_mode *fixed_mode)
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{
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	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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	const struct drm_display_mode *scan, *best_mode = NULL;
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	struct drm_display_mode *downclock_mode;
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	int best_clock = fixed_mode->clock;
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	list_for_each_entry(scan, &connector->base.probed_modes, head) {
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		/*
		 * If one mode has the same resolution with the fixed_panel
		 * mode while they have the different refresh rate, it means
		 * that the reduced downclock is found. In such
		 * case we can set the different FPx0/1 to dynamically select
		 * between low and high frequency.
		 */
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		if (is_downclock_mode(scan, fixed_mode) &&
		    scan->clock < best_clock) {
			/*
			 * The downclock is already found. But we
			 * expect to find the lower downclock.
			 */
			best_clock = scan->clock;
			best_mode = scan;
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		}
	}

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	if (!best_mode)
		return NULL;

	downclock_mode = drm_mode_duplicate(&dev_priv->drm, best_mode);
	if (!downclock_mode)
		return NULL;

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	drm_dbg_kms(&dev_priv->drm,
		    "[CONNECTOR:%d:%s] using downclock mode from EDID: ",
		    connector->base.base.id, connector->base.name);
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	drm_mode_debug_printmodeline(downclock_mode);
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	return downclock_mode;
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}

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struct drm_display_mode *
intel_panel_edid_fixed_mode(struct intel_connector *connector)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	const struct drm_display_mode *scan;
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	struct drm_display_mode *fixed_mode;

	if (list_empty(&connector->base.probed_modes))
		return NULL;
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	/* prefer fixed mode from EDID if available */
	list_for_each_entry(scan, &connector->base.probed_modes, head) {
		if ((scan->type & DRM_MODE_TYPE_PREFERRED) == 0)
			continue;

		fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan);
		if (!fixed_mode)
			return NULL;

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		drm_dbg_kms(&dev_priv->drm,
			    "[CONNECTOR:%d:%s] using preferred mode from EDID: ",
			    connector->base.base.id, connector->base.name);
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		drm_mode_debug_printmodeline(fixed_mode);

		return fixed_mode;
	}

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	scan = list_first_entry(&connector->base.probed_modes,
				typeof(*scan), head);

	fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan);
	if (!fixed_mode)
		return NULL;

	fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;

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	drm_dbg_kms(&dev_priv->drm,
		    "[CONNECTOR:%d:%s] using first mode from EDID: ",
		    connector->base.base.id, connector->base.name);
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	drm_mode_debug_printmodeline(fixed_mode);

	return fixed_mode;
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}

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struct drm_display_mode *
intel_panel_vbt_fixed_mode(struct intel_connector *connector)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct drm_display_info *info = &connector->base.display_info;
	struct drm_display_mode *fixed_mode;

	if (!dev_priv->vbt.lfp_lvds_vbt_mode)
		return NULL;

	fixed_mode = drm_mode_duplicate(&dev_priv->drm,
					dev_priv->vbt.lfp_lvds_vbt_mode);
	if (!fixed_mode)
		return NULL;

	fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;

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	drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s] using mode from VBT: ",
		    connector->base.base.id, connector->base.name);
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	drm_mode_debug_printmodeline(fixed_mode);

	info->width_mm = fixed_mode->width_mm;
	info->height_mm = fixed_mode->height_mm;

	return fixed_mode;
}

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/* adjusted_mode has been preset to be the panel's fixed mode */
void
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intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
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			struct intel_crtc_state *pipe_config,
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			int fitting_mode)
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{
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	const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
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	int x = 0, y = 0, width = 0, height = 0;
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	/* Native modes don't need fitting */
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	if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
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	    adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h &&
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	    pipe_config->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
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		goto done;

	switch (fitting_mode) {
	case DRM_MODE_SCALE_CENTER:
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		width = pipe_config->pipe_src_w;
		height = pipe_config->pipe_src_h;
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		x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
		y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
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		break;

	case DRM_MODE_SCALE_ASPECT:
		/* Scale but preserve the aspect ratio */
		{
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			u32 scaled_width = adjusted_mode->crtc_hdisplay
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				* pipe_config->pipe_src_h;
			u32 scaled_height = pipe_config->pipe_src_w
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				* adjusted_mode->crtc_vdisplay;
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			if (scaled_width > scaled_height) { /* pillar */
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				width = scaled_height / pipe_config->pipe_src_h;
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				if (width & 1)
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					width++;
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				x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
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				y = 0;
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				height = adjusted_mode->crtc_vdisplay;
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			} else if (scaled_width < scaled_height) { /* letter */
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				height = scaled_width / pipe_config->pipe_src_w;
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				if (height & 1)
				    height++;
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				y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
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				x = 0;
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				width = adjusted_mode->crtc_hdisplay;
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			} else {
				x = y = 0;
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				width = adjusted_mode->crtc_hdisplay;
				height = adjusted_mode->crtc_vdisplay;
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			}
		}
		break;

	case DRM_MODE_SCALE_FULLSCREEN:
		x = y = 0;
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		width = adjusted_mode->crtc_hdisplay;
		height = adjusted_mode->crtc_vdisplay;
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		break;
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	default:
		WARN(1, "bad panel fit mode: %d\n", fitting_mode);
		return;
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	}

done:
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	pipe_config->pch_pfit.pos = (x << 16) | y;
	pipe_config->pch_pfit.size = (width << 16) | height;
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	pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
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}
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static void
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centre_horizontally(struct drm_display_mode *adjusted_mode,
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		    int width)
{
	u32 border, sync_pos, blank_width, sync_width;

	/* keep the hsync and hblank widths constant */
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	sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
	blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
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	sync_pos = (blank_width - sync_width + 1) / 2;

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	border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
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	border += border & 1; /* make the border even */

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	adjusted_mode->crtc_hdisplay = width;
	adjusted_mode->crtc_hblank_start = width + border;
	adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
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	adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
	adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
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}

static void
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centre_vertically(struct drm_display_mode *adjusted_mode,
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		  int height)
{
	u32 border, sync_pos, blank_width, sync_width;

	/* keep the vsync and vblank widths constant */
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	sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
	blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
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	sync_pos = (blank_width - sync_width + 1) / 2;

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	border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
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	adjusted_mode->crtc_vdisplay = height;
	adjusted_mode->crtc_vblank_start = height + border;
	adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
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	adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
	adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
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}

static inline u32 panel_fitter_scaling(u32 source, u32 target)
{
	/*
	 * Floating point operation is not supported. So the FACTOR
	 * is defined, which can avoid the floating point computation
	 * when calculating the panel ratio.
	 */
#define ACCURACY 12
#define FACTOR (1 << ACCURACY)
	u32 ratio = source * FACTOR / target;
	return (FACTOR * ratio + FACTOR/2) / FACTOR;
}

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static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
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			      u32 *pfit_control)
{
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	const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
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	u32 scaled_width = adjusted_mode->crtc_hdisplay *
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		pipe_config->pipe_src_h;
	u32 scaled_height = pipe_config->pipe_src_w *
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		adjusted_mode->crtc_vdisplay;
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	/* 965+ is easy, it does everything in hw */
	if (scaled_width > scaled_height)
		*pfit_control |= PFIT_ENABLE |
			PFIT_SCALING_PILLAR;
	else if (scaled_width < scaled_height)
		*pfit_control |= PFIT_ENABLE |
			PFIT_SCALING_LETTER;
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	else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
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		*pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
}

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static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
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			      u32 *pfit_control, u32 *pfit_pgm_ratios,
			      u32 *border)
{
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	struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
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	u32 scaled_width = adjusted_mode->crtc_hdisplay *
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		pipe_config->pipe_src_h;
	u32 scaled_height = pipe_config->pipe_src_w *
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		adjusted_mode->crtc_vdisplay;
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	u32 bits;

	/*
	 * For earlier chips we have to calculate the scaling
	 * ratio by hand and program it into the
	 * PFIT_PGM_RATIO register
	 */
	if (scaled_width > scaled_height) { /* pillar */
		centre_horizontally(adjusted_mode,
				    scaled_height /
				    pipe_config->pipe_src_h);

		*border = LVDS_BORDER_ENABLE;
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		if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
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			bits = panel_fitter_scaling(pipe_config->pipe_src_h,
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						    adjusted_mode->crtc_vdisplay);
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			*pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
					     bits << PFIT_VERT_SCALE_SHIFT);
			*pfit_control |= (PFIT_ENABLE |
					  VERT_INTERP_BILINEAR |
					  HORIZ_INTERP_BILINEAR);
		}
	} else if (scaled_width < scaled_height) { /* letter */
		centre_vertically(adjusted_mode,
				  scaled_width /
				  pipe_config->pipe_src_w);

		*border = LVDS_BORDER_ENABLE;
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		if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
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			bits = panel_fitter_scaling(pipe_config->pipe_src_w,
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						    adjusted_mode->crtc_hdisplay);
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			*pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
					     bits << PFIT_VERT_SCALE_SHIFT);
			*pfit_control |= (PFIT_ENABLE |
					  VERT_INTERP_BILINEAR |
					  HORIZ_INTERP_BILINEAR);
		}
	} else {
		/* Aspects match, Let hw scale both directions */
		*pfit_control |= (PFIT_ENABLE |
				  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
				  VERT_INTERP_BILINEAR |
				  HORIZ_INTERP_BILINEAR);
	}
}

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void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
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			      struct intel_crtc_state *pipe_config,
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			      int fitting_mode)
{
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	struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
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	u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
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	struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
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	/* Native modes don't need fitting */
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	if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
	    adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
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		goto out;

	switch (fitting_mode) {
	case DRM_MODE_SCALE_CENTER:
		/*
		 * For centered modes, we have to calculate border widths &
		 * heights and modify the values programmed into the CRTC.
		 */
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		centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
		centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
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		border = LVDS_BORDER_ENABLE;
		break;
	case DRM_MODE_SCALE_ASPECT:
		/* Scale but preserve the aspect ratio */
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		if (INTEL_GEN(dev_priv) >= 4)
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			i965_scale_aspect(pipe_config, &pfit_control);
		else
			i9xx_scale_aspect(pipe_config, &pfit_control,
					  &pfit_pgm_ratios, &border);
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		break;
	case DRM_MODE_SCALE_FULLSCREEN:
		/*
		 * Full scaling, even if it changes the aspect ratio.
		 * Fortunately this is all done for us in hw.
		 */
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		if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
		    pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
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			pfit_control |= PFIT_ENABLE;
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			if (INTEL_GEN(dev_priv) >= 4)
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				pfit_control |= PFIT_SCALING_AUTO;
			else
				pfit_control |= (VERT_AUTO_SCALE |
						 VERT_INTERP_BILINEAR |
						 HORIZ_AUTO_SCALE |
						 HORIZ_INTERP_BILINEAR);
		}
		break;
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	default:
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		drm_WARN(&dev_priv->drm, 1, "bad panel fit mode: %d\n",
			 fitting_mode);
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		return;
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	}

	/* 965+ wants fuzzy fitting */
	/* FIXME: handle multiple panels by failing gracefully */
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	if (INTEL_GEN(dev_priv) >= 4)
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		pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
				 PFIT_FILTER_FUZZY);

out:
	if ((pfit_control & PFIT_ENABLE) == 0) {
		pfit_control = 0;
		pfit_pgm_ratios = 0;
	}

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	/* Make sure pre-965 set dither correctly for 18bpp panels. */
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	if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18)
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		pfit_control |= PANEL_8TO6_DITHER_ENABLE;

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	pipe_config->gmch_pfit.control = pfit_control;
	pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
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	pipe_config->gmch_pfit.lvds_border_bits = border;
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}

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/**
 * scale - scale values from one range to another
 * @source_val: value in range [@source_min..@source_max]
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 * @source_min: minimum legal value for @source_val
 * @source_max: maximum legal value for @source_val
 * @target_min: corresponding target value for @source_min
 * @target_max: corresponding target value for @source_max
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 *
 * Return @source_val in range [@source_min..@source_max] scaled to range
 * [@target_min..@target_max].
 */
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static u32 scale(u32 source_val,
		 u32 source_min, u32 source_max,
		 u32 target_min, u32 target_max)
469
{
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	u64 target_val;
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	WARN_ON(source_min > source_max);
	WARN_ON(target_min > target_max);

	/* defensive */
	source_val = clamp(source_val, source_min, source_max);

	/* avoid overflows */
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	target_val = mul_u32_u32(source_val - source_min,
				 target_max - target_min);
	target_val = DIV_ROUND_CLOSEST_ULL(target_val, source_max - source_min);
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	target_val += target_min;

	return target_val;
}

/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
static inline u32 scale_user_to_hw(struct intel_connector *connector,
				   u32 user_level, u32 user_max)
{
	struct intel_panel *panel = &connector->panel;

	return scale(user_level, 0, user_max,
		     panel->backlight.min, panel->backlight.max);
}

/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
 * to [hw_min..hw_max]. */
static inline u32 clamp_user_to_hw(struct intel_connector *connector,
				   u32 user_level, u32 user_max)
{
	struct intel_panel *panel = &connector->panel;
	u32 hw_level;

	hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
	hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);

	return hw_level;
}

/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
static inline u32 scale_hw_to_user(struct intel_connector *connector,
				   u32 hw_level, u32 user_max)
{
	struct intel_panel *panel = &connector->panel;

	return scale(hw_level, panel->backlight.min, panel->backlight.max,
		     0, user_max);
}

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static u32 intel_panel_compute_brightness(struct intel_connector *connector,
					  u32 val)
523
{
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	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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	struct intel_panel *panel = &connector->panel;

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	drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
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	if (i915_modparams.invert_brightness < 0)
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		return val;

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	if (i915_modparams.invert_brightness > 0 ||
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	    dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
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		return panel->backlight.max - val + panel->backlight.min;
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	}
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	return val;
}

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static u32 lpt_get_backlight(struct intel_connector *connector)
541
{
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	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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544
	return intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
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}
546

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static u32 pch_get_backlight(struct intel_connector *connector)
548
{
549
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
550

551
	return intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
552
}
553

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static u32 i9xx_get_backlight(struct intel_connector *connector)
{
556
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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	struct intel_panel *panel = &connector->panel;
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	u32 val;
559

560
	val = intel_de_read(dev_priv, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
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	if (INTEL_GEN(dev_priv) < 4)
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		val >>= 1;
563

564
	if (panel->backlight.combination_mode) {
565
		u8 lbpc;
566

567
		pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc);
568
		val *= lbpc;
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	}

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	return val;
}

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static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe)
575
{
576
	if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B))
577 578
		return 0;

579
	return intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
580 581 582 583
}

static u32 vlv_get_backlight(struct intel_connector *connector)
{
584
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
585
	enum pipe pipe = intel_connector_get_pipe(connector);
586

587
	return _vlv_get_backlight(dev_priv, pipe);
588 589
}

590 591
static u32 bxt_get_backlight(struct intel_connector *connector)
{
592
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
593
	struct intel_panel *panel = &connector->panel;
594

595 596
	return intel_de_read(dev_priv,
			     BXT_BLC_PWM_DUTY(panel->backlight.controller));
597 598
}

599 600 601 602 603 604 605 606 607
static u32 pwm_get_backlight(struct intel_connector *connector)
{
	struct intel_panel *panel = &connector->panel;
	int duty_ns;

	duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
	return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
}

608
static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
609
{
610
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
611
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
612

613 614
	u32 val = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, val | level);
615 616
}

617
static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level)
618
{
619
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
620
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
621 622
	u32 tmp;

623 624
	tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
	intel_de_write(dev_priv, BLC_PWM_CPU_CTL, tmp | level);
625 626
}

627
static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level)
628
{
629
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
630
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
631
	struct intel_panel *panel = &connector->panel;
632
	u32 tmp, mask;
633

634
	drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
635

636
	if (panel->backlight.combination_mode) {
637 638
		u8 lbpc;

639
		lbpc = level * 0xfe / panel->backlight.max + 1;
640
		level /= lbpc;
641
		pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc);
642 643
	}

644
	if (IS_GEN(dev_priv, 4)) {
645 646
		mask = BACKLIGHT_DUTY_CYCLE_MASK;
	} else {
647
		level <<= 1;
648 649
		mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
	}
650

651 652
	tmp = intel_de_read(dev_priv, BLC_PWM_CTL) & ~mask;
	intel_de_write(dev_priv, BLC_PWM_CTL, tmp | level);
653 654
}

655
static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level)
656
{
657
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
658
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
659
	enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
660 661
	u32 tmp;

662 663
	tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
	intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), tmp | level);
664 665
}

666
static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
667
{
668
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
669
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
670
	struct intel_panel *panel = &connector->panel;
671

672 673
	intel_de_write(dev_priv,
		       BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
674 675
}

676
static void pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level)
677
{
678
	struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel;
679 680 681 682 683
	int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);

	pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
}

684
static void
685
intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level)
686
{
687
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
688
	struct intel_panel *panel = &connector->panel;
689 690 691 692

	DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);

	level = intel_panel_compute_brightness(connector, level);
693
	panel->backlight.set(conn_state, level);
694
}
695

696 697 698
/* set backlight brightness to level in range [0..max], assuming hw min is
 * respected.
 */
699
void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
700 701
				    u32 user_level, u32 user_max)
{
702
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
703
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
704 705 706
	struct intel_panel *panel = &connector->panel;
	u32 hw_level;

707
	/*
708
	 * Lack of crtc may occur during driver init because
709 710 711 712
	 * connection_mutex isn't held across the entire backlight
	 * setup + modeset readout, and the BIOS can issue the
	 * requests at any time.
	 */
713
	if (!panel->backlight.present || !conn_state->crtc)
714 715
		return;

716
	mutex_lock(&dev_priv->backlight_lock);
717

718
	drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
719 720 721

	hw_level = clamp_user_to_hw(connector, user_level, user_max);
	panel->backlight.level = hw_level;
722

723
	if (panel->backlight.device)
724 725 726 727
		panel->backlight.device->props.brightness =
			scale_hw_to_user(connector,
					 panel->backlight.level,
					 panel->backlight.device->props.max_brightness);
728

729
	if (panel->backlight.enabled)
730
		intel_panel_actually_set_backlight(conn_state, hw_level);
731

732
	mutex_unlock(&dev_priv->backlight_lock);
733 734
}

735
static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state)
736
{
737
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
738
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
739 740
	u32 tmp;

741
	intel_panel_actually_set_backlight(old_conn_state, 0);
742

743 744 745 746 747 748 749 750
	/*
	 * Although we don't support or enable CPU PWM with LPT/SPT based
	 * systems, it may have been enabled prior to loading the
	 * driver. Disable to avoid warnings on LCPLL disable.
	 *
	 * This needs rework if we need to add support for CPU PWM on PCH split
	 * platforms.
	 */
751
	tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
752
	if (tmp & BLM_PWM_ENABLE) {
753 754
		drm_dbg_kms(&dev_priv->drm,
			    "cpu backlight was enabled, disabling\n");
755 756
		intel_de_write(dev_priv, BLC_PWM_CPU_CTL2,
			       tmp & ~BLM_PWM_ENABLE);
757 758
	}

759 760
	tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
761 762
}

763
static void pch_disable_backlight(const struct drm_connector_state *old_conn_state)
764
{
765
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
766
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
767 768
	u32 tmp;

769
	intel_panel_actually_set_backlight(old_conn_state, 0);
770

771 772
	tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
	intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
773

774 775
	tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
776 777
}

778
static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state)
779
{
780
	intel_panel_actually_set_backlight(old_conn_state, 0);
781 782
}

783
static void i965_disable_backlight(const struct drm_connector_state *old_conn_state)
784
{
785
	struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev);
786 787
	u32 tmp;

788
	intel_panel_actually_set_backlight(old_conn_state, 0);
789

790 791
	tmp = intel_de_read(dev_priv, BLC_PWM_CTL2);
	intel_de_write(dev_priv, BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
792 793
}

794
static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state)
795
{
796
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
797
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
798
	enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe;
799 800
	u32 tmp;

801
	intel_panel_actually_set_backlight(old_conn_state, 0);
802

803 804 805
	tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
	intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe),
		       tmp & ~BLM_PWM_ENABLE);
806 807
}

808
static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state)
809
{
810
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
811
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
812 813
	struct intel_panel *panel = &connector->panel;
	u32 tmp, val;
814

815
	intel_panel_actually_set_backlight(old_conn_state, 0);
816

817 818 819 820
	tmp = intel_de_read(dev_priv,
			    BXT_BLC_PWM_CTL(panel->backlight.controller));
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       tmp & ~BXT_BLC_PWM_ENABLE);
821 822

	if (panel->backlight.controller == 1) {
823
		val = intel_de_read(dev_priv, UTIL_PIN_CTL);
824
		val &= ~UTIL_PIN_ENABLE;
825
		intel_de_write(dev_priv, UTIL_PIN_CTL, val);
826
	}
827 828
}

829
static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state)
830
{
831
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
832 833 834 835
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 tmp;

836
	intel_panel_actually_set_backlight(old_conn_state, 0);
837

838 839 840 841
	tmp = intel_de_read(dev_priv,
			    BXT_BLC_PWM_CTL(panel->backlight.controller));
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       tmp & ~BXT_BLC_PWM_ENABLE);
842 843
}

844
static void pwm_disable_backlight(const struct drm_connector_state *old_conn_state)
845
{
846
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
847 848 849
	struct intel_panel *panel = &connector->panel;

	/* Disable the backlight */
850
	intel_panel_actually_set_backlight(old_conn_state, 0);
851 852 853 854
	usleep_range(2000, 3000);
	pwm_disable(panel->backlight.pwm);
}

855
void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state)
856
{
857
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
858
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
859
	struct intel_panel *panel = &connector->panel;
860

861
	if (!panel->backlight.present)
862 863
		return;

864
	/*
865
	 * Do not disable backlight on the vga_switcheroo path. When switching
866 867 868 869
	 * away from i915, the other client may depend on i915 to handle the
	 * backlight. This will leave the backlight on unnecessarily when
	 * another client is not activated.
	 */
870
	if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) {
871 872
		drm_dbg(&dev_priv->drm,
			"Skipping backlight disable on vga switch\n");
873 874 875
		return;
	}

876
	mutex_lock(&dev_priv->backlight_lock);
877

878 879
	if (panel->backlight.device)
		panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
880
	panel->backlight.enabled = false;
881
	panel->backlight.disable(old_conn_state);
882

883
	mutex_unlock(&dev_priv->backlight_lock);
884
}
885

886 887
static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,
				 const struct drm_connector_state *conn_state)
888
{
889
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
890
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
891
	struct intel_panel *panel = &connector->panel;
892
	u32 pch_ctl1, pch_ctl2, schicken;
893

894
	pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
895
	if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
896
		drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n");
897
		pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
898
		intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1);
899
	}
900

901
	if (HAS_PCH_LPT(dev_priv)) {
902
		schicken = intel_de_read(dev_priv, SOUTH_CHICKEN2);
903 904 905 906
		if (panel->backlight.alternate_pwm_increment)
			schicken |= LPT_PWM_GRANULARITY;
		else
			schicken &= ~LPT_PWM_GRANULARITY;
907
		intel_de_write(dev_priv, SOUTH_CHICKEN2, schicken);
908
	} else {
909
		schicken = intel_de_read(dev_priv, SOUTH_CHICKEN1);
910 911 912 913
		if (panel->backlight.alternate_pwm_increment)
			schicken |= SPT_PWM_GRANULARITY;
		else
			schicken &= ~SPT_PWM_GRANULARITY;
914
		intel_de_write(dev_priv, SOUTH_CHICKEN1, schicken);
915 916
	}

917
	pch_ctl2 = panel->backlight.max << 16;
918
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2);
919

920 921 922
	pch_ctl1 = 0;
	if (panel->backlight.active_low_pwm)
		pch_ctl1 |= BLM_PCH_POLARITY;
923

924 925 926
	/* After LPT, override is the default. */
	if (HAS_PCH_LPT(dev_priv))
		pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
927

928 929 930 931
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1);
	intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1);
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1,
		       pch_ctl1 | BLM_PCH_PWM_ENABLE);
932 933

	/* This won't stick until the above enable. */
934
	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
935 936
}

937 938
static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
				 const struct drm_connector_state *conn_state)
939
{
940
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
941
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
942
	struct intel_panel *panel = &connector->panel;
943
	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
944
	u32 cpu_ctl2, pch_ctl1, pch_ctl2;
945

946
	cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
947
	if (cpu_ctl2 & BLM_PWM_ENABLE) {
948
		drm_dbg_kms(&dev_priv->drm, "cpu backlight already enabled\n");
949
		cpu_ctl2 &= ~BLM_PWM_ENABLE;
950
		intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2);
951
	}
952

953
	pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
954
	if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
955
		drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n");
956
		pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
957
		intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1);
958
	}
959 960

	if (cpu_transcoder == TRANSCODER_EDP)
961
		cpu_ctl2 = BLM_TRANSCODER_EDP;
962
	else
963
		cpu_ctl2 = BLM_PIPE(cpu_transcoder);
964 965 966
	intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2);
	intel_de_posting_read(dev_priv, BLC_PWM_CPU_CTL2);
	intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
967

968
	/* This won't stick until the above enable. */
969
	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
970 971

	pch_ctl2 = panel->backlight.max << 16;
972
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2);
973 974 975 976

	pch_ctl1 = 0;
	if (panel->backlight.active_low_pwm)
		pch_ctl1 |= BLM_PCH_POLARITY;
977

978 979 980 981
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1);
	intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1);
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1,
		       pch_ctl1 | BLM_PCH_PWM_ENABLE);
982 983
}

984 985
static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,
				  const struct drm_connector_state *conn_state)
986
{
987
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
988
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
989
	struct intel_panel *panel = &connector->panel;
990 991
	u32 ctl, freq;

992
	ctl = intel_de_read(dev_priv, BLC_PWM_CTL);
993
	if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
994
		drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
995
		intel_de_write(dev_priv, BLC_PWM_CTL, 0);
996
	}
997

998 999 1000 1001 1002
	freq = panel->backlight.max;
	if (panel->backlight.combination_mode)
		freq /= 0xff;

	ctl = freq << 17;
1003
	if (panel->backlight.combination_mode)
1004
		ctl |= BLM_LEGACY_MODE;
1005
	if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
1006 1007
		ctl |= BLM_POLARITY_PNV;

1008 1009
	intel_de_write(dev_priv, BLC_PWM_CTL, ctl);
	intel_de_posting_read(dev_priv, BLC_PWM_CTL);
1010 1011

	/* XXX: combine this into above write? */
1012
	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1013 1014 1015 1016 1017 1018

	/*
	 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
	 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
	 * that has backlight.
	 */
1019
	if (IS_GEN(dev_priv, 2))
1020
		intel_de_write(dev_priv, BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
1021
}
1022

1023 1024
static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,
				  const struct drm_connector_state *conn_state)
1025
{
1026
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1027
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1028
	struct intel_panel *panel = &connector->panel;
1029
	enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
1030
	u32 ctl, ctl2, freq;
1031

1032
	ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2);
1033
	if (ctl2 & BLM_PWM_ENABLE) {
1034
		drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1035
		ctl2 &= ~BLM_PWM_ENABLE;
1036
		intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2);
1037
	}
1038

1039 1040 1041
	freq = panel->backlight.max;
	if (panel->backlight.combination_mode)
		freq /= 0xff;
1042

1043
	ctl = freq << 16;
1044
	intel_de_write(dev_priv, BLC_PWM_CTL, ctl);
1045

1046 1047 1048 1049 1050
	ctl2 = BLM_PIPE(pipe);
	if (panel->backlight.combination_mode)
		ctl2 |= BLM_COMBINATION_MODE;
	if (panel->backlight.active_low_pwm)
		ctl2 |= BLM_POLARITY_I965;
1051 1052 1053
	intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2);
	intel_de_posting_read(dev_priv, BLC_PWM_CTL2);
	intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
1054

1055
	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1056 1057
}

1058 1059
static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,
				 const struct drm_connector_state *conn_state)
1060
{
1061
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1062
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1063
	struct intel_panel *panel = &connector->panel;
1064
	enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
1065
	u32 ctl, ctl2;
1066

1067
	ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
1068
	if (ctl2 & BLM_PWM_ENABLE) {
1069
		drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1070
		ctl2 &= ~BLM_PWM_ENABLE;
1071
		intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2);
1072
	}
1073

1074
	ctl = panel->backlight.max << 16;
1075
	intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), ctl);
1076

1077
	/* XXX: combine this into above write? */
1078
	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1079

1080 1081 1082
	ctl2 = 0;
	if (panel->backlight.active_low_pwm)
		ctl2 |= BLM_POLARITY_I965;
1083 1084 1085 1086
	intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2);
	intel_de_posting_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
	intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe),
		       ctl2 | BLM_PWM_ENABLE);
1087 1088
}

1089 1090
static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state,
				 const struct drm_connector_state *conn_state)
1091
{
1092
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1093
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1094
	struct intel_panel *panel = &connector->panel;
1095
	enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
1096 1097
	u32 pwm_ctl, val;

1098
	/* Controller 1 uses the utility pin. */
1099
	if (panel->backlight.controller == 1) {
1100
		val = intel_de_read(dev_priv, UTIL_PIN_CTL);
1101
		if (val & UTIL_PIN_ENABLE) {
1102 1103
			drm_dbg_kms(&dev_priv->drm,
				    "util pin already enabled\n");
1104
			val &= ~UTIL_PIN_ENABLE;
1105
			intel_de_write(dev_priv, UTIL_PIN_CTL, val);
1106
		}
1107

1108 1109 1110
		val = 0;
		if (panel->backlight.util_pin_active_low)
			val |= UTIL_PIN_POLARITY;
1111 1112
		intel_de_write(dev_priv, UTIL_PIN_CTL,
			       val | UTIL_PIN_PIPE(pipe) | UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
1113 1114
	}

1115 1116
	pwm_ctl = intel_de_read(dev_priv,
				BXT_BLC_PWM_CTL(panel->backlight.controller));
1117
	if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1118
		drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1119
		pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1120 1121 1122
		intel_de_write(dev_priv,
			       BXT_BLC_PWM_CTL(panel->backlight.controller),
			       pwm_ctl);
1123 1124
	}

1125 1126 1127
	intel_de_write(dev_priv,
		       BXT_BLC_PWM_FREQ(panel->backlight.controller),
		       panel->backlight.max);
1128

1129
	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1130 1131 1132 1133 1134

	pwm_ctl = 0;
	if (panel->backlight.active_low_pwm)
		pwm_ctl |= BXT_BLC_PWM_POLARITY;

1135 1136 1137 1138 1139 1140
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       pwm_ctl);
	intel_de_posting_read(dev_priv,
			      BXT_BLC_PWM_CTL(panel->backlight.controller));
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       pwm_ctl | BXT_BLC_PWM_ENABLE);
1141 1142
}

1143 1144
static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,
				 const struct drm_connector_state *conn_state)
1145
{
1146
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1147 1148 1149 1150
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 pwm_ctl;

1151 1152
	pwm_ctl = intel_de_read(dev_priv,
				BXT_BLC_PWM_CTL(panel->backlight.controller));
1153
	if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1154
		drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1155
		pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1156 1157 1158
		intel_de_write(dev_priv,
			       BXT_BLC_PWM_CTL(panel->backlight.controller),
			       pwm_ctl);
1159 1160
	}

1161 1162 1163
	intel_de_write(dev_priv,
		       BXT_BLC_PWM_FREQ(panel->backlight.controller),
		       panel->backlight.max);
1164

1165
	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1166 1167 1168 1169 1170

	pwm_ctl = 0;
	if (panel->backlight.active_low_pwm)
		pwm_ctl |= BXT_BLC_PWM_POLARITY;

1171 1172 1173 1174 1175 1176
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       pwm_ctl);
	intel_de_posting_read(dev_priv,
			      BXT_BLC_PWM_CTL(panel->backlight.controller));
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       pwm_ctl | BXT_BLC_PWM_ENABLE);
1177 1178
}

1179 1180
static void pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
				 const struct drm_connector_state *conn_state)
1181
{
1182
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1183 1184 1185
	struct intel_panel *panel = &connector->panel;

	pwm_enable(panel->backlight.pwm);
1186
	intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1187 1188
}

1189 1190
static void __intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
					   const struct drm_connector_state *conn_state)
1191
{
1192
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1193
	struct intel_panel *panel = &connector->panel;
1194

1195 1196
	WARN_ON(panel->backlight.max == 0);

1197
	if (panel->backlight.level <= panel->backlight.min) {
1198
		panel->backlight.level = panel->backlight.max;
1199 1200
		if (panel->backlight.device)
			panel->backlight.device->props.brightness =
1201 1202 1203
				scale_hw_to_user(connector,
						 panel->backlight.level,
						 panel->backlight.device->props.max_brightness);
1204
	}
1205

1206
	panel->backlight.enable(crtc_state, conn_state);
1207
	panel->backlight.enabled = true;
1208 1209
	if (panel->backlight.device)
		panel->backlight.device->props.power = FB_BLANK_UNBLANK;
1210 1211 1212 1213 1214 1215 1216 1217
}

void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
				  const struct drm_connector_state *conn_state)
{
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
1218
	enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
1219 1220 1221 1222

	if (!panel->backlight.present)
		return;

1223
	drm_dbg_kms(&dev_priv->drm, "pipe %c\n", pipe_name(pipe));
1224 1225 1226 1227

	mutex_lock(&dev_priv->backlight_lock);

	__intel_panel_enable_backlight(crtc_state, conn_state);
1228

1229
	mutex_unlock(&dev_priv->backlight_lock);
1230 1231
}

1232
#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247
static u32 intel_panel_get_backlight(struct intel_connector *connector)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 val = 0;

	mutex_lock(&dev_priv->backlight_lock);

	if (panel->backlight.enabled) {
		val = panel->backlight.get(connector);
		val = intel_panel_compute_brightness(connector, val);
	}

	mutex_unlock(&dev_priv->backlight_lock);

1248
	drm_dbg(&dev_priv->drm, "get backlight PWM = %d\n", val);
1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265
	return val;
}

/* set backlight brightness to level in range [0..max], scaling wrt hw min */
static void intel_panel_set_backlight(const struct drm_connector_state *conn_state,
				      u32 user_level, u32 user_max)
{
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 hw_level;

	if (!panel->backlight.present)
		return;

	mutex_lock(&dev_priv->backlight_lock);

1266
	drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
1267 1268 1269 1270 1271 1272 1273 1274 1275 1276

	hw_level = scale_user_to_hw(connector, user_level, user_max);
	panel->backlight.level = hw_level;

	if (panel->backlight.enabled)
		intel_panel_actually_set_backlight(conn_state, hw_level);

	mutex_unlock(&dev_priv->backlight_lock);
}

1277
static int intel_backlight_device_update_status(struct backlight_device *bd)
1278
{
1279
	struct intel_connector *connector = bl_get_data(bd);
1280
	struct intel_panel *panel = &connector->panel;
1281 1282
	struct drm_device *dev = connector->base.dev;

1283
	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1284 1285
	DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
		      bd->props.brightness, bd->props.max_brightness);
1286
	intel_panel_set_backlight(connector->base.state, bd->props.brightness,
1287
				  bd->props.max_brightness);
1288 1289 1290 1291 1292 1293 1294 1295

	/*
	 * Allow flipping bl_power as a sub-state of enabled. Sadly the
	 * backlight class device does not make it easy to to differentiate
	 * between callbacks for brightness and bl_power, so our backlight_power
	 * callback needs to take this into account.
	 */
	if (panel->backlight.enabled) {
1296
		if (panel->backlight.power) {
1297 1298
			bool enable = bd->props.power == FB_BLANK_UNBLANK &&
				bd->props.brightness != 0;
1299
			panel->backlight.power(connector, enable);
1300 1301 1302 1303 1304
		}
	} else {
		bd->props.power = FB_BLANK_POWERDOWN;
	}

1305
	drm_modeset_unlock(&dev->mode_config.connection_mutex);
1306 1307 1308
	return 0;
}

1309
static int intel_backlight_device_get_brightness(struct backlight_device *bd)
1310
{
1311 1312
	struct intel_connector *connector = bl_get_data(bd);
	struct drm_device *dev = connector->base.dev;
1313
	struct drm_i915_private *dev_priv = to_i915(dev);
1314
	intel_wakeref_t wakeref;
1315
	int ret = 0;
1316

1317
	with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) {
1318
		u32 hw_level;
1319

1320
		drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1321

1322 1323 1324 1325 1326 1327
		hw_level = intel_panel_get_backlight(connector);
		ret = scale_hw_to_user(connector,
				       hw_level, bd->props.max_brightness);

		drm_modeset_unlock(&dev->mode_config.connection_mutex);
	}
1328

1329
	return ret;
1330 1331
}

1332 1333 1334
static const struct backlight_ops intel_backlight_device_ops = {
	.update_status = intel_backlight_device_update_status,
	.get_brightness = intel_backlight_device_get_brightness,
1335 1336
};

1337
int intel_backlight_device_register(struct intel_connector *connector)
1338
{
1339
	struct intel_panel *panel = &connector->panel;
1340 1341
	struct backlight_properties props;

1342
	if (WARN_ON(panel->backlight.device))
1343 1344
		return -ENODEV;

1345 1346 1347
	if (!panel->backlight.present)
		return 0;

1348
	WARN_ON(panel->backlight.max == 0);
1349

1350
	memset(&props, 0, sizeof(props));
1351
	props.type = BACKLIGHT_RAW;
1352 1353 1354 1355 1356

	/*
	 * Note: Everything should work even if the backlight device max
	 * presented to the userspace is arbitrarily chosen.
	 */
1357
	props.max_brightness = panel->backlight.max;
1358 1359 1360
	props.brightness = scale_hw_to_user(connector,
					    panel->backlight.level,
					    props.max_brightness);
1361

1362 1363 1364 1365 1366
	if (panel->backlight.enabled)
		props.power = FB_BLANK_UNBLANK;
	else
		props.power = FB_BLANK_POWERDOWN;

1367 1368 1369 1370 1371
	/*
	 * Note: using the same name independent of the connector prevents
	 * registration of multiple backlight devices in the driver.
	 */
	panel->backlight.device =
1372
		backlight_device_register("intel_backlight",
1373 1374 1375
					  connector->base.kdev,
					  connector,
					  &intel_backlight_device_ops, &props);
1376

1377
	if (IS_ERR(panel->backlight.device)) {
1378
		DRM_ERROR("Failed to register backlight: %ld\n",
1379 1380
			  PTR_ERR(panel->backlight.device));
		panel->backlight.device = NULL;
1381 1382
		return -ENODEV;
	}
1383 1384 1385 1386

	DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
		      connector->base.name);

1387 1388 1389
	return 0;
}

1390
void intel_backlight_device_unregister(struct intel_connector *connector)
1391
{
1392 1393 1394 1395 1396
	struct intel_panel *panel = &connector->panel;

	if (panel->backlight.device) {
		backlight_device_unregister(panel->backlight.device);
		panel->backlight.device = NULL;
1397
	}
1398
}
1399 1400
#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */

1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411
/*
 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz.
 *      PWM increment = 1
 */
static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);

	return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz);
}

1412 1413 1414 1415 1416
/*
 * BXT: PWM clock frequency = 19.2 MHz.
 */
static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1417
	return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz);
1418 1419
}

1420
/*
1421 1422 1423 1424 1425 1426
 * SPT: This value represents the period of the PWM stream in clock periods
 * multiplied by 16 (default increment) or 128 (alternate increment selected in
 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
 */
static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1427
	struct intel_panel *panel = &connector->panel;
1428
	u32 mul;
1429

1430
	if (panel->backlight.alternate_pwm_increment)
1431 1432 1433 1434
		mul = 128;
	else
		mul = 16;

1435
	return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul);
1436 1437 1438 1439 1440 1441 1442 1443 1444
}

/*
 * LPT: This value represents the period of the PWM stream in clock periods
 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
 * LPT SOUTH_CHICKEN2 register bit 5).
 */
static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1445
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1446
	struct intel_panel *panel = &connector->panel;
1447 1448
	u32 mul, clock;

1449
	if (panel->backlight.alternate_pwm_increment)
1450 1451 1452 1453
		mul = 16;
	else
		mul = 128;

V
Ville Syrjälä 已提交
1454
	if (HAS_PCH_LPT_H(dev_priv))
1455 1456 1457 1458
		clock = MHz(135); /* LPT:H */
	else
		clock = MHz(24); /* LPT:LP */

1459
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1460 1461 1462 1463 1464 1465 1466 1467
}

/*
 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
 * display raw clocks multiplied by 128.
 */
static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1468
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1469

1470
	return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128);
1471 1472 1473 1474 1475 1476
}

/*
 * Gen2: This field determines the number of time base events (display core
 * clock frequency/32) in total for a complete cycle of modulated backlight
 * control.
1477
 *
1478 1479 1480 1481 1482
 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
 * divided by 32.
 */
static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1483
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1484 1485
	int clock;

1486 1487
	if (IS_PINEVIEW(dev_priv))
		clock = KHz(dev_priv->rawclk_freq);
1488
	else
1489
		clock = KHz(dev_priv->cdclk.hw.cdclk);
1490

1491
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);
1492 1493 1494 1495
}

/*
 * Gen4: This value represents the period of the PWM stream in display core
1496 1497
 * clocks ([DevCTG] HRAW clocks) multiplied by 128.
 *
1498 1499 1500
 */
static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1501
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1502 1503 1504
	int clock;

	if (IS_G4X(dev_priv))
1505
		clock = KHz(dev_priv->rawclk_freq);
1506
	else
1507
		clock = KHz(dev_priv->cdclk.hw.cdclk);
1508

1509
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);
1510 1511 1512 1513 1514 1515 1516 1517 1518
}

/*
 * VLV: This value represents the period of the PWM stream in display core
 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
 */
static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1519 1520
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	int mul, clock;
1521

1522
	if ((intel_de_read(dev_priv, CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1523 1524
		if (IS_CHERRYVIEW(dev_priv))
			clock = KHz(19200);
1525
		else
1526 1527
			clock = MHz(25);
		mul = 16;
1528
	} else {
1529 1530
		clock = KHz(dev_priv->rawclk_freq);
		mul = 128;
1531
	}
1532

1533
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1534 1535 1536 1537
}

static u32 get_backlight_max_vbt(struct intel_connector *connector)
{
1538
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1539
	struct intel_panel *panel = &connector->panel;
1540 1541 1542
	u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
	u32 pwm;

1543
	if (!panel->backlight.hz_to_pwm) {
1544 1545
		drm_dbg_kms(&dev_priv->drm,
			    "backlight frequency conversion not supported\n");
1546 1547 1548
		return 0;
	}

1549
	if (pwm_freq_hz) {
1550 1551 1552
		drm_dbg_kms(&dev_priv->drm,
			    "VBT defined backlight frequency %u Hz\n",
			    pwm_freq_hz);
1553 1554
	} else {
		pwm_freq_hz = 200;
1555 1556 1557
		drm_dbg_kms(&dev_priv->drm,
			    "default backlight frequency %u Hz\n",
			    pwm_freq_hz);
1558 1559
	}

1560
	pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
1561
	if (!pwm) {
1562 1563
		drm_dbg_kms(&dev_priv->drm,
			    "backlight frequency conversion failed\n");
1564 1565 1566 1567 1568 1569 1570 1571
		return 0;
	}

	return pwm;
}

/*
 * Note: The setup hooks can't assume pipe is set!
1572
 */
1573 1574
static u32 get_backlight_min_vbt(struct intel_connector *connector)
{
1575
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1576
	struct intel_panel *panel = &connector->panel;
1577
	int min;
1578

1579
	drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
1580

1581 1582 1583 1584 1585 1586 1587 1588 1589
	/*
	 * XXX: If the vbt value is 255, it makes min equal to max, which leads
	 * to problems. There are such machines out there. Either our
	 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
	 * against this by letting the minimum be at most (arbitrarily chosen)
	 * 25% of the max.
	 */
	min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
	if (min != dev_priv->vbt.backlight.min_brightness) {
1590 1591 1592
		drm_dbg_kms(&dev_priv->drm,
			    "clamping VBT min backlight %d/255 to %d/255\n",
			    dev_priv->vbt.backlight.min_brightness, min);
1593 1594
	}

1595
	/* vbt value is a coefficient in range [0..255] */
1596
	return scale(min, 0, 255, 0, panel->backlight.max);
1597 1598
}

1599
static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1600
{
1601
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1602
	struct intel_panel *panel = &connector->panel;
1603 1604
	u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
	bool alt, cpu_mode;
1605 1606

	if (HAS_PCH_LPT(dev_priv))
1607
		alt = intel_de_read(dev_priv, SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
1608
	else
1609
		alt = intel_de_read(dev_priv, SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
1610
	panel->backlight.alternate_pwm_increment = alt;
1611

1612
	pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
1613 1614
	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;

1615
	pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2);
1616
	panel->backlight.max = pch_ctl2 >> 16;
1617

1618
	cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
1619

1620 1621 1622
	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);

1623 1624 1625
	if (!panel->backlight.max)
		return -ENODEV;

1626 1627
	panel->backlight.min = get_backlight_min_vbt(connector);

1628 1629 1630 1631 1632 1633 1634 1635 1636
	panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;

	cpu_mode = panel->backlight.enabled && HAS_PCH_LPT(dev_priv) &&
		   !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) &&
		   (cpu_ctl2 & BLM_PWM_ENABLE);
	if (cpu_mode)
		val = pch_get_backlight(connector);
	else
		val = lpt_get_backlight(connector);
1637 1638 1639
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1640

1641
	if (cpu_mode) {
1642 1643
		drm_dbg_kms(&dev_priv->drm,
			    "CPU backlight register was enabled, switching to PCH override\n");
1644 1645 1646

		/* Write converted CPU PWM value to PCH override register */
		lpt_set_backlight(connector->base.state, panel->backlight.level);
1647 1648
		intel_de_write(dev_priv, BLC_PWM_PCH_CTL1,
			       pch_ctl1 | BLM_PCH_OVERRIDE_ENABLE);
1649

1650 1651
		intel_de_write(dev_priv, BLC_PWM_CPU_CTL2,
			       cpu_ctl2 & ~BLM_PWM_ENABLE);
1652
	}
1653 1654 1655 1656

	return 0;
}

1657
static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
1658
{
1659
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1660
	struct intel_panel *panel = &connector->panel;
1661
	u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
1662

1663
	pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
1664 1665
	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;

1666
	pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2);
1667
	panel->backlight.max = pch_ctl2 >> 16;
1668 1669 1670 1671

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);

1672 1673 1674
	if (!panel->backlight.max)
		return -ENODEV;

1675 1676
	panel->backlight.min = get_backlight_min_vbt(connector);

1677
	val = pch_get_backlight(connector);
1678 1679 1680
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1681

1682
	cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
1683
	panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1684
		(pch_ctl1 & BLM_PCH_PWM_ENABLE);
1685

1686 1687 1688
	return 0;
}

1689
static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
1690
{
1691
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1692
	struct intel_panel *panel = &connector->panel;
1693 1694
	u32 ctl, val;

1695
	ctl = intel_de_read(dev_priv, BLC_PWM_CTL);
1696

1697
	if (IS_GEN(dev_priv, 2) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
1698 1699
		panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;

1700
	if (IS_PINEVIEW(dev_priv))
1701 1702 1703
		panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;

	panel->backlight.max = ctl >> 17;
1704 1705 1706 1707 1708

	if (!panel->backlight.max) {
		panel->backlight.max = get_backlight_max_vbt(connector);
		panel->backlight.max >>= 1;
	}
1709 1710 1711 1712

	if (!panel->backlight.max)
		return -ENODEV;

1713 1714 1715
	if (panel->backlight.combination_mode)
		panel->backlight.max *= 0xff;

1716 1717
	panel->backlight.min = get_backlight_min_vbt(connector);

1718
	val = i9xx_get_backlight(connector);
1719 1720 1721
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1722

1723
	panel->backlight.enabled = val != 0;
1724

1725 1726 1727
	return 0;
}

1728
static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
1729
{
1730
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1731
	struct intel_panel *panel = &connector->panel;
1732 1733
	u32 ctl, ctl2, val;

1734
	ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2);
1735 1736 1737
	panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
	panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;

1738
	ctl = intel_de_read(dev_priv, BLC_PWM_CTL);
1739
	panel->backlight.max = ctl >> 16;
1740 1741 1742

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);
1743 1744 1745 1746

	if (!panel->backlight.max)
		return -ENODEV;

1747 1748 1749
	if (panel->backlight.combination_mode)
		panel->backlight.max *= 0xff;

1750 1751
	panel->backlight.min = get_backlight_min_vbt(connector);

1752
	val = i9xx_get_backlight(connector);
1753 1754 1755
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1756

1757
	panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1758

1759 1760 1761
	return 0;
}

1762
static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
1763
{
1764
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1765
	struct intel_panel *panel = &connector->panel;
1766
	u32 ctl, ctl2, val;
1767

1768
	if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B))
1769 1770
		return -ENODEV;

1771
	ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
1772 1773
	panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;

1774
	ctl = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe));
1775
	panel->backlight.max = ctl >> 16;
1776 1777 1778 1779

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);

1780 1781 1782
	if (!panel->backlight.max)
		return -ENODEV;

1783 1784
	panel->backlight.min = get_backlight_min_vbt(connector);

1785
	val = _vlv_get_backlight(dev_priv, pipe);
1786 1787 1788
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1789

1790
	panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1791

1792 1793 1794
	return 0;
}

1795 1796 1797
static int
bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
{
1798
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1799 1800 1801
	struct intel_panel *panel = &connector->panel;
	u32 pwm_ctl, val;

1802
	panel->backlight.controller = dev_priv->vbt.backlight.controller;
1803

1804 1805
	pwm_ctl = intel_de_read(dev_priv,
				BXT_BLC_PWM_CTL(panel->backlight.controller));
1806

1807
	/* Controller 1 uses the utility pin. */
1808
	if (panel->backlight.controller == 1) {
1809
		val = intel_de_read(dev_priv, UTIL_PIN_CTL);
1810 1811 1812 1813 1814 1815
		panel->backlight.util_pin_active_low =
					val & UTIL_PIN_POLARITY;
	}

	panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
	panel->backlight.max =
1816 1817
		intel_de_read(dev_priv,
			      BXT_BLC_PWM_FREQ(panel->backlight.controller));
1818 1819 1820 1821

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);

1822 1823 1824
	if (!panel->backlight.max)
		return -ENODEV;

1825 1826
	panel->backlight.min = get_backlight_min_vbt(connector);

1827
	val = bxt_get_backlight(connector);
1828 1829 1830
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);
1831

1832
	panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1833 1834 1835 1836

	return 0;
}

1837 1838 1839 1840 1841 1842 1843 1844
static int
cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 pwm_ctl, val;

	/*
1845 1846 1847
	 * CNP has the BXT implementation of backlight, but with only one
	 * controller. TODO: ICP has multiple controllers but we only use
	 * controller 0 for now.
1848 1849 1850
	 */
	panel->backlight.controller = 0;

1851 1852
	pwm_ctl = intel_de_read(dev_priv,
				BXT_BLC_PWM_CTL(panel->backlight.controller));
1853 1854 1855

	panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
	panel->backlight.max =
1856 1857
		intel_de_read(dev_priv,
			      BXT_BLC_PWM_FREQ(panel->backlight.controller));
1858 1859 1860 1861 1862 1863 1864

	if (!panel->backlight.max)
		panel->backlight.max = get_backlight_max_vbt(connector);

	if (!panel->backlight.max)
		return -ENODEV;

1865 1866
	panel->backlight.min = get_backlight_min_vbt(connector);

1867 1868 1869 1870 1871 1872 1873 1874 1875 1876
	val = bxt_get_backlight(connector);
	val = intel_panel_compute_brightness(connector, val);
	panel->backlight.level = clamp(val, panel->backlight.min,
				       panel->backlight.max);

	panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;

	return 0;
}

1877 1878 1879 1880
static int pwm_setup_backlight(struct intel_connector *connector,
			       enum pipe pipe)
{
	struct drm_device *dev = connector->base.dev;
1881
	struct drm_i915_private *dev_priv = to_i915(dev);
1882
	struct intel_panel *panel = &connector->panel;
1883
	const char *desc;
1884 1885
	int retval;

1886 1887 1888 1889 1890 1891 1892 1893 1894
	/* Get the right PWM chip for DSI backlight according to VBT */
	if (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) {
		panel->backlight.pwm = pwm_get(dev->dev, "pwm_pmic_backlight");
		desc = "PMIC";
	} else {
		panel->backlight.pwm = pwm_get(dev->dev, "pwm_soc_backlight");
		desc = "SoC";
	}

1895
	if (IS_ERR(panel->backlight.pwm)) {
1896 1897
		drm_err(&dev_priv->drm, "Failed to get the %s PWM chip\n",
			desc);
1898 1899 1900 1901
		panel->backlight.pwm = NULL;
		return -ENODEV;
	}

1902 1903 1904 1905 1906 1907
	/*
	 * FIXME: pwm_apply_args() should be removed when switching to
	 * the atomic PWM API.
	 */
	pwm_apply_args(panel->backlight.pwm);

1908 1909 1910
	retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
			    CRC_PMIC_PWM_PERIOD_NS);
	if (retval < 0) {
1911
		drm_err(&dev_priv->drm, "Failed to configure the pwm chip\n");
1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923
		pwm_put(panel->backlight.pwm);
		panel->backlight.pwm = NULL;
		return retval;
	}

	panel->backlight.min = 0; /* 0% */
	panel->backlight.max = 100; /* 100% */
	panel->backlight.level = DIV_ROUND_UP(
				 pwm_get_duty_cycle(panel->backlight.pwm) * 100,
				 CRC_PMIC_PWM_PERIOD_NS);
	panel->backlight.enabled = panel->backlight.level != 0;

1924 1925
	drm_info(&dev_priv->drm, "Using %s PWM for LCD backlight control\n",
		 desc);
1926 1927 1928
	return 0;
}

1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946
void intel_panel_update_backlight(struct intel_encoder *encoder,
				  const struct intel_crtc_state *crtc_state,
				  const struct drm_connector_state *conn_state)
{
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;

	if (!panel->backlight.present)
		return;

	mutex_lock(&dev_priv->backlight_lock);
	if (!panel->backlight.enabled)
		__intel_panel_enable_backlight(crtc_state, conn_state);

	mutex_unlock(&dev_priv->backlight_lock);
}

1947
int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
1948
{
1949
	struct drm_i915_private *dev_priv = to_i915(connector->dev);
1950
	struct intel_connector *intel_connector = to_intel_connector(connector);
1951
	struct intel_panel *panel = &intel_connector->panel;
1952
	int ret;
1953

1954
	if (!dev_priv->vbt.backlight.present) {
1955
		if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1956 1957
			drm_dbg_kms(&dev_priv->drm,
				    "no backlight present per VBT, but present per quirk\n");
1958
		} else {
1959 1960
			drm_dbg_kms(&dev_priv->drm,
				    "no backlight present per VBT\n");
1961 1962
			return 0;
		}
1963 1964
	}

1965
	/* ensure intel_panel has been initialized first */
1966
	if (drm_WARN_ON(&dev_priv->drm, !panel->backlight.setup))
1967 1968
		return -ENODEV;

1969
	/* set level and max in panel struct */
1970
	mutex_lock(&dev_priv->backlight_lock);
1971
	ret = panel->backlight.setup(intel_connector, pipe);
1972
	mutex_unlock(&dev_priv->backlight_lock);
1973 1974

	if (ret) {
1975 1976 1977
		drm_dbg_kms(&dev_priv->drm,
			    "failed to setup backlight for connector %s\n",
			    connector->name);
1978 1979
		return ret;
	}
1980

1981 1982
	panel->backlight.present = true;

1983 1984 1985 1986 1987
	drm_dbg_kms(&dev_priv->drm,
		    "Connector %s backlight initialized, %s, brightness %u/%u\n",
		    connector->name,
		    enableddisabled(panel->backlight.enabled),
		    panel->backlight.level, panel->backlight.max);
1988

1989 1990 1991
	return 0;
}

1992
static void intel_panel_destroy_backlight(struct intel_panel *panel)
1993
{
1994 1995 1996 1997
	/* dispose of the pwm */
	if (panel->backlight.pwm)
		pwm_put(panel->backlight.pwm);

1998
	panel->backlight.present = false;
1999
}
2000

2001
/* Set up chip specific backlight functions */
2002 2003
static void
intel_panel_init_backlight_funcs(struct intel_panel *panel)
2004
{
2005
	struct intel_connector *connector =
2006
		container_of(panel, struct intel_connector, panel);
2007
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
2008

2009 2010 2011 2012
	if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
	    intel_dp_aux_init_backlight_funcs(connector) == 0)
		return;

2013 2014 2015 2016
	if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
	    intel_dsi_dcs_init_backlight_funcs(connector) == 0)
		return;

2017
	if (IS_GEN9_LP(dev_priv)) {
2018 2019 2020 2021 2022
		panel->backlight.setup = bxt_setup_backlight;
		panel->backlight.enable = bxt_enable_backlight;
		panel->backlight.disable = bxt_disable_backlight;
		panel->backlight.set = bxt_set_backlight;
		panel->backlight.get = bxt_get_backlight;
2023
		panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
2024
	} else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) {
2025 2026 2027 2028 2029 2030
		panel->backlight.setup = cnp_setup_backlight;
		panel->backlight.enable = cnp_enable_backlight;
		panel->backlight.disable = cnp_disable_backlight;
		panel->backlight.set = bxt_set_backlight;
		panel->backlight.get = bxt_get_backlight;
		panel->backlight.hz_to_pwm = cnp_hz_to_pwm;
2031
	} else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) {
2032 2033 2034 2035 2036
		panel->backlight.setup = lpt_setup_backlight;
		panel->backlight.enable = lpt_enable_backlight;
		panel->backlight.disable = lpt_disable_backlight;
		panel->backlight.set = lpt_set_backlight;
		panel->backlight.get = lpt_get_backlight;
2037
		if (HAS_PCH_LPT(dev_priv))
2038
			panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
2039
		else
2040
			panel->backlight.hz_to_pwm = spt_hz_to_pwm;
2041
	} else if (HAS_PCH_SPLIT(dev_priv)) {
2042 2043 2044 2045 2046 2047
		panel->backlight.setup = pch_setup_backlight;
		panel->backlight.enable = pch_enable_backlight;
		panel->backlight.disable = pch_disable_backlight;
		panel->backlight.set = pch_set_backlight;
		panel->backlight.get = pch_get_backlight;
		panel->backlight.hz_to_pwm = pch_hz_to_pwm;
2048
	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
2049
		if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
2050 2051 2052 2053 2054
			panel->backlight.setup = pwm_setup_backlight;
			panel->backlight.enable = pwm_enable_backlight;
			panel->backlight.disable = pwm_disable_backlight;
			panel->backlight.set = pwm_set_backlight;
			panel->backlight.get = pwm_get_backlight;
2055
		} else {
2056 2057 2058 2059 2060 2061
			panel->backlight.setup = vlv_setup_backlight;
			panel->backlight.enable = vlv_enable_backlight;
			panel->backlight.disable = vlv_disable_backlight;
			panel->backlight.set = vlv_set_backlight;
			panel->backlight.get = vlv_get_backlight;
			panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
2062
		}
2063
	} else if (IS_GEN(dev_priv, 4)) {
2064 2065 2066 2067 2068 2069
		panel->backlight.setup = i965_setup_backlight;
		panel->backlight.enable = i965_enable_backlight;
		panel->backlight.disable = i965_disable_backlight;
		panel->backlight.set = i9xx_set_backlight;
		panel->backlight.get = i9xx_get_backlight;
		panel->backlight.hz_to_pwm = i965_hz_to_pwm;
2070
	} else {
2071 2072 2073 2074 2075 2076
		panel->backlight.setup = i9xx_setup_backlight;
		panel->backlight.enable = i9xx_enable_backlight;
		panel->backlight.disable = i9xx_disable_backlight;
		panel->backlight.set = i9xx_set_backlight;
		panel->backlight.get = i9xx_get_backlight;
		panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
2077 2078 2079
	}
}

2080
int intel_panel_init(struct intel_panel *panel,
2081 2082
		     struct drm_display_mode *fixed_mode,
		     struct drm_display_mode *downclock_mode)
2083
{
2084 2085
	intel_panel_init_backlight_funcs(panel);

2086
	panel->fixed_mode = fixed_mode;
2087
	panel->downclock_mode = downclock_mode;
2088

2089 2090 2091 2092 2093
	return 0;
}

void intel_panel_fini(struct intel_panel *panel)
{
2094 2095 2096
	struct intel_connector *intel_connector =
		container_of(panel, struct intel_connector, panel);

2097 2098
	intel_panel_destroy_backlight(panel);

2099 2100
	if (panel->fixed_mode)
		drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
2101 2102 2103 2104

	if (panel->downclock_mode)
		drm_mode_destroy(intel_connector->base.dev,
				panel->downclock_mode);
2105
}