spectrum.c 129.7 KB
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// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
/* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
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#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/ethtool.h>
#include <linux/slab.h>
#include <linux/device.h>
#include <linux/skbuff.h>
#include <linux/if_vlan.h>
#include <linux/if_bridge.h>
#include <linux/workqueue.h>
#include <linux/jiffies.h>
#include <linux/bitops.h>
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#include <linux/list.h>
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#include <linux/notifier.h>
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#include <linux/dcbnl.h>
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#include <linux/inetdevice.h>
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#include <linux/netlink.h>
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#include <linux/jhash.h>
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#include <linux/log2.h>
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#include <net/switchdev.h>
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#include <net/pkt_cls.h>
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#include <net/netevent.h>
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#include <net/addrconf.h>
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#include "spectrum.h"
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#include "pci.h"
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#include "core.h"
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#include "core_env.h"
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#include "reg.h"
#include "port.h"
#include "trap.h"
#include "txheader.h"
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#include "spectrum_cnt.h"
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#include "spectrum_dpipe.h"
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#include "spectrum_acl_flex_actions.h"
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#include "spectrum_span.h"
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#include "spectrum_ptp.h"
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#include "spectrum_trap.h"
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#define MLXSW_SP1_FWREV_MAJOR 13
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#define MLXSW_SP1_FWREV_MINOR 2008
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#define MLXSW_SP1_FWREV_SUBMINOR 2018
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#define MLXSW_SP1_FWREV_CAN_RESET_MINOR 1702
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static const struct mlxsw_fw_rev mlxsw_sp1_fw_rev = {
	.major = MLXSW_SP1_FWREV_MAJOR,
	.minor = MLXSW_SP1_FWREV_MINOR,
	.subminor = MLXSW_SP1_FWREV_SUBMINOR,
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	.can_reset_minor = MLXSW_SP1_FWREV_CAN_RESET_MINOR,
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};

#define MLXSW_SP1_FW_FILENAME \
	"mellanox/mlxsw_spectrum-" __stringify(MLXSW_SP1_FWREV_MAJOR) \
	"." __stringify(MLXSW_SP1_FWREV_MINOR) \
	"." __stringify(MLXSW_SP1_FWREV_SUBMINOR) ".mfa2"
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#define MLXSW_SP2_FWREV_MAJOR 29
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#define MLXSW_SP2_FWREV_MINOR 2008
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#define MLXSW_SP2_FWREV_SUBMINOR 2018
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static const struct mlxsw_fw_rev mlxsw_sp2_fw_rev = {
	.major = MLXSW_SP2_FWREV_MAJOR,
	.minor = MLXSW_SP2_FWREV_MINOR,
	.subminor = MLXSW_SP2_FWREV_SUBMINOR,
};

#define MLXSW_SP2_FW_FILENAME \
	"mellanox/mlxsw_spectrum2-" __stringify(MLXSW_SP2_FWREV_MAJOR) \
	"." __stringify(MLXSW_SP2_FWREV_MINOR) \
	"." __stringify(MLXSW_SP2_FWREV_SUBMINOR) ".mfa2"

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#define MLXSW_SP3_FWREV_MAJOR 30
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#define MLXSW_SP3_FWREV_MINOR 2008
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#define MLXSW_SP3_FWREV_SUBMINOR 2018
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static const struct mlxsw_fw_rev mlxsw_sp3_fw_rev = {
	.major = MLXSW_SP3_FWREV_MAJOR,
	.minor = MLXSW_SP3_FWREV_MINOR,
	.subminor = MLXSW_SP3_FWREV_SUBMINOR,
};

#define MLXSW_SP3_FW_FILENAME \
	"mellanox/mlxsw_spectrum3-" __stringify(MLXSW_SP3_FWREV_MAJOR) \
	"." __stringify(MLXSW_SP3_FWREV_MINOR) \
	"." __stringify(MLXSW_SP3_FWREV_SUBMINOR) ".mfa2"

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static const char mlxsw_sp1_driver_name[] = "mlxsw_spectrum";
static const char mlxsw_sp2_driver_name[] = "mlxsw_spectrum2";
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static const char mlxsw_sp3_driver_name[] = "mlxsw_spectrum3";
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static const unsigned char mlxsw_sp1_mac_mask[ETH_ALEN] = {
	0xff, 0xff, 0xff, 0xff, 0xfc, 0x00
};
static const unsigned char mlxsw_sp2_mac_mask[ETH_ALEN] = {
	0xff, 0xff, 0xff, 0xff, 0xf0, 0x00
};

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/* tx_hdr_version
 * Tx header version.
 * Must be set to 1.
 */
MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);

/* tx_hdr_ctl
 * Packet control type.
 * 0 - Ethernet control (e.g. EMADs, LACP)
 * 1 - Ethernet data
 */
MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);

/* tx_hdr_proto
 * Packet protocol type. Must be set to 1 (Ethernet).
 */
MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);

/* tx_hdr_rx_is_router
 * Packet is sent from the router. Valid for data packets only.
 */
MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);

/* tx_hdr_fid_valid
 * Indicates if the 'fid' field is valid and should be used for
 * forwarding lookup. Valid for data packets only.
 */
MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);

/* tx_hdr_swid
 * Switch partition ID. Must be set to 0.
 */
MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);

/* tx_hdr_control_tclass
 * Indicates if the packet should use the control TClass and not one
 * of the data TClasses.
 */
MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);

/* tx_hdr_etclass
 * Egress TClass to be used on the egress device on the egress port.
 */
MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);

/* tx_hdr_port_mid
 * Destination local port for unicast packets.
 * Destination multicast ID for multicast packets.
 *
 * Control packets are directed to a specific egress port, while data
 * packets are transmitted through the CPU port (0) into the switch partition,
 * where forwarding rules are applied.
 */
MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);

/* tx_hdr_fid
 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
 * Valid for data packets only.
 */
MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);

/* tx_hdr_type
 * 0 - Data packets
 * 6 - Control packets
 */
MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);

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int mlxsw_sp_flow_counter_get(struct mlxsw_sp *mlxsw_sp,
			      unsigned int counter_index, u64 *packets,
			      u64 *bytes)
{
	char mgpc_pl[MLXSW_REG_MGPC_LEN];
	int err;

	mlxsw_reg_mgpc_pack(mgpc_pl, counter_index, MLXSW_REG_MGPC_OPCODE_NOP,
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			    MLXSW_REG_FLOW_COUNTER_SET_TYPE_PACKETS_BYTES);
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	err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl);
	if (err)
		return err;
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	if (packets)
		*packets = mlxsw_reg_mgpc_packet_counter_get(mgpc_pl);
	if (bytes)
		*bytes = mlxsw_reg_mgpc_byte_counter_get(mgpc_pl);
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	return 0;
}

static int mlxsw_sp_flow_counter_clear(struct mlxsw_sp *mlxsw_sp,
				       unsigned int counter_index)
{
	char mgpc_pl[MLXSW_REG_MGPC_LEN];

	mlxsw_reg_mgpc_pack(mgpc_pl, counter_index, MLXSW_REG_MGPC_OPCODE_CLEAR,
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			    MLXSW_REG_FLOW_COUNTER_SET_TYPE_PACKETS_BYTES);
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	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mgpc), mgpc_pl);
}

int mlxsw_sp_flow_counter_alloc(struct mlxsw_sp *mlxsw_sp,
				unsigned int *p_counter_index)
{
	int err;

	err = mlxsw_sp_counter_alloc(mlxsw_sp, MLXSW_SP_COUNTER_SUB_POOL_FLOW,
				     p_counter_index);
	if (err)
		return err;
	err = mlxsw_sp_flow_counter_clear(mlxsw_sp, *p_counter_index);
	if (err)
		goto err_counter_clear;
	return 0;

err_counter_clear:
	mlxsw_sp_counter_free(mlxsw_sp, MLXSW_SP_COUNTER_SUB_POOL_FLOW,
			      *p_counter_index);
	return err;
}

void mlxsw_sp_flow_counter_free(struct mlxsw_sp *mlxsw_sp,
				unsigned int counter_index)
{
	 mlxsw_sp_counter_free(mlxsw_sp, MLXSW_SP_COUNTER_SUB_POOL_FLOW,
			       counter_index);
}

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static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
				     const struct mlxsw_tx_info *tx_info)
{
	char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);

	memset(txhdr, 0, MLXSW_TXHDR_LEN);

	mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
	mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
	mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
	mlxsw_tx_hdr_swid_set(txhdr, 0);
	mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
	mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
	mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
}

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enum mlxsw_reg_spms_state mlxsw_sp_stp_spms_state(u8 state)
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{
	switch (state) {
	case BR_STATE_FORWARDING:
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		return MLXSW_REG_SPMS_STATE_FORWARDING;
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	case BR_STATE_LEARNING:
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		return MLXSW_REG_SPMS_STATE_LEARNING;
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	case BR_STATE_LISTENING:
	case BR_STATE_DISABLED:
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	case BR_STATE_BLOCKING:
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		return MLXSW_REG_SPMS_STATE_DISCARDING;
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	default:
		BUG();
	}
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}

int mlxsw_sp_port_vid_stp_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid,
			      u8 state)
{
	enum mlxsw_reg_spms_state spms_state = mlxsw_sp_stp_spms_state(state);
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char *spms_pl;
	int err;
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	spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
	if (!spms_pl)
		return -ENOMEM;
	mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
	mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);

	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
	kfree(spms_pl);
	return err;
}

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static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
{
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	char spad_pl[MLXSW_REG_SPAD_LEN] = {0};
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	int err;

	err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
	if (err)
		return err;
	mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
	return 0;
}

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int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
				   bool is_up)
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{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char paos_pl[MLXSW_REG_PAOS_LEN];

	mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
			    is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
			    MLXSW_PORT_ADMIN_STATUS_DOWN);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
}

static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
				      unsigned char *addr)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char ppad_pl[MLXSW_REG_PPAD_LEN];

	mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
	mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
}

static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	unsigned char *addr = mlxsw_sp_port->dev->dev_addr;

	ether_addr_copy(addr, mlxsw_sp->base_mac);
	addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
	return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
}

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static int mlxsw_sp_port_max_mtu_get(struct mlxsw_sp_port *mlxsw_sp_port, int *p_max_mtu)
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{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char pmtu_pl[MLXSW_REG_PMTU_LEN];
	int err;

	mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
	err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
	if (err)
		return err;

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	*p_max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
	return 0;
}

static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char pmtu_pl[MLXSW_REG_PMTU_LEN];

	mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
	if (mtu > mlxsw_sp_port->max_mtu)
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		return -EINVAL;

	mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
}

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static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
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	char pspa_pl[MLXSW_REG_PSPA_LEN];
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	mlxsw_reg_pspa_pack(pspa_pl, swid, mlxsw_sp_port->local_port);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
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}

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int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port, bool enable)
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{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char svpe_pl[MLXSW_REG_SVPE_LEN];

	mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
}

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int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid,
				   bool learn_enable)
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{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char *spvmlr_pl;
	int err;

	spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
	if (!spvmlr_pl)
		return -ENOMEM;
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	mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid, vid,
			      learn_enable);
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	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
	kfree(spvmlr_pl);
	return err;
}

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int mlxsw_sp_ethtype_to_sver_type(u16 ethtype, u8 *p_sver_type)
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{
	switch (ethtype) {
	case ETH_P_8021Q:
		*p_sver_type = 0;
		break;
	case ETH_P_8021AD:
		*p_sver_type = 1;
		break;
	default:
		return -EINVAL;
	}

	return 0;
}

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static int __mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port,
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				    u16 vid, u16 ethtype)
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{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char spvid_pl[MLXSW_REG_SPVID_LEN];
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	u8 sver_type;
	int err;

	err = mlxsw_sp_ethtype_to_sver_type(ethtype, &sver_type);
	if (err)
		return err;

	mlxsw_reg_spvid_pack(spvid_pl, mlxsw_sp_port->local_port, vid,
			     sver_type);
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	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl);
}

static int mlxsw_sp_port_allow_untagged_set(struct mlxsw_sp_port *mlxsw_sp_port,
					    bool allow)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char spaft_pl[MLXSW_REG_SPAFT_LEN];

	mlxsw_reg_spaft_pack(spaft_pl, mlxsw_sp_port->local_port, allow);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spaft), spaft_pl);
}

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int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid,
			   u16 ethtype)
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{
	int err;

	if (!vid) {
		err = mlxsw_sp_port_allow_untagged_set(mlxsw_sp_port, false);
		if (err)
			return err;
	} else {
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		err = __mlxsw_sp_port_pvid_set(mlxsw_sp_port, vid, ethtype);
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		if (err)
			return err;
		err = mlxsw_sp_port_allow_untagged_set(mlxsw_sp_port, true);
		if (err)
			goto err_port_allow_untagged_set;
	}

	mlxsw_sp_port->pvid = vid;
	return 0;

err_port_allow_untagged_set:
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	__mlxsw_sp_port_pvid_set(mlxsw_sp_port, mlxsw_sp_port->pvid, ethtype);
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	return err;
}

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static int
mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char sspr_pl[MLXSW_REG_SSPR_LEN];

	mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
}

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static int
mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp, u8 local_port,
			      struct mlxsw_sp_port_mapping *port_mapping)
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{
	char pmlp_pl[MLXSW_REG_PMLP_LEN];
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	bool separate_rxtx;
	u8 module;
	u8 width;
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	int err;
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	int i;
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	mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
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	err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
	if (err)
		return err;
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	module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
	width = mlxsw_reg_pmlp_width_get(pmlp_pl);
	separate_rxtx = mlxsw_reg_pmlp_rxtx_get(pmlp_pl);

	if (width && !is_power_of_2(width)) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unsupported module config: width value is not power of 2\n",
			local_port);
		return -EINVAL;
	}

	for (i = 0; i < width; i++) {
		if (mlxsw_reg_pmlp_module_get(pmlp_pl, i) != module) {
			dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unsupported module config: contains multiple modules\n",
				local_port);
			return -EINVAL;
		}
		if (separate_rxtx &&
		    mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, i) !=
		    mlxsw_reg_pmlp_rx_lane_get(pmlp_pl, i)) {
			dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unsupported module config: TX and RX lane numbers are different\n",
				local_port);
			return -EINVAL;
		}
		if (mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, i) != i) {
			dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unsupported module config: TX and RX lane numbers are not sequential\n",
				local_port);
			return -EINVAL;
		}
	}

	port_mapping->module = module;
	port_mapping->width = width;
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	port_mapping->lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
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	return 0;
}

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static int mlxsw_sp_port_module_map(struct mlxsw_sp_port *mlxsw_sp_port)
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{
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	struct mlxsw_sp_port_mapping *port_mapping = &mlxsw_sp_port->mapping;
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	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
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	char pmlp_pl[MLXSW_REG_PMLP_LEN];
	int i;

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	mlxsw_reg_pmlp_pack(pmlp_pl, mlxsw_sp_port->local_port);
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	mlxsw_reg_pmlp_width_set(pmlp_pl, port_mapping->width);
	for (i = 0; i < port_mapping->width; i++) {
		mlxsw_reg_pmlp_module_set(pmlp_pl, i, port_mapping->module);
		mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, port_mapping->lane + i); /* Rx & Tx */
530 531 532 533 534
	}

	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
}

535
static int mlxsw_sp_port_module_unmap(struct mlxsw_sp_port *mlxsw_sp_port)
536
{
537
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
538 539
	char pmlp_pl[MLXSW_REG_PMLP_LEN];

540
	mlxsw_reg_pmlp_pack(pmlp_pl, mlxsw_sp_port->local_port);
541 542 543 544
	mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
}

545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577
static int mlxsw_sp_port_open(struct net_device *dev)
{
	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
	int err;

	err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
	if (err)
		return err;
	netif_start_queue(dev);
	return 0;
}

static int mlxsw_sp_port_stop(struct net_device *dev)
{
	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);

	netif_stop_queue(dev);
	return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
}

static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
				      struct net_device *dev)
{
	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
	const struct mlxsw_tx_info tx_info = {
		.local_port = mlxsw_sp_port->local_port,
		.is_emad = false,
	};
	u64 len;
	int err;

578 579 580 581 582 583
	if (skb_cow_head(skb, MLXSW_TXHDR_LEN)) {
		this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
		dev_kfree_skb_any(skb);
		return NETDEV_TX_OK;
	}

584 585
	memset(skb->cb, 0, sizeof(struct mlxsw_skb_cb));

586
	if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
587 588 589 590 591 592 593 594
		return NETDEV_TX_BUSY;

	if (eth_skb_pad(skb)) {
		this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
		return NETDEV_TX_OK;
	}

	mlxsw_sp_txhdr_construct(skb, &tx_info);
595 596 597 598 599
	/* TX header is consumed by HW on the way so we shouldn't count its
	 * bytes as being sent.
	 */
	len = skb->len - MLXSW_TXHDR_LEN;

600 601 602
	/* Due to a race we might fail here because of a full queue. In that
	 * unlikely case we simply drop the packet.
	 */
603
	err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
604 605 606 607 608 609 610 611 612 613 614 615 616 617

	if (!err) {
		pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
		u64_stats_update_begin(&pcpu_stats->syncp);
		pcpu_stats->tx_packets++;
		pcpu_stats->tx_bytes += len;
		u64_stats_update_end(&pcpu_stats->syncp);
	} else {
		this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
		dev_kfree_skb_any(skb);
	}
	return NETDEV_TX_OK;
}

618 619 620 621
static void mlxsw_sp_set_rx_mode(struct net_device *dev)
{
}

622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640
static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
{
	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
	struct sockaddr *addr = p;
	int err;

	if (!is_valid_ether_addr(addr->sa_data))
		return -EADDRNOTAVAIL;

	err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
	if (err)
		return err;
	memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
	return 0;
}

static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
{
	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
641 642
	struct mlxsw_sp_hdroom orig_hdroom;
	struct mlxsw_sp_hdroom hdroom;
643 644
	int err;

645 646 647 648
	orig_hdroom = *mlxsw_sp_port->hdroom;

	hdroom = orig_hdroom;
	hdroom.mtu = mtu;
649 650 651 652 653
	mlxsw_sp_hdroom_bufs_reset_sizes(mlxsw_sp_port, &hdroom);

	err = mlxsw_sp_hdroom_configure(mlxsw_sp_port, &hdroom);
	if (err) {
		netdev_err(dev, "Failed to configure port's headroom\n");
654
		return err;
655
	}
656

657 658 659
	err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
	if (err)
		goto err_port_mtu_set;
660 661
	dev->mtu = mtu;
	return 0;
662 663

err_port_mtu_set:
664
	mlxsw_sp_hdroom_configure(mlxsw_sp_port, &orig_hdroom);
665
	return err;
666 667
}

668
static int
669 670
mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
			     struct rtnl_link_stats64 *stats)
671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696
{
	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
	struct mlxsw_sp_port_pcpu_stats *p;
	u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
	u32 tx_dropped = 0;
	unsigned int start;
	int i;

	for_each_possible_cpu(i) {
		p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
		do {
			start = u64_stats_fetch_begin_irq(&p->syncp);
			rx_packets	= p->rx_packets;
			rx_bytes	= p->rx_bytes;
			tx_packets	= p->tx_packets;
			tx_bytes	= p->tx_bytes;
		} while (u64_stats_fetch_retry_irq(&p->syncp, start));

		stats->rx_packets	+= rx_packets;
		stats->rx_bytes		+= rx_bytes;
		stats->tx_packets	+= tx_packets;
		stats->tx_bytes		+= tx_bytes;
		/* tx_dropped is u32, updated without syncp protection. */
		tx_dropped	+= p->tx_dropped;
	}
	stats->tx_dropped	= tx_dropped;
697 698 699
	return 0;
}

700
static bool mlxsw_sp_port_has_offload_stats(const struct net_device *dev, int attr_id)
701 702 703 704 705 706 707 708 709
{
	switch (attr_id) {
	case IFLA_OFFLOAD_XSTATS_CPU_HIT:
		return true;
	}

	return false;
}

710 711
static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
					   void *sp)
712 713 714 715 716 717 718 719 720
{
	switch (attr_id) {
	case IFLA_OFFLOAD_XSTATS_CPU_HIT:
		return mlxsw_sp_port_get_sw_stats64(dev, sp);
	}

	return -EINVAL;
}

721 722
int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
				int prio, char *ppcnt_pl)
723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769
{
	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;

	mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
	return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
}

static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
				      struct rtnl_link_stats64 *stats)
{
	char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
	int err;

	err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
					  0, ppcnt_pl);
	if (err)
		goto out;

	stats->tx_packets =
		mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
	stats->rx_packets =
		mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
	stats->tx_bytes =
		mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
	stats->rx_bytes =
		mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
	stats->multicast =
		mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);

	stats->rx_crc_errors =
		mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
	stats->rx_frame_errors =
		mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);

	stats->rx_length_errors = (
		mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
		mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
		mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));

	stats->rx_errors = (stats->rx_crc_errors +
		stats->rx_frame_errors + stats->rx_length_errors);

out:
	return err;
}

770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799
static void
mlxsw_sp_port_get_hw_xstats(struct net_device *dev,
			    struct mlxsw_sp_port_xstats *xstats)
{
	char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
	int err, i;

	err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_EXT_CNT, 0,
					  ppcnt_pl);
	if (!err)
		xstats->ecn = mlxsw_reg_ppcnt_ecn_marked_get(ppcnt_pl);

	for (i = 0; i < TC_MAX_QUEUE; i++) {
		err = mlxsw_sp_port_get_stats_raw(dev,
						  MLXSW_REG_PPCNT_TC_CONG_TC,
						  i, ppcnt_pl);
		if (!err)
			xstats->wred_drop[i] =
				mlxsw_reg_ppcnt_wred_discard_get(ppcnt_pl);

		err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_TC_CNT,
						  i, ppcnt_pl);
		if (err)
			continue;

		xstats->backlog[i] =
			mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
		xstats->tail_drop[i] =
			mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get(ppcnt_pl);
	}
800 801 802 803 804 805 806 807 808 809

	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
		err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_PRIO_CNT,
						  i, ppcnt_pl);
		if (err)
			continue;

		xstats->tx_packets[i] = mlxsw_reg_ppcnt_tx_frames_get(ppcnt_pl);
		xstats->tx_bytes[i] = mlxsw_reg_ppcnt_tx_octets_get(ppcnt_pl);
	}
810 811
}

812 813 814 815
static void update_stats_cache(struct work_struct *work)
{
	struct mlxsw_sp_port *mlxsw_sp_port =
		container_of(work, struct mlxsw_sp_port,
816
			     periodic_hw_stats.update_dw.work);
817 818

	if (!netif_carrier_ok(mlxsw_sp_port->dev))
819 820 821
		/* Note: mlxsw_sp_port_down_wipe_counters() clears the cache as
		 * necessary when port goes down.
		 */
822 823 824
		goto out;

	mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
825
				   &mlxsw_sp_port->periodic_hw_stats.stats);
826 827
	mlxsw_sp_port_get_hw_xstats(mlxsw_sp_port->dev,
				    &mlxsw_sp_port->periodic_hw_stats.xstats);
828 829

out:
830
	mlxsw_core_schedule_dw(&mlxsw_sp_port->periodic_hw_stats.update_dw,
831 832 833 834 835 836
			       MLXSW_HW_STATS_UPDATE_TIME);
}

/* Return the stats from a cache that is updated periodically,
 * as this function might get called in an atomic context.
 */
837
static void
838 839 840 841 842
mlxsw_sp_port_get_stats64(struct net_device *dev,
			  struct rtnl_link_stats64 *stats)
{
	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);

843
	memcpy(stats, &mlxsw_sp_port->periodic_hw_stats.stats, sizeof(*stats));
844 845
}

846 847 848
static int __mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port,
				    u16 vid_begin, u16 vid_end,
				    bool is_member, bool untagged)
849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char *spvm_pl;
	int err;

	spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
	if (!spvm_pl)
		return -ENOMEM;

	mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port,	vid_begin,
			    vid_end, is_member, untagged);
	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
	kfree(spvm_pl);
	return err;
}

865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884
int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
			   u16 vid_end, bool is_member, bool untagged)
{
	u16 vid, vid_e;
	int err;

	for (vid = vid_begin; vid <= vid_end;
	     vid += MLXSW_REG_SPVM_REC_MAX_COUNT) {
		vid_e = min((u16) (vid + MLXSW_REG_SPVM_REC_MAX_COUNT - 1),
			    vid_end);

		err = __mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid_e,
					       is_member, untagged);
		if (err)
			return err;
	}

	return 0;
}

885 886
static void mlxsw_sp_port_vlan_flush(struct mlxsw_sp_port *mlxsw_sp_port,
				     bool flush_default)
887
{
888
	struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan, *tmp;
889

890
	list_for_each_entry_safe(mlxsw_sp_port_vlan, tmp,
891 892 893 894
				 &mlxsw_sp_port->vlans_list, list) {
		if (!flush_default &&
		    mlxsw_sp_port_vlan->vid == MLXSW_SP_DEFAULT_VID)
			continue;
895
		mlxsw_sp_port_vlan_destroy(mlxsw_sp_port_vlan);
896
	}
897 898
}

899 900 901 902 903 904 905 906 907
static void
mlxsw_sp_port_vlan_cleanup(struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan)
{
	if (mlxsw_sp_port_vlan->bridge_port)
		mlxsw_sp_port_vlan_bridge_leave(mlxsw_sp_port_vlan);
	else if (mlxsw_sp_port_vlan->fid)
		mlxsw_sp_port_vlan_router_leave(mlxsw_sp_port_vlan);
}

908
struct mlxsw_sp_port_vlan *
909 910 911
mlxsw_sp_port_vlan_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
{
	struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan;
912
	bool untagged = vid == MLXSW_SP_DEFAULT_VID;
913 914
	int err;

915 916 917 918
	mlxsw_sp_port_vlan = mlxsw_sp_port_vlan_find_by_vid(mlxsw_sp_port, vid);
	if (mlxsw_sp_port_vlan)
		return ERR_PTR(-EEXIST);

919 920 921
	err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid, true, untagged);
	if (err)
		return ERR_PTR(err);
922 923

	mlxsw_sp_port_vlan = kzalloc(sizeof(*mlxsw_sp_port_vlan), GFP_KERNEL);
924 925 926 927
	if (!mlxsw_sp_port_vlan) {
		err = -ENOMEM;
		goto err_port_vlan_alloc;
	}
928 929 930 931 932 933

	mlxsw_sp_port_vlan->mlxsw_sp_port = mlxsw_sp_port;
	mlxsw_sp_port_vlan->vid = vid;
	list_add(&mlxsw_sp_port_vlan->list, &mlxsw_sp_port->vlans_list);

	return mlxsw_sp_port_vlan;
934 935 936 937

err_port_vlan_alloc:
	mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid, false, false);
	return ERR_PTR(err);
938 939
}

940
void mlxsw_sp_port_vlan_destroy(struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan)
941
{
942 943
	struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp_port_vlan->mlxsw_sp_port;
	u16 vid = mlxsw_sp_port_vlan->vid;
944

945
	mlxsw_sp_port_vlan_cleanup(mlxsw_sp_port_vlan);
946 947 948
	list_del(&mlxsw_sp_port_vlan->list);
	kfree(mlxsw_sp_port_vlan);
	mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid, false, false);
949 950
}

951 952
static int mlxsw_sp_port_add_vid(struct net_device *dev,
				 __be16 __always_unused proto, u16 vid)
953 954 955 956 957 958 959 960 961
{
	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);

	/* VLAN 0 is added to HW filter when device goes up, but it is
	 * reserved in our case, so simply return.
	 */
	if (!vid)
		return 0;

962
	return PTR_ERR_OR_ZERO(mlxsw_sp_port_vlan_create(mlxsw_sp_port, vid));
963 964
}

965 966
static int mlxsw_sp_port_kill_vid(struct net_device *dev,
				  __be16 __always_unused proto, u16 vid)
967 968
{
	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
969
	struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan;
970 971 972 973 974 975 976

	/* VLAN 0 is removed from HW filter when device goes down, but
	 * it is reserved in our case, so simply return.
	 */
	if (!vid)
		return 0;

977
	mlxsw_sp_port_vlan = mlxsw_sp_port_vlan_find_by_vid(mlxsw_sp_port, vid);
978
	if (!mlxsw_sp_port_vlan)
979
		return 0;
980
	mlxsw_sp_port_vlan_destroy(mlxsw_sp_port_vlan);
981

982 983 984
	return 0;
}

985 986 987 988 989 990 991 992
static int mlxsw_sp_setup_tc_block(struct mlxsw_sp_port *mlxsw_sp_port,
				   struct flow_block_offload *f)
{
	switch (f->binder_type) {
	case FLOW_BLOCK_BINDER_TYPE_CLSACT_INGRESS:
		return mlxsw_sp_setup_tc_block_clsact(mlxsw_sp_port, f, true);
	case FLOW_BLOCK_BINDER_TYPE_CLSACT_EGRESS:
		return mlxsw_sp_setup_tc_block_clsact(mlxsw_sp_port, f, false);
993 994
	case FLOW_BLOCK_BINDER_TYPE_RED_EARLY_DROP:
		return mlxsw_sp_setup_tc_block_qevent_early_drop(mlxsw_sp_port, f);
995 996 997 998 999
	default:
		return -EOPNOTSUPP;
	}
}

1000
static int mlxsw_sp_setup_tc(struct net_device *dev, enum tc_setup_type type,
1001
			     void *type_data)
1002 1003 1004
{
	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);

1005
	switch (type) {
1006 1007
	case TC_SETUP_BLOCK:
		return mlxsw_sp_setup_tc_block(mlxsw_sp_port, type_data);
1008 1009
	case TC_SETUP_QDISC_RED:
		return mlxsw_sp_setup_tc_red(mlxsw_sp_port, type_data);
1010 1011
	case TC_SETUP_QDISC_PRIO:
		return mlxsw_sp_setup_tc_prio(mlxsw_sp_port, type_data);
1012 1013
	case TC_SETUP_QDISC_ETS:
		return mlxsw_sp_setup_tc_ets(mlxsw_sp_port, type_data);
1014 1015
	case TC_SETUP_QDISC_TBF:
		return mlxsw_sp_setup_tc_tbf(mlxsw_sp_port, type_data);
1016 1017
	case TC_SETUP_QDISC_FIFO:
		return mlxsw_sp_setup_tc_fifo(mlxsw_sp_port, type_data);
1018 1019
	default:
		return -EOPNOTSUPP;
1020 1021 1022
	}
}

1023 1024 1025 1026
static int mlxsw_sp_feature_hw_tc(struct net_device *dev, bool enable)
{
	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);

1027
	if (!enable) {
1028
		if (mlxsw_sp_flow_block_rule_count(mlxsw_sp_port->ing_flow_block) ||
1029
		    mlxsw_sp_flow_block_rule_count(mlxsw_sp_port->eg_flow_block)) {
1030 1031 1032
			netdev_err(dev, "Active offloaded tc filters, can't turn hw_tc_offload off\n");
			return -EINVAL;
		}
1033 1034
		mlxsw_sp_flow_block_disable_inc(mlxsw_sp_port->ing_flow_block);
		mlxsw_sp_flow_block_disable_inc(mlxsw_sp_port->eg_flow_block);
1035
	} else {
1036 1037
		mlxsw_sp_flow_block_disable_dec(mlxsw_sp_port->ing_flow_block);
		mlxsw_sp_flow_block_disable_dec(mlxsw_sp_port->eg_flow_block);
1038 1039 1040 1041
	}
	return 0;
}

1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060
static int mlxsw_sp_feature_loopback(struct net_device *dev, bool enable)
{
	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
	char pplr_pl[MLXSW_REG_PPLR_LEN];
	int err;

	if (netif_running(dev))
		mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);

	mlxsw_reg_pplr_pack(pplr_pl, mlxsw_sp_port->local_port, enable);
	err = mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pplr),
			      pplr_pl);

	if (netif_running(dev))
		mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);

	return err;
}

1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091
typedef int (*mlxsw_sp_feature_handler)(struct net_device *dev, bool enable);

static int mlxsw_sp_handle_feature(struct net_device *dev,
				   netdev_features_t wanted_features,
				   netdev_features_t feature,
				   mlxsw_sp_feature_handler feature_handler)
{
	netdev_features_t changes = wanted_features ^ dev->features;
	bool enable = !!(wanted_features & feature);
	int err;

	if (!(changes & feature))
		return 0;

	err = feature_handler(dev, enable);
	if (err) {
		netdev_err(dev, "%s feature %pNF failed, err %d\n",
			   enable ? "Enable" : "Disable", &feature, err);
		return err;
	}

	if (enable)
		dev->features |= feature;
	else
		dev->features &= ~feature;

	return 0;
}
static int mlxsw_sp_set_features(struct net_device *dev,
				 netdev_features_t features)
{
1092 1093 1094 1095
	netdev_features_t oper_features = dev->features;
	int err = 0;

	err |= mlxsw_sp_handle_feature(dev, features, NETIF_F_HW_TC,
1096
				       mlxsw_sp_feature_hw_tc);
1097 1098 1099 1100 1101 1102 1103 1104 1105
	err |= mlxsw_sp_handle_feature(dev, features, NETIF_F_LOOPBACK,
				       mlxsw_sp_feature_loopback);

	if (err) {
		dev->features = oper_features;
		return -EINVAL;
	}

	return 0;
1106 1107
}

1108 1109 1110 1111 1112 1113 1114 1115 1116 1117
static struct devlink_port *
mlxsw_sp_port_get_devlink_port(struct net_device *dev)
{
	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;

	return mlxsw_core_port_devlink_port_get(mlxsw_sp->core,
						mlxsw_sp_port->local_port);
}

1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176
static int mlxsw_sp_port_hwtstamp_set(struct mlxsw_sp_port *mlxsw_sp_port,
				      struct ifreq *ifr)
{
	struct hwtstamp_config config;
	int err;

	if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
		return -EFAULT;

	err = mlxsw_sp_port->mlxsw_sp->ptp_ops->hwtstamp_set(mlxsw_sp_port,
							     &config);
	if (err)
		return err;

	if (copy_to_user(ifr->ifr_data, &config, sizeof(config)))
		return -EFAULT;

	return 0;
}

static int mlxsw_sp_port_hwtstamp_get(struct mlxsw_sp_port *mlxsw_sp_port,
				      struct ifreq *ifr)
{
	struct hwtstamp_config config;
	int err;

	err = mlxsw_sp_port->mlxsw_sp->ptp_ops->hwtstamp_get(mlxsw_sp_port,
							     &config);
	if (err)
		return err;

	if (copy_to_user(ifr->ifr_data, &config, sizeof(config)))
		return -EFAULT;

	return 0;
}

static inline void mlxsw_sp_port_ptp_clear(struct mlxsw_sp_port *mlxsw_sp_port)
{
	struct hwtstamp_config config = {0};

	mlxsw_sp_port->mlxsw_sp->ptp_ops->hwtstamp_set(mlxsw_sp_port, &config);
}

static int
mlxsw_sp_port_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
{
	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);

	switch (cmd) {
	case SIOCSHWTSTAMP:
		return mlxsw_sp_port_hwtstamp_set(mlxsw_sp_port, ifr);
	case SIOCGHWTSTAMP:
		return mlxsw_sp_port_hwtstamp_get(mlxsw_sp_port, ifr);
	default:
		return -EOPNOTSUPP;
	}
}

1177 1178 1179 1180
static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
	.ndo_open		= mlxsw_sp_port_open,
	.ndo_stop		= mlxsw_sp_port_stop,
	.ndo_start_xmit		= mlxsw_sp_port_xmit,
1181
	.ndo_setup_tc           = mlxsw_sp_setup_tc,
1182
	.ndo_set_rx_mode	= mlxsw_sp_set_rx_mode,
1183 1184 1185
	.ndo_set_mac_address	= mlxsw_sp_port_set_mac_address,
	.ndo_change_mtu		= mlxsw_sp_port_change_mtu,
	.ndo_get_stats64	= mlxsw_sp_port_get_stats64,
1186 1187
	.ndo_has_offload_stats	= mlxsw_sp_port_has_offload_stats,
	.ndo_get_offload_stats	= mlxsw_sp_port_get_offload_stats,
1188 1189
	.ndo_vlan_rx_add_vid	= mlxsw_sp_port_add_vid,
	.ndo_vlan_rx_kill_vid	= mlxsw_sp_port_kill_vid,
1190
	.ndo_set_features	= mlxsw_sp_set_features,
1191
	.ndo_get_devlink_port	= mlxsw_sp_port_get_devlink_port,
1192
	.ndo_do_ioctl		= mlxsw_sp_port_ioctl,
1193 1194
};

1195
static int
1196
mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port)
1197 1198
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1199
	u32 eth_proto_cap, eth_proto_admin, eth_proto_oper;
1200
	const struct mlxsw_sp_port_type_speed_ops *ops;
1201
	char ptys_pl[MLXSW_REG_PTYS_LEN];
1202
	u32 eth_proto_cap_masked;
1203 1204 1205 1206
	int err;

	ops = mlxsw_sp->port_type_speed_ops;

1207 1208 1209
	/* Set advertised speeds to speeds supported by both the driver
	 * and the device.
	 */
1210 1211 1212
	ops->reg_ptys_eth_pack(mlxsw_sp, ptys_pl, mlxsw_sp_port->local_port,
			       0, false);
	err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1213 1214
	if (err)
		return err;
1215

1216 1217
	ops->reg_ptys_eth_unpack(mlxsw_sp, ptys_pl, &eth_proto_cap,
				 &eth_proto_admin, &eth_proto_oper);
1218
	eth_proto_cap_masked = ops->ptys_proto_cap_masked_get(eth_proto_cap);
1219
	ops->reg_ptys_eth_pack(mlxsw_sp, ptys_pl, mlxsw_sp_port->local_port,
1220 1221
			       eth_proto_cap_masked,
			       mlxsw_sp_port->link.autoneg);
1222 1223 1224
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
}

1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245
int mlxsw_sp_port_speed_get(struct mlxsw_sp_port *mlxsw_sp_port, u32 *speed)
{
	const struct mlxsw_sp_port_type_speed_ops *port_type_speed_ops;
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char ptys_pl[MLXSW_REG_PTYS_LEN];
	u32 eth_proto_oper;
	int err;

	port_type_speed_ops = mlxsw_sp->port_type_speed_ops;
	port_type_speed_ops->reg_ptys_eth_pack(mlxsw_sp, ptys_pl,
					       mlxsw_sp_port->local_port, 0,
					       false);
	err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
	if (err)
		return err;
	port_type_speed_ops->reg_ptys_eth_unpack(mlxsw_sp, ptys_pl, NULL, NULL,
						 &eth_proto_oper);
	*speed = port_type_speed_ops->from_ptys_speed(mlxsw_sp, eth_proto_oper);
	return 0;
}

1246 1247 1248
int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
			  enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
			  bool dwrr, u8 dwrr_weight)
1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char qeec_pl[MLXSW_REG_QEEC_LEN];

	mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
			    next_index);
	mlxsw_reg_qeec_de_set(qeec_pl, true);
	mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
	mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
}

1261 1262
int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
				  enum mlxsw_reg_qeec_hr hr, u8 index,
1263
				  u8 next_index, u32 maxrate, u8 burst_size)
1264 1265 1266 1267 1268 1269 1270 1271
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char qeec_pl[MLXSW_REG_QEEC_LEN];

	mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
			    next_index);
	mlxsw_reg_qeec_mase_set(qeec_pl, true);
	mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
1272
	mlxsw_reg_qeec_max_shaper_bs_set(qeec_pl, burst_size);
1273 1274 1275
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
}

1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290
static int mlxsw_sp_port_min_bw_set(struct mlxsw_sp_port *mlxsw_sp_port,
				    enum mlxsw_reg_qeec_hr hr, u8 index,
				    u8 next_index, u32 minrate)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char qeec_pl[MLXSW_REG_QEEC_LEN];

	mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
			    next_index);
	mlxsw_reg_qeec_mise_set(qeec_pl, true);
	mlxsw_reg_qeec_min_shaper_rate_set(qeec_pl, minrate);

	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
}

1291 1292
int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
			      u8 switch_prio, u8 tclass)
1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char qtct_pl[MLXSW_REG_QTCT_LEN];

	mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
			    tclass);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
}

static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
{
	int err, i;

	/* Setup the elements hierarcy, so that each TC is linked to
	 * one subgroup, which are all member in the same group.
	 */
	err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
1310
				    MLXSW_REG_QEEC_HR_GROUP, 0, 0, false, 0);
1311 1312 1313 1314
	if (err)
		return err;
	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
		err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
1315
					    MLXSW_REG_QEEC_HR_SUBGROUP, i,
1316 1317 1318 1319 1320 1321
					    0, false, 0);
		if (err)
			return err;
	}
	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
		err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
1322
					    MLXSW_REG_QEEC_HR_TC, i, i,
1323 1324 1325
					    false, 0);
		if (err)
			return err;
1326 1327

		err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
1328
					    MLXSW_REG_QEEC_HR_TC,
1329
					    i + 8, i,
1330
					    true, 100);
1331 1332
		if (err)
			return err;
1333 1334
	}

1335 1336 1337
	/* Make sure the max shaper is disabled in all hierarchies that support
	 * it. Note that this disables ptps (PTP shaper), but that is intended
	 * for the initial configuration.
1338 1339
	 */
	err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
1340
					    MLXSW_REG_QEEC_HR_PORT, 0, 0,
1341
					    MLXSW_REG_QEEC_MAS_DIS, 0);
1342 1343 1344 1345
	if (err)
		return err;
	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
		err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
1346
						    MLXSW_REG_QEEC_HR_SUBGROUP,
1347
						    i, 0,
1348
						    MLXSW_REG_QEEC_MAS_DIS, 0);
1349 1350 1351 1352 1353
		if (err)
			return err;
	}
	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
		err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
1354
						    MLXSW_REG_QEEC_HR_TC,
1355
						    i, i,
1356
						    MLXSW_REG_QEEC_MAS_DIS, 0);
1357 1358
		if (err)
			return err;
1359 1360

		err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
1361
						    MLXSW_REG_QEEC_HR_TC,
1362
						    i + 8, i,
1363
						    MLXSW_REG_QEEC_MAS_DIS, 0);
1364 1365
		if (err)
			return err;
1366 1367
	}

1368 1369 1370
	/* Configure the min shaper for multicast TCs. */
	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
		err = mlxsw_sp_port_min_bw_set(mlxsw_sp_port,
1371
					       MLXSW_REG_QEEC_HR_TC,
1372 1373 1374 1375 1376 1377
					       i + 8, i,
					       MLXSW_REG_QEEC_MIS_MIN);
		if (err)
			return err;
	}

1378 1379 1380 1381 1382 1383 1384 1385 1386 1387
	/* Map all priorities to traffic class 0. */
	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
		err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
		if (err)
			return err;
	}

	return 0;
}

1388 1389 1390 1391 1392 1393 1394 1395 1396 1397
static int mlxsw_sp_port_tc_mc_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
					bool enable)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char qtctm_pl[MLXSW_REG_QTCTM_LEN];

	mlxsw_reg_qtctm_pack(qtctm_pl, mlxsw_sp_port->local_port, enable);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtctm), qtctm_pl);
}

1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413
static int mlxsw_sp_port_overheat_init_val_set(struct mlxsw_sp_port *mlxsw_sp_port)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	u8 module = mlxsw_sp_port->mapping.module;
	u64 overheat_counter;
	int err;

	err = mlxsw_env_module_overheat_counter_get(mlxsw_sp->core, module,
						    &overheat_counter);
	if (err)
		return err;

	mlxsw_sp_port->module_overheat_initial_val = overheat_counter;
	return 0;
}

1414
int
1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426
mlxsw_sp_port_vlan_classification_set(struct mlxsw_sp_port *mlxsw_sp_port,
				      bool is_8021ad_tagged,
				      bool is_8021q_tagged)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char spvc_pl[MLXSW_REG_SPVC_LEN];

	mlxsw_reg_spvc_pack(spvc_pl, mlxsw_sp_port->local_port,
			    is_8021ad_tagged, is_8021q_tagged);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvc), spvc_pl);
}

1427
static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
1428
				u8 split_base_local_port,
1429
				struct mlxsw_sp_port_mapping *port_mapping)
1430
{
1431
	struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan;
1432
	bool split = !!split_base_local_port;
1433
	struct mlxsw_sp_port *mlxsw_sp_port;
1434
	u32 lanes = port_mapping->width;
1435
	struct net_device *dev;
1436
	bool splittable;
1437 1438
	int err;

1439
	splittable = lanes > 1 && !split;
1440
	err = mlxsw_core_port_init(mlxsw_sp->core, local_port,
1441
				   port_mapping->module + 1, split,
1442
				   port_mapping->lane / lanes,
1443
				   splittable, lanes,
1444 1445
				   mlxsw_sp->base_mac,
				   sizeof(mlxsw_sp->base_mac));
1446 1447 1448 1449 1450 1451
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
			local_port);
		return err;
	}

1452
	dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
1453 1454 1455 1456
	if (!dev) {
		err = -ENOMEM;
		goto err_alloc_etherdev;
	}
1457
	SET_NETDEV_DEV(dev, mlxsw_sp->bus_info->dev);
1458
	dev_net_set(dev, mlxsw_sp_net(mlxsw_sp));
1459 1460 1461 1462
	mlxsw_sp_port = netdev_priv(dev);
	mlxsw_sp_port->dev = dev;
	mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
	mlxsw_sp_port->local_port = local_port;
1463
	mlxsw_sp_port->pvid = MLXSW_SP_DEFAULT_VID;
1464
	mlxsw_sp_port->split = split;
1465
	mlxsw_sp_port->split_base_local_port = split_base_local_port;
1466
	mlxsw_sp_port->mapping = *port_mapping;
1467
	mlxsw_sp_port->link.autoneg = 1;
1468
	INIT_LIST_HEAD(&mlxsw_sp_port->vlans_list);
1469 1470 1471 1472 1473 1474 1475 1476

	mlxsw_sp_port->pcpu_stats =
		netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
	if (!mlxsw_sp_port->pcpu_stats) {
		err = -ENOMEM;
		goto err_alloc_stats;
	}

1477
	INIT_DELAYED_WORK(&mlxsw_sp_port->periodic_hw_stats.update_dw,
1478 1479
			  &update_stats_cache);

1480 1481 1482
	dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
	dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;

1483
	err = mlxsw_sp_port_module_map(mlxsw_sp_port);
1484 1485 1486 1487 1488 1489
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to map module\n",
			mlxsw_sp_port->local_port);
		goto err_port_module_map;
	}

1490 1491 1492 1493 1494 1495 1496
	err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
			mlxsw_sp_port->local_port);
		goto err_port_swid_set;
	}

1497 1498 1499 1500 1501 1502 1503 1504 1505 1506
	err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
			mlxsw_sp_port->local_port);
		goto err_dev_addr_init;
	}

	netif_carrier_off(dev);

	dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
1507
			 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
1508
	dev->hw_features |= NETIF_F_HW_TC | NETIF_F_LOOPBACK;
1509

1510 1511 1512
	dev->min_mtu = 0;
	dev->max_mtu = ETH_MAX_MTU;

1513 1514 1515
	/* Each packet needs to have a Tx header (metadata) on top all other
	 * headers.
	 */
1516
	dev->needed_headroom = MLXSW_TXHDR_LEN;
1517 1518 1519 1520 1521 1522 1523 1524

	err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
			mlxsw_sp_port->local_port);
		goto err_port_system_port_mapping_set;
	}

1525
	err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port);
1526 1527 1528 1529 1530 1531
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
			mlxsw_sp_port->local_port);
		goto err_port_speed_by_width_set;
	}

1532 1533 1534 1535 1536 1537 1538 1539
	err = mlxsw_sp->port_type_speed_ops->ptys_max_speed(mlxsw_sp_port,
							    &mlxsw_sp_port->max_speed);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to get maximum speed\n",
			mlxsw_sp_port->local_port);
		goto err_max_speed_get;
	}

1540 1541 1542 1543 1544 1545 1546
	err = mlxsw_sp_port_max_mtu_get(mlxsw_sp_port, &mlxsw_sp_port->max_mtu);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to get maximum MTU\n",
			mlxsw_sp_port->local_port);
		goto err_port_max_mtu_get;
	}

1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564
	err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
			mlxsw_sp_port->local_port);
		goto err_port_mtu_set;
	}

	err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
	if (err)
		goto err_port_admin_status_set;

	err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
			mlxsw_sp_port->local_port);
		goto err_port_buffers_init;
	}

1565 1566 1567 1568 1569 1570 1571
	err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
			mlxsw_sp_port->local_port);
		goto err_port_ets_init;
	}

1572 1573 1574 1575 1576 1577 1578
	err = mlxsw_sp_port_tc_mc_mode_set(mlxsw_sp_port, true);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize TC MC mode\n",
			mlxsw_sp_port->local_port);
		goto err_port_tc_mc_mode;
	}

1579 1580 1581 1582 1583 1584 1585 1586
	/* ETS and buffers must be initialized before DCB. */
	err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
			mlxsw_sp_port->local_port);
		goto err_port_dcb_init;
	}

1587
	err = mlxsw_sp_port_fids_init(mlxsw_sp_port);
1588
	if (err) {
1589
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize FIDs\n",
1590
			mlxsw_sp_port->local_port);
1591
		goto err_port_fids_init;
1592 1593
	}

1594 1595 1596 1597 1598 1599 1600
	err = mlxsw_sp_tc_qdisc_init(mlxsw_sp_port);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize TC qdiscs\n",
			mlxsw_sp_port->local_port);
		goto err_port_qdiscs_init;
	}

1601 1602 1603 1604 1605 1606 1607 1608
	err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, 0, VLAN_N_VID - 1, false,
				     false);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to clear VLAN filter\n",
			mlxsw_sp_port->local_port);
		goto err_port_vlan_clear;
	}

1609 1610 1611 1612 1613 1614 1615
	err = mlxsw_sp_port_nve_init(mlxsw_sp_port);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize NVE\n",
			mlxsw_sp_port->local_port);
		goto err_port_nve_init;
	}

1616 1617
	err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, MLXSW_SP_DEFAULT_VID,
				     ETH_P_8021Q);
1618 1619 1620 1621 1622 1623
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set PVID\n",
			mlxsw_sp_port->local_port);
		goto err_port_pvid_set;
	}

1624 1625
	mlxsw_sp_port_vlan = mlxsw_sp_port_vlan_create(mlxsw_sp_port,
						       MLXSW_SP_DEFAULT_VID);
1626 1627
	if (IS_ERR(mlxsw_sp_port_vlan)) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create VID 1\n",
1628
			mlxsw_sp_port->local_port);
1629
		err = PTR_ERR(mlxsw_sp_port_vlan);
1630
		goto err_port_vlan_create;
1631
	}
1632
	mlxsw_sp_port->default_vlan = mlxsw_sp_port_vlan;
1633

1634 1635 1636 1637 1638 1639 1640 1641 1642 1643
	/* Set SPVC.et0=true and SPVC.et1=false to make the local port to treat
	 * only packets with 802.1q header as tagged packets.
	 */
	err = mlxsw_sp_port_vlan_classification_set(mlxsw_sp_port, false, true);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set default VLAN classification\n",
			local_port);
		goto err_port_vlan_classification_set;
	}

1644 1645 1646
	INIT_DELAYED_WORK(&mlxsw_sp_port->ptp.shaper_dw,
			  mlxsw_sp->ptp_ops->shaper_work);

1647
	mlxsw_sp->ports[local_port] = mlxsw_sp_port;
1648 1649 1650 1651 1652 1653 1654 1655

	err = mlxsw_sp_port_overheat_init_val_set(mlxsw_sp_port);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set overheat initial value\n",
			mlxsw_sp_port->local_port);
		goto err_port_overheat_init_val_set;
	}

1656 1657 1658 1659 1660 1661 1662
	err = register_netdev(dev);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
			mlxsw_sp_port->local_port);
		goto err_register_netdev;
	}

1663
	mlxsw_core_port_eth_set(mlxsw_sp->core, mlxsw_sp_port->local_port,
1664
				mlxsw_sp_port, dev);
1665
	mlxsw_core_schedule_dw(&mlxsw_sp_port->periodic_hw_stats.update_dw, 0);
1666 1667 1668
	return 0;

err_register_netdev:
1669
err_port_overheat_init_val_set:
1670 1671
	mlxsw_sp_port_vlan_classification_set(mlxsw_sp_port, true, true);
err_port_vlan_classification_set:
1672
	mlxsw_sp->ports[local_port] = NULL;
1673 1674
	mlxsw_sp_port_vlan_destroy(mlxsw_sp_port_vlan);
err_port_vlan_create:
1675
err_port_pvid_set:
1676 1677
	mlxsw_sp_port_nve_fini(mlxsw_sp_port);
err_port_nve_init:
1678
err_port_vlan_clear:
1679 1680
	mlxsw_sp_tc_qdisc_fini(mlxsw_sp_port);
err_port_qdiscs_init:
1681 1682
	mlxsw_sp_port_fids_fini(mlxsw_sp_port);
err_port_fids_init:
1683
	mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
1684
err_port_dcb_init:
1685 1686
	mlxsw_sp_port_tc_mc_mode_set(mlxsw_sp_port, false);
err_port_tc_mc_mode:
1687
err_port_ets_init:
1688
	mlxsw_sp_port_buffers_fini(mlxsw_sp_port);
1689 1690 1691
err_port_buffers_init:
err_port_admin_status_set:
err_port_mtu_set:
1692
err_port_max_mtu_get:
1693
err_max_speed_get:
1694
err_port_speed_by_width_set:
1695 1696
err_port_system_port_mapping_set:
err_dev_addr_init:
1697 1698
	mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
err_port_swid_set:
1699
	mlxsw_sp_port_module_unmap(mlxsw_sp_port);
1700
err_port_module_map:
1701 1702 1703
	free_percpu(mlxsw_sp_port->pcpu_stats);
err_alloc_stats:
	free_netdev(dev);
1704
err_alloc_etherdev:
1705 1706 1707 1708
	mlxsw_core_port_fini(mlxsw_sp->core, local_port);
	return err;
}

1709
static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
1710 1711 1712
{
	struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];

1713
	cancel_delayed_work_sync(&mlxsw_sp_port->periodic_hw_stats.update_dw);
1714
	cancel_delayed_work_sync(&mlxsw_sp_port->ptp.shaper_dw);
1715
	mlxsw_sp_port_ptp_clear(mlxsw_sp_port);
1716
	mlxsw_core_port_clear(mlxsw_sp->core, local_port, mlxsw_sp);
1717
	unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
1718
	mlxsw_sp_port_vlan_classification_set(mlxsw_sp_port, true, true);
1719
	mlxsw_sp->ports[local_port] = NULL;
1720
	mlxsw_sp_port_vlan_flush(mlxsw_sp_port, true);
1721
	mlxsw_sp_port_nve_fini(mlxsw_sp_port);
1722
	mlxsw_sp_tc_qdisc_fini(mlxsw_sp_port);
1723
	mlxsw_sp_port_fids_fini(mlxsw_sp_port);
1724
	mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
1725
	mlxsw_sp_port_tc_mc_mode_set(mlxsw_sp_port, false);
1726
	mlxsw_sp_port_buffers_fini(mlxsw_sp_port);
1727
	mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
1728
	mlxsw_sp_port_module_unmap(mlxsw_sp_port);
1729
	free_percpu(mlxsw_sp_port->pcpu_stats);
1730
	WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vlans_list));
1731
	free_netdev(mlxsw_sp_port->dev);
1732 1733 1734
	mlxsw_core_port_fini(mlxsw_sp->core, local_port);
}

1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773
static int mlxsw_sp_cpu_port_create(struct mlxsw_sp *mlxsw_sp)
{
	struct mlxsw_sp_port *mlxsw_sp_port;
	int err;

	mlxsw_sp_port = kzalloc(sizeof(*mlxsw_sp_port), GFP_KERNEL);
	if (!mlxsw_sp_port)
		return -ENOMEM;

	mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
	mlxsw_sp_port->local_port = MLXSW_PORT_CPU_PORT;

	err = mlxsw_core_cpu_port_init(mlxsw_sp->core,
				       mlxsw_sp_port,
				       mlxsw_sp->base_mac,
				       sizeof(mlxsw_sp->base_mac));
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize core CPU port\n");
		goto err_core_cpu_port_init;
	}

	mlxsw_sp->ports[MLXSW_PORT_CPU_PORT] = mlxsw_sp_port;
	return 0;

err_core_cpu_port_init:
	kfree(mlxsw_sp_port);
	return err;
}

static void mlxsw_sp_cpu_port_remove(struct mlxsw_sp *mlxsw_sp)
{
	struct mlxsw_sp_port *mlxsw_sp_port =
				mlxsw_sp->ports[MLXSW_PORT_CPU_PORT];

	mlxsw_core_cpu_port_fini(mlxsw_sp->core);
	mlxsw_sp->ports[MLXSW_PORT_CPU_PORT] = NULL;
	kfree(mlxsw_sp_port);
}

1774 1775 1776 1777 1778
static bool mlxsw_sp_port_created(struct mlxsw_sp *mlxsw_sp, u8 local_port)
{
	return mlxsw_sp->ports[local_port] != NULL;
}

1779 1780 1781 1782
static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
{
	int i;

1783
	for (i = 1; i < mlxsw_core_max_ports(mlxsw_sp->core); i++)
1784 1785
		if (mlxsw_sp_port_created(mlxsw_sp, i))
			mlxsw_sp_port_remove(mlxsw_sp, i);
1786
	mlxsw_sp_cpu_port_remove(mlxsw_sp);
1787
	kfree(mlxsw_sp->ports);
1788
	mlxsw_sp->ports = NULL;
1789 1790 1791 1792
}

static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
{
1793
	unsigned int max_ports = mlxsw_core_max_ports(mlxsw_sp->core);
1794
	struct mlxsw_sp_port_mapping *port_mapping;
1795 1796 1797 1798
	size_t alloc_size;
	int i;
	int err;

1799
	alloc_size = sizeof(struct mlxsw_sp_port *) * max_ports;
1800 1801 1802 1803
	mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
	if (!mlxsw_sp->ports)
		return -ENOMEM;

1804 1805 1806 1807
	err = mlxsw_sp_cpu_port_create(mlxsw_sp);
	if (err)
		goto err_cpu_port_create;

1808
	for (i = 1; i < max_ports; i++) {
1809 1810
		port_mapping = mlxsw_sp->port_mapping[i];
		if (!port_mapping)
1811
			continue;
1812
		err = mlxsw_sp_port_create(mlxsw_sp, i, 0, port_mapping);
1813 1814 1815 1816 1817 1818 1819
		if (err)
			goto err_port_create;
	}
	return 0;

err_port_create:
	for (i--; i >= 1; i--)
1820 1821
		if (mlxsw_sp_port_created(mlxsw_sp, i))
			mlxsw_sp_port_remove(mlxsw_sp, i);
1822 1823
	mlxsw_sp_cpu_port_remove(mlxsw_sp);
err_cpu_port_create:
1824
	kfree(mlxsw_sp->ports);
1825
	mlxsw_sp->ports = NULL;
1826 1827 1828
	return err;
}

1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842
static int mlxsw_sp_port_module_info_init(struct mlxsw_sp *mlxsw_sp)
{
	unsigned int max_ports = mlxsw_core_max_ports(mlxsw_sp->core);
	struct mlxsw_sp_port_mapping port_mapping;
	int i;
	int err;

	mlxsw_sp->port_mapping = kcalloc(max_ports,
					 sizeof(struct mlxsw_sp_port_mapping *),
					 GFP_KERNEL);
	if (!mlxsw_sp->port_mapping)
		return -ENOMEM;

	for (i = 1; i < max_ports; i++) {
1843 1844 1845
		if (mlxsw_core_port_is_xm(mlxsw_sp->core, i))
			continue;

1846 1847 1848 1849 1850 1851 1852 1853 1854
		err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &port_mapping);
		if (err)
			goto err_port_module_info_get;
		if (!port_mapping.width)
			continue;

		mlxsw_sp->port_mapping[i] = kmemdup(&port_mapping,
						    sizeof(port_mapping),
						    GFP_KERNEL);
1855 1856
		if (!mlxsw_sp->port_mapping[i]) {
			err = -ENOMEM;
1857
			goto err_port_module_info_dup;
1858
		}
1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878
	}
	return 0;

err_port_module_info_get:
err_port_module_info_dup:
	for (i--; i >= 1; i--)
		kfree(mlxsw_sp->port_mapping[i]);
	kfree(mlxsw_sp->port_mapping);
	return err;
}

static void mlxsw_sp_port_module_info_fini(struct mlxsw_sp *mlxsw_sp)
{
	int i;

	for (i = 1; i < mlxsw_core_max_ports(mlxsw_sp->core); i++)
		kfree(mlxsw_sp->port_mapping[i]);
	kfree(mlxsw_sp->port_mapping);
}

1879
static u8 mlxsw_sp_cluster_base_port_get(u8 local_port, unsigned int max_width)
1880
{
1881
	u8 offset = (local_port - 1) % max_width;
1882 1883 1884 1885

	return local_port - offset;
}

1886 1887 1888 1889
static int
mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
			   struct mlxsw_sp_port_mapping *port_mapping,
			   unsigned int count, u8 offset)
1890
{
1891
	struct mlxsw_sp_port_mapping split_port_mapping;
1892 1893
	int err, i;

1894 1895
	split_port_mapping = *port_mapping;
	split_port_mapping.width /= count;
1896
	for (i = 0; i < count; i++) {
1897
		err = mlxsw_sp_port_create(mlxsw_sp, base_port + i * offset,
1898
					   base_port, &split_port_mapping);
1899 1900
		if (err)
			goto err_port_create;
1901
		split_port_mapping.lane += split_port_mapping.width;
1902 1903 1904 1905 1906 1907
	}

	return 0;

err_port_create:
	for (i--; i >= 0; i--)
1908 1909
		if (mlxsw_sp_port_created(mlxsw_sp, base_port + i * offset))
			mlxsw_sp_port_remove(mlxsw_sp, base_port + i * offset);
1910 1911 1912 1913
	return err;
}

static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
1914 1915
					 u8 base_port,
					 unsigned int count, u8 offset)
1916
{
1917
	struct mlxsw_sp_port_mapping *port_mapping;
1918 1919
	int i;

1920 1921 1922
	/* Go over original unsplit ports in the gap and recreate them. */
	for (i = 0; i < count * offset; i++) {
		port_mapping = mlxsw_sp->port_mapping[base_port + i];
1923
		if (!port_mapping)
1924
			continue;
1925
		mlxsw_sp_port_create(mlxsw_sp, base_port + i, 0, port_mapping);
1926 1927 1928
	}
}

1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939
static int mlxsw_sp_local_ports_offset(struct mlxsw_core *mlxsw_core,
				       unsigned int count,
				       unsigned int max_width)
{
	enum mlxsw_res_id local_ports_in_x_res_id;
	int split_width = max_width / count;

	if (split_width == 1)
		local_ports_in_x_res_id = MLXSW_RES_ID_LOCAL_PORTS_IN_1X;
	else if (split_width == 2)
		local_ports_in_x_res_id = MLXSW_RES_ID_LOCAL_PORTS_IN_2X;
1940 1941
	else if (split_width == 4)
		local_ports_in_x_res_id = MLXSW_RES_ID_LOCAL_PORTS_IN_4X;
1942 1943 1944 1945 1946 1947 1948 1949
	else
		return -EINVAL;

	if (!mlxsw_core_res_valid(mlxsw_core, local_ports_in_x_res_id))
		return -EINVAL;
	return mlxsw_core_res_get(mlxsw_core, local_ports_in_x_res_id);
}

1950 1951 1952 1953 1954 1955 1956 1957
static struct mlxsw_sp_port *
mlxsw_sp_port_get_by_local_port(struct mlxsw_sp *mlxsw_sp, u8 local_port)
{
	if (mlxsw_sp->ports && mlxsw_sp->ports[local_port])
		return mlxsw_sp->ports[local_port];
	return NULL;
}

1958
static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
1959 1960
			       unsigned int count,
			       struct netlink_ext_ack *extack)
1961
{
1962
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
1963
	struct mlxsw_sp_port_mapping port_mapping;
1964
	struct mlxsw_sp_port *mlxsw_sp_port;
1965
	int max_width;
1966
	u8 base_port;
1967
	int offset;
1968 1969 1970
	int i;
	int err;

1971
	mlxsw_sp_port = mlxsw_sp_port_get_by_local_port(mlxsw_sp, local_port);
1972 1973 1974
	if (!mlxsw_sp_port) {
		dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
			local_port);
1975
		NL_SET_ERR_MSG_MOD(extack, "Port number does not exist");
1976 1977 1978
		return -EINVAL;
	}

1979 1980 1981 1982 1983 1984 1985
	max_width = mlxsw_core_module_max_width(mlxsw_core,
						mlxsw_sp_port->mapping.module);
	if (max_width < 0) {
		netdev_err(mlxsw_sp_port->dev, "Cannot get max width of port module\n");
		NL_SET_ERR_MSG_MOD(extack, "Cannot get max width of port module");
		return max_width;
	}
1986

1987 1988
	/* Split port with non-max cannot be split. */
	if (mlxsw_sp_port->mapping.width != max_width) {
1989 1990
		netdev_err(mlxsw_sp_port->dev, "Port cannot be split\n");
		NL_SET_ERR_MSG_MOD(extack, "Port cannot be split");
1991 1992 1993
		return -EINVAL;
	}

1994 1995 1996 1997 1998 1999 2000
	offset = mlxsw_sp_local_ports_offset(mlxsw_core, count, max_width);
	if (offset < 0) {
		netdev_err(mlxsw_sp_port->dev, "Cannot obtain local port offset\n");
		NL_SET_ERR_MSG_MOD(extack, "Cannot obtain local port offset");
		return -EINVAL;
	}

2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015
	/* Only in case max split is being done, the local port and
	 * base port may differ.
	 */
	base_port = count == max_width ?
		    mlxsw_sp_cluster_base_port_get(local_port, max_width) :
		    local_port;

	for (i = 0; i < count * offset; i++) {
		/* Expect base port to exist and also the one in the middle in
		 * case of maximal split count.
		 */
		if (i == 0 || (count == max_width && i == count / 2))
			continue;

		if (mlxsw_sp_port_created(mlxsw_sp, base_port + i)) {
2016
			netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2017
			NL_SET_ERR_MSG_MOD(extack, "Invalid split configuration");
2018 2019 2020 2021
			return -EINVAL;
		}
	}

2022 2023
	port_mapping = mlxsw_sp_port->mapping;

2024
	for (i = 0; i < count; i++)
2025 2026
		if (mlxsw_sp_port_created(mlxsw_sp, base_port + i * offset))
			mlxsw_sp_port_remove(mlxsw_sp, base_port + i * offset);
2027

2028 2029
	err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, &port_mapping,
					 count, offset);
2030 2031 2032
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
		goto err_port_split_create;
2033 2034 2035 2036
	}

	return 0;

2037
err_port_split_create:
2038
	mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count, offset);
2039 2040 2041
	return err;
}

2042 2043
static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port,
				 struct netlink_ext_ack *extack)
2044
{
2045
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2046 2047
	struct mlxsw_sp_port *mlxsw_sp_port;
	unsigned int count;
2048 2049
	int max_width;
	u8 base_port;
2050
	int offset;
2051 2052
	int i;

2053
	mlxsw_sp_port = mlxsw_sp_port_get_by_local_port(mlxsw_sp, local_port);
2054 2055 2056
	if (!mlxsw_sp_port) {
		dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
			local_port);
2057
		NL_SET_ERR_MSG_MOD(extack, "Port number does not exist");
2058 2059 2060 2061
		return -EINVAL;
	}

	if (!mlxsw_sp_port->split) {
2062 2063
		netdev_err(mlxsw_sp_port->dev, "Port was not split\n");
		NL_SET_ERR_MSG_MOD(extack, "Port was not split");
2064 2065 2066
		return -EINVAL;
	}

2067 2068 2069 2070 2071 2072 2073 2074 2075
	max_width = mlxsw_core_module_max_width(mlxsw_core,
						mlxsw_sp_port->mapping.module);
	if (max_width < 0) {
		netdev_err(mlxsw_sp_port->dev, "Cannot get max width of port module\n");
		NL_SET_ERR_MSG_MOD(extack, "Cannot get max width of port module");
		return max_width;
	}

	count = max_width / mlxsw_sp_port->mapping.width;
2076

2077 2078 2079 2080 2081 2082
	offset = mlxsw_sp_local_ports_offset(mlxsw_core, count, max_width);
	if (WARN_ON(offset < 0)) {
		netdev_err(mlxsw_sp_port->dev, "Cannot obtain local port offset\n");
		NL_SET_ERR_MSG_MOD(extack, "Cannot obtain local port offset");
		return -EINVAL;
	}
2083

2084
	base_port = mlxsw_sp_port->split_base_local_port;
2085 2086

	for (i = 0; i < count; i++)
2087 2088
		if (mlxsw_sp_port_created(mlxsw_sp, base_port + i * offset))
			mlxsw_sp_port_remove(mlxsw_sp, base_port + i * offset);
2089

2090
	mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count, offset);
2091 2092 2093 2094

	return 0;
}

2095 2096 2097 2098 2099 2100 2101 2102 2103
static void
mlxsw_sp_port_down_wipe_counters(struct mlxsw_sp_port *mlxsw_sp_port)
{
	int i;

	for (i = 0; i < TC_MAX_QUEUE; i++)
		mlxsw_sp_port->periodic_hw_stats.xstats.backlog[i] = 0;
}

2104 2105 2106 2107 2108 2109 2110 2111 2112 2113
static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
				     char *pude_pl, void *priv)
{
	struct mlxsw_sp *mlxsw_sp = priv;
	struct mlxsw_sp_port *mlxsw_sp_port;
	enum mlxsw_reg_pude_oper_status status;
	u8 local_port;

	local_port = mlxsw_reg_pude_local_port_get(pude_pl);
	mlxsw_sp_port = mlxsw_sp->ports[local_port];
2114
	if (!mlxsw_sp_port)
2115 2116 2117 2118 2119 2120
		return;

	status = mlxsw_reg_pude_oper_status_get(pude_pl);
	if (status == MLXSW_PORT_OPER_STATUS_UP) {
		netdev_info(mlxsw_sp_port->dev, "link up\n");
		netif_carrier_on(mlxsw_sp_port->dev);
2121
		mlxsw_core_schedule_dw(&mlxsw_sp_port->ptp.shaper_dw, 0);
2122 2123 2124
	} else {
		netdev_info(mlxsw_sp_port->dev, "link down\n");
		netif_carrier_off(mlxsw_sp_port->dev);
2125
		mlxsw_sp_port_down_wipe_counters(mlxsw_sp_port);
2126 2127 2128
	}
}

2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165 2166 2167 2168
static void mlxsw_sp1_ptp_fifo_event_func(struct mlxsw_sp *mlxsw_sp,
					  char *mtpptr_pl, bool ingress)
{
	u8 local_port;
	u8 num_rec;
	int i;

	local_port = mlxsw_reg_mtpptr_local_port_get(mtpptr_pl);
	num_rec = mlxsw_reg_mtpptr_num_rec_get(mtpptr_pl);
	for (i = 0; i < num_rec; i++) {
		u8 domain_number;
		u8 message_type;
		u16 sequence_id;
		u64 timestamp;

		mlxsw_reg_mtpptr_unpack(mtpptr_pl, i, &message_type,
					&domain_number, &sequence_id,
					&timestamp);
		mlxsw_sp1_ptp_got_timestamp(mlxsw_sp, ingress, local_port,
					    message_type, domain_number,
					    sequence_id, timestamp);
	}
}

static void mlxsw_sp1_ptp_ing_fifo_event_func(const struct mlxsw_reg_info *reg,
					      char *mtpptr_pl, void *priv)
{
	struct mlxsw_sp *mlxsw_sp = priv;

	mlxsw_sp1_ptp_fifo_event_func(mlxsw_sp, mtpptr_pl, true);
}

static void mlxsw_sp1_ptp_egr_fifo_event_func(const struct mlxsw_reg_info *reg,
					      char *mtpptr_pl, void *priv)
{
	struct mlxsw_sp *mlxsw_sp = priv;

	mlxsw_sp1_ptp_fifo_event_func(mlxsw_sp, mtpptr_pl, false);
}

2169 2170
void mlxsw_sp_rx_listener_no_mark_func(struct sk_buff *skb,
				       u8 local_port, void *priv)
2171 2172 2173 2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193
{
	struct mlxsw_sp *mlxsw_sp = priv;
	struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
	struct mlxsw_sp_port_pcpu_stats *pcpu_stats;

	if (unlikely(!mlxsw_sp_port)) {
		dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
				     local_port);
		return;
	}

	skb->dev = mlxsw_sp_port->dev;

	pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
	u64_stats_update_begin(&pcpu_stats->syncp);
	pcpu_stats->rx_packets++;
	pcpu_stats->rx_bytes += skb->len;
	u64_stats_update_end(&pcpu_stats->syncp);

	skb->protocol = eth_type_trans(skb, skb->dev);
	netif_receive_skb(skb);
}

2194 2195 2196 2197
static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
					   void *priv)
{
	skb->offload_fwd_mark = 1;
2198
	return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);
2199 2200
}

2201
static void mlxsw_sp_rx_listener_l3_mark_func(struct sk_buff *skb,
2202 2203
					      u8 local_port, void *priv)
{
2204
	skb->offload_l3_fwd_mark = 1;
2205 2206 2207 2208
	skb->offload_fwd_mark = 1;
	return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);
}

2209 2210 2211 2212 2213 2214 2215 2216
void mlxsw_sp_ptp_receive(struct mlxsw_sp *mlxsw_sp, struct sk_buff *skb,
			  u8 local_port)
{
	mlxsw_sp->ptp_ops->receive(mlxsw_sp, skb, local_port);
}

void mlxsw_sp_sample_receive(struct mlxsw_sp *mlxsw_sp, struct sk_buff *skb,
			     u8 local_port)
2217 2218
{
	struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2219
	struct mlxsw_sp_port_sample *sample;
2220 2221 2222 2223 2224 2225 2226 2227 2228
	u32 size;

	if (unlikely(!mlxsw_sp_port)) {
		dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received for non-existent port\n",
				     local_port);
		goto out;
	}

	rcu_read_lock();
2229 2230
	sample = rcu_dereference(mlxsw_sp_port->sample);
	if (!sample)
2231
		goto out_unlock;
2232 2233 2234
	size = sample->truncate ? sample->trunc_size : skb->len;
	psample_sample_packet(sample->psample_group, skb, size,
			      mlxsw_sp_port->dev->ifindex, 0, sample->rate);
2235 2236 2237 2238 2239 2240
out_unlock:
	rcu_read_unlock();
out:
	consume_skb(skb);
}

2241
#define MLXSW_SP_RXL_NO_MARK(_trap_id, _action, _trap_group, _is_ctrl)	\
2242
	MLXSW_RXL(mlxsw_sp_rx_listener_no_mark_func, _trap_id, _action,	\
2243
		  _is_ctrl, SP_##_trap_group, DISCARD)
2244

2245
#define MLXSW_SP_RXL_MARK(_trap_id, _action, _trap_group, _is_ctrl)	\
2246
	MLXSW_RXL(mlxsw_sp_rx_listener_mark_func, _trap_id, _action,	\
2247 2248
		_is_ctrl, SP_##_trap_group, DISCARD)

2249 2250
#define MLXSW_SP_RXL_L3_MARK(_trap_id, _action, _trap_group, _is_ctrl)	\
	MLXSW_RXL(mlxsw_sp_rx_listener_l3_mark_func, _trap_id, _action,	\
2251 2252
		_is_ctrl, SP_##_trap_group, DISCARD)

2253 2254
#define MLXSW_SP_EVENTL(_func, _trap_id)		\
	MLXSW_EVENTL(_func, _trap_id, SP_EVENT)
2255

2256 2257
static const struct mlxsw_listener mlxsw_sp_listener[] = {
	/* Events */
2258
	MLXSW_SP_EVENTL(mlxsw_sp_pude_event_func, PUDE),
2259
	/* L2 traps */
2260
	MLXSW_SP_RXL_NO_MARK(FID_MISS, TRAP_TO_CPU, FID_MISS, false),
2261
	/* L3 traps */
2262 2263
	MLXSW_SP_RXL_MARK(IPV6_UNSPECIFIED_ADDRESS, TRAP_TO_CPU, ROUTER_EXP,
			  false),
2264
	MLXSW_SP_RXL_MARK(IPV6_LINK_LOCAL_SRC, TRAP_TO_CPU, ROUTER_EXP, false),
2265 2266
	MLXSW_SP_RXL_MARK(IPV6_MC_LINK_LOCAL_DEST, TRAP_TO_CPU, ROUTER_EXP,
			  false),
2267 2268
	MLXSW_SP_RXL_NO_MARK(DISCARD_ING_ROUTER_SIP_CLASS_E, FORWARD,
			     ROUTER_EXP, false),
2269 2270
	MLXSW_SP_RXL_NO_MARK(DISCARD_ING_ROUTER_MC_DMAC, FORWARD,
			     ROUTER_EXP, false),
2271 2272
	MLXSW_SP_RXL_NO_MARK(DISCARD_ING_ROUTER_SIP_DIP, FORWARD,
			     ROUTER_EXP, false),
2273 2274
	MLXSW_SP_RXL_NO_MARK(DISCARD_ING_ROUTER_DIP_LINK_LOCAL, FORWARD,
			     ROUTER_EXP, false),
2275 2276
	/* Multicast Router Traps */
	MLXSW_SP_RXL_MARK(ACL1, TRAP_TO_CPU, MULTICAST, false),
2277
	MLXSW_SP_RXL_L3_MARK(ACL2, TRAP_TO_CPU, MULTICAST, false),
2278
	/* NVE traps */
2279
	MLXSW_SP_RXL_MARK(NVE_ENCAP_ARP, TRAP_TO_CPU, NEIGH_DISCOVERY, false),
2280 2281
};

2282
static const struct mlxsw_listener mlxsw_sp1_listener[] = {
2283 2284 2285
	/* Events */
	MLXSW_EVENTL(mlxsw_sp1_ptp_egr_fifo_event_func, PTP_EGR_FIFO, SP_PTP0),
	MLXSW_EVENTL(mlxsw_sp1_ptp_ing_fifo_event_func, PTP_ING_FIFO, SP_PTP0),
2286 2287
};

2288 2289
static int mlxsw_sp_cpu_policers_set(struct mlxsw_core *mlxsw_core)
{
2290
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 2303 2304 2305 2306 2307 2308
	char qpcr_pl[MLXSW_REG_QPCR_LEN];
	enum mlxsw_reg_qpcr_ir_units ir_units;
	int max_cpu_policers;
	bool is_bytes;
	u8 burst_size;
	u32 rate;
	int i, err;

	if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS))
		return -EIO;

	max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);

	ir_units = MLXSW_REG_QPCR_IR_UNITS_M;
	for (i = 0; i < max_cpu_policers; i++) {
		is_bytes = false;
		switch (i) {
		case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2309
		case MLXSW_REG_HTGT_TRAP_GROUP_SP_MULTICAST:
2310
		case MLXSW_REG_HTGT_TRAP_GROUP_SP_FID_MISS:
2311 2312
			rate = 1024;
			burst_size = 7;
2313 2314 2315 2316 2317
			break;
		default:
			continue;
		}

2318
		__set_bit(i, mlxsw_sp->trap->policers_usage);
2319 2320 2321 2322 2323 2324 2325 2326 2327 2328
		mlxsw_reg_qpcr_pack(qpcr_pl, i, ir_units, is_bytes, rate,
				    burst_size);
		err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(qpcr), qpcr_pl);
		if (err)
			return err;
	}

	return 0;
}

N
Nogah Frankel 已提交
2329
static int mlxsw_sp_trap_groups_set(struct mlxsw_core *mlxsw_core)
2330 2331
{
	char htgt_pl[MLXSW_REG_HTGT_LEN];
2332
	enum mlxsw_reg_htgt_trap_group i;
2333
	int max_cpu_policers;
N
Nogah Frankel 已提交
2334 2335
	int max_trap_groups;
	u8 priority, tc;
2336
	u16 policer_id;
2337
	int err;
N
Nogah Frankel 已提交
2338 2339 2340 2341 2342

	if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS))
		return -EIO;

	max_trap_groups = MLXSW_CORE_RES_GET(mlxsw_core, MAX_TRAP_GROUPS);
2343
	max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
N
Nogah Frankel 已提交
2344 2345

	for (i = 0; i < max_trap_groups; i++) {
2346
		policer_id = i;
N
Nogah Frankel 已提交
2347
		switch (i) {
2348
		case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2349
		case MLXSW_REG_HTGT_TRAP_GROUP_SP_MULTICAST:
2350
		case MLXSW_REG_HTGT_TRAP_GROUP_SP_FID_MISS:
2351 2352 2353 2354
			priority = 1;
			tc = 1;
			break;
		case MLXSW_REG_HTGT_TRAP_GROUP_SP_EVENT:
N
Nogah Frankel 已提交
2355 2356
			priority = MLXSW_REG_HTGT_DEFAULT_PRIORITY;
			tc = MLXSW_REG_HTGT_DEFAULT_TC;
2357
			policer_id = MLXSW_REG_HTGT_INVALID_POLICER;
N
Nogah Frankel 已提交
2358 2359 2360 2361
			break;
		default:
			continue;
		}
2362

2363 2364 2365 2366 2367
		if (max_cpu_policers <= policer_id &&
		    policer_id != MLXSW_REG_HTGT_INVALID_POLICER)
			return -EIO;

		mlxsw_reg_htgt_pack(htgt_pl, i, policer_id, priority, tc);
N
Nogah Frankel 已提交
2368 2369 2370 2371 2372 2373 2374 2375
		err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
		if (err)
			return err;
	}

	return 0;
}

2376 2377 2378
static int mlxsw_sp_traps_register(struct mlxsw_sp *mlxsw_sp,
				   const struct mlxsw_listener listeners[],
				   size_t listeners_count)
N
Nogah Frankel 已提交
2379
{
2380 2381 2382
	int i;
	int err;

2383
	for (i = 0; i < listeners_count; i++) {
2384
		err = mlxsw_core_trap_register(mlxsw_sp->core,
2385
					       &listeners[i],
2386
					       mlxsw_sp);
2387
		if (err)
2388
			goto err_listener_register;
2389 2390 2391 2392

	}
	return 0;

2393
err_listener_register:
2394
	for (i--; i >= 0; i--) {
2395
		mlxsw_core_trap_unregister(mlxsw_sp->core,
2396
					   &listeners[i],
2397
					   mlxsw_sp);
2398 2399 2400 2401
	}
	return err;
}

2402 2403 2404
static void mlxsw_sp_traps_unregister(struct mlxsw_sp *mlxsw_sp,
				      const struct mlxsw_listener listeners[],
				      size_t listeners_count)
2405 2406 2407
{
	int i;

2408
	for (i = 0; i < listeners_count; i++) {
2409
		mlxsw_core_trap_unregister(mlxsw_sp->core,
2410
					   &listeners[i],
2411
					   mlxsw_sp);
2412 2413 2414
	}
}

2415 2416
static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
{
2417 2418
	struct mlxsw_sp_trap *trap;
	u64 max_policers;
2419 2420
	int err;

2421 2422 2423 2424 2425 2426 2427 2428 2429 2430
	if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_CPU_POLICERS))
		return -EIO;
	max_policers = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_CPU_POLICERS);
	trap = kzalloc(struct_size(trap, policers_usage,
				   BITS_TO_LONGS(max_policers)), GFP_KERNEL);
	if (!trap)
		return -ENOMEM;
	trap->max_policers = max_policers;
	mlxsw_sp->trap = trap;

2431 2432
	err = mlxsw_sp_cpu_policers_set(mlxsw_sp->core);
	if (err)
2433
		goto err_cpu_policers_set;
2434 2435 2436

	err = mlxsw_sp_trap_groups_set(mlxsw_sp->core);
	if (err)
2437
		goto err_trap_groups_set;
2438

2439 2440 2441
	err = mlxsw_sp_traps_register(mlxsw_sp, mlxsw_sp_listener,
				      ARRAY_SIZE(mlxsw_sp_listener));
	if (err)
2442
		goto err_traps_register;
2443 2444 2445 2446 2447 2448 2449 2450 2451 2452 2453

	err = mlxsw_sp_traps_register(mlxsw_sp, mlxsw_sp->listeners,
				      mlxsw_sp->listeners_count);
	if (err)
		goto err_extra_traps_init;

	return 0;

err_extra_traps_init:
	mlxsw_sp_traps_unregister(mlxsw_sp, mlxsw_sp_listener,
				  ARRAY_SIZE(mlxsw_sp_listener));
2454 2455 2456 2457
err_traps_register:
err_trap_groups_set:
err_cpu_policers_set:
	kfree(trap);
2458
	return err;
2459 2460 2461 2462
}

static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
{
2463 2464
	mlxsw_sp_traps_unregister(mlxsw_sp, mlxsw_sp->listeners,
				  mlxsw_sp->listeners_count);
2465 2466
	mlxsw_sp_traps_unregister(mlxsw_sp, mlxsw_sp_listener,
				  ARRAY_SIZE(mlxsw_sp_listener));
2467
	kfree(mlxsw_sp->trap);
2468 2469
}

2470 2471
#define MLXSW_SP_LAG_SEED_INIT 0xcafecafe

2472 2473 2474
static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
{
	char slcr_pl[MLXSW_REG_SLCR_LEN];
2475
	u32 seed;
2476
	int err;
2477

2478 2479
	seed = jhash(mlxsw_sp->base_mac, sizeof(mlxsw_sp->base_mac),
		     MLXSW_SP_LAG_SEED_INIT);
2480 2481 2482 2483 2484 2485 2486 2487
	mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
				     MLXSW_REG_SLCR_LAG_HASH_DMAC |
				     MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
				     MLXSW_REG_SLCR_LAG_HASH_VLANID |
				     MLXSW_REG_SLCR_LAG_HASH_SIP |
				     MLXSW_REG_SLCR_LAG_HASH_DIP |
				     MLXSW_REG_SLCR_LAG_HASH_SPORT |
				     MLXSW_REG_SLCR_LAG_HASH_DPORT |
2488
				     MLXSW_REG_SLCR_LAG_HASH_IPPROTO, seed);
2489 2490 2491 2492
	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
	if (err)
		return err;

J
Jiri Pirko 已提交
2493 2494
	if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) ||
	    !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS))
2495 2496
		return -EIO;

J
Jiri Pirko 已提交
2497
	mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG),
2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508
				 sizeof(struct mlxsw_sp_upper),
				 GFP_KERNEL);
	if (!mlxsw_sp->lags)
		return -ENOMEM;

	return 0;
}

static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
{
	kfree(mlxsw_sp->lags);
2509 2510
}

2511 2512 2513
static int mlxsw_sp_basic_trap_groups_set(struct mlxsw_core *mlxsw_core)
{
	char htgt_pl[MLXSW_REG_HTGT_LEN];
2514
	int err;
2515

N
Nogah Frankel 已提交
2516 2517 2518 2519
	mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD,
			    MLXSW_REG_HTGT_INVALID_POLICER,
			    MLXSW_REG_HTGT_DEFAULT_PRIORITY,
			    MLXSW_REG_HTGT_DEFAULT_TC);
2520 2521 2522 2523 2524 2525 2526 2527
	err =  mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
	if (err)
		return err;

	mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_MFDE,
			    MLXSW_REG_HTGT_INVALID_POLICER,
			    MLXSW_REG_HTGT_DEFAULT_PRIORITY,
			    MLXSW_REG_HTGT_DEFAULT_TC);
2528 2529 2530 2531 2532 2533 2534 2535
	err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
	if (err)
		return err;

	mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_MTWE,
			    MLXSW_REG_HTGT_INVALID_POLICER,
			    MLXSW_REG_HTGT_DEFAULT_PRIORITY,
			    MLXSW_REG_HTGT_DEFAULT_TC);
2536 2537 2538 2539 2540 2541 2542 2543
	err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
	if (err)
		return err;

	mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_PMPE,
			    MLXSW_REG_HTGT_INVALID_POLICER,
			    MLXSW_REG_HTGT_DEFAULT_PRIORITY,
			    MLXSW_REG_HTGT_DEFAULT_TC);
2544 2545 2546
	return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
}

2547 2548 2549
static const struct mlxsw_sp_ptp_ops mlxsw_sp1_ptp_ops = {
	.clock_init	= mlxsw_sp1_ptp_clock_init,
	.clock_fini	= mlxsw_sp1_ptp_clock_fini,
2550 2551
	.init		= mlxsw_sp1_ptp_init,
	.fini		= mlxsw_sp1_ptp_fini,
2552
	.receive	= mlxsw_sp1_ptp_receive,
2553
	.transmitted	= mlxsw_sp1_ptp_transmitted,
2554 2555
	.hwtstamp_get	= mlxsw_sp1_ptp_hwtstamp_get,
	.hwtstamp_set	= mlxsw_sp1_ptp_hwtstamp_set,
2556
	.shaper_work	= mlxsw_sp1_ptp_shaper_work,
2557
	.get_ts_info	= mlxsw_sp1_ptp_get_ts_info,
2558 2559 2560
	.get_stats_count = mlxsw_sp1_get_stats_count,
	.get_stats_strings = mlxsw_sp1_get_stats_strings,
	.get_stats	= mlxsw_sp1_get_stats,
2561 2562 2563 2564 2565
};

static const struct mlxsw_sp_ptp_ops mlxsw_sp2_ptp_ops = {
	.clock_init	= mlxsw_sp2_ptp_clock_init,
	.clock_fini	= mlxsw_sp2_ptp_clock_fini,
2566 2567
	.init		= mlxsw_sp2_ptp_init,
	.fini		= mlxsw_sp2_ptp_fini,
2568
	.receive	= mlxsw_sp2_ptp_receive,
2569
	.transmitted	= mlxsw_sp2_ptp_transmitted,
2570 2571
	.hwtstamp_get	= mlxsw_sp2_ptp_hwtstamp_get,
	.hwtstamp_set	= mlxsw_sp2_ptp_hwtstamp_set,
2572
	.shaper_work	= mlxsw_sp2_ptp_shaper_work,
2573
	.get_ts_info	= mlxsw_sp2_ptp_get_ts_info,
2574 2575 2576
	.get_stats_count = mlxsw_sp2_get_stats_count,
	.get_stats_strings = mlxsw_sp2_get_stats_strings,
	.get_stats	= mlxsw_sp2_get_stats,
2577 2578
};

2579 2580 2581
static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
				    unsigned long event, void *ptr);

2582
static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
2583 2584
			 const struct mlxsw_bus_info *mlxsw_bus_info,
			 struct netlink_ext_ack *extack)
2585
{
2586
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2587 2588 2589 2590 2591
	int err;

	mlxsw_sp->core = mlxsw_core;
	mlxsw_sp->bus_info = mlxsw_bus_info;

2592 2593
	mlxsw_core_emad_string_tlv_enable(mlxsw_core);

2594 2595 2596 2597 2598 2599
	err = mlxsw_sp_base_mac_get(mlxsw_sp);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
		return err;
	}

2600 2601 2602 2603 2604 2605
	err = mlxsw_sp_kvdl_init(mlxsw_sp);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize KVDL\n");
		return err;
	}

2606
	err = mlxsw_sp_fids_init(mlxsw_sp);
2607
	if (err) {
2608
		dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize FIDs\n");
2609
		goto err_fids_init;
2610 2611
	}

2612 2613 2614 2615 2616 2617
	err = mlxsw_sp_policers_init(mlxsw_sp);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize policers\n");
		goto err_policers_init;
	}

2618
	err = mlxsw_sp_traps_init(mlxsw_sp);
2619
	if (err) {
2620 2621
		dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps\n");
		goto err_traps_init;
2622 2623
	}

2624 2625 2626 2627 2628 2629
	err = mlxsw_sp_devlink_traps_init(mlxsw_sp);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize devlink traps\n");
		goto err_devlink_traps_init;
	}

2630 2631 2632 2633 2634 2635
	err = mlxsw_sp_buffers_init(mlxsw_sp);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
		goto err_buffers_init;
	}

2636 2637 2638 2639 2640 2641
	err = mlxsw_sp_lag_init(mlxsw_sp);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
		goto err_lag_init;
	}

2642 2643 2644 2645 2646 2647 2648 2649 2650
	/* Initialize SPAN before router and switchdev, so that those components
	 * can call mlxsw_sp_span_respin().
	 */
	err = mlxsw_sp_span_init(mlxsw_sp);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
		goto err_span_init;
	}

2651 2652 2653 2654 2655 2656
	err = mlxsw_sp_switchdev_init(mlxsw_sp);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
		goto err_switchdev_init;
	}

Y
Yotam Gigi 已提交
2657 2658 2659 2660 2661 2662
	err = mlxsw_sp_counter_pool_init(mlxsw_sp);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to init counter pool\n");
		goto err_counter_pool_init;
	}

2663 2664 2665 2666 2667 2668
	err = mlxsw_sp_afa_init(mlxsw_sp);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize ACL actions\n");
		goto err_afa_init;
	}

2669 2670 2671 2672 2673 2674
	err = mlxsw_sp_nve_init(mlxsw_sp);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize NVE\n");
		goto err_nve_init;
	}

2675 2676 2677 2678 2679 2680
	err = mlxsw_sp_acl_init(mlxsw_sp);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize ACL\n");
		goto err_acl_init;
	}

2681
	err = mlxsw_sp_router_init(mlxsw_sp, extack);
2682 2683 2684 2685 2686
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
		goto err_router_init;
	}

2687 2688 2689 2690 2691 2692 2693 2694 2695 2696 2697 2698
	if (mlxsw_sp->bus_info->read_frc_capable) {
		/* NULL is a valid return value from clock_init */
		mlxsw_sp->clock =
			mlxsw_sp->ptp_ops->clock_init(mlxsw_sp,
						      mlxsw_sp->bus_info->dev);
		if (IS_ERR(mlxsw_sp->clock)) {
			err = PTR_ERR(mlxsw_sp->clock);
			dev_err(mlxsw_sp->bus_info->dev, "Failed to init ptp clock\n");
			goto err_ptp_clock_init;
		}
	}

2699 2700 2701 2702 2703 2704 2705 2706 2707 2708
	if (mlxsw_sp->clock) {
		/* NULL is a valid return value from ptp_ops->init */
		mlxsw_sp->ptp_state = mlxsw_sp->ptp_ops->init(mlxsw_sp);
		if (IS_ERR(mlxsw_sp->ptp_state)) {
			err = PTR_ERR(mlxsw_sp->ptp_state);
			dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize PTP\n");
			goto err_ptp_init;
		}
	}

2709 2710 2711
	/* Initialize netdevice notifier after router and SPAN is initialized,
	 * so that the event handler can use router structures and call SPAN
	 * respin.
2712 2713
	 */
	mlxsw_sp->netdevice_nb.notifier_call = mlxsw_sp_netdevice_event;
2714
	err = register_netdevice_notifier_net(mlxsw_sp_net(mlxsw_sp),
2715
					      &mlxsw_sp->netdevice_nb);
2716 2717 2718 2719 2720
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to register netdev notifier\n");
		goto err_netdev_notifier;
	}

2721 2722 2723 2724 2725 2726
	err = mlxsw_sp_dpipe_init(mlxsw_sp);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to init pipeline debug\n");
		goto err_dpipe_init;
	}

2727 2728 2729 2730 2731 2732
	err = mlxsw_sp_port_module_info_init(mlxsw_sp);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to init port module info\n");
		goto err_port_module_info_init;
	}

2733 2734 2735 2736 2737 2738
	err = mlxsw_sp_ports_create(mlxsw_sp);
	if (err) {
		dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
		goto err_ports_create;
	}

2739 2740
	return 0;

2741
err_ports_create:
2742 2743
	mlxsw_sp_port_module_info_fini(mlxsw_sp);
err_port_module_info_init:
2744 2745
	mlxsw_sp_dpipe_fini(mlxsw_sp);
err_dpipe_init:
2746
	unregister_netdevice_notifier_net(mlxsw_sp_net(mlxsw_sp),
2747
					  &mlxsw_sp->netdevice_nb);
2748
err_netdev_notifier:
2749 2750 2751
	if (mlxsw_sp->clock)
		mlxsw_sp->ptp_ops->fini(mlxsw_sp->ptp_state);
err_ptp_init:
2752 2753 2754
	if (mlxsw_sp->clock)
		mlxsw_sp->ptp_ops->clock_fini(mlxsw_sp->clock);
err_ptp_clock_init:
2755 2756
	mlxsw_sp_router_fini(mlxsw_sp);
err_router_init:
2757 2758
	mlxsw_sp_acl_fini(mlxsw_sp);
err_acl_init:
2759 2760
	mlxsw_sp_nve_fini(mlxsw_sp);
err_nve_init:
2761 2762
	mlxsw_sp_afa_fini(mlxsw_sp);
err_afa_init:
Y
Yotam Gigi 已提交
2763 2764
	mlxsw_sp_counter_pool_fini(mlxsw_sp);
err_counter_pool_init:
2765
	mlxsw_sp_switchdev_fini(mlxsw_sp);
2766
err_switchdev_init:
2767 2768
	mlxsw_sp_span_fini(mlxsw_sp);
err_span_init:
2769
	mlxsw_sp_lag_fini(mlxsw_sp);
2770
err_lag_init:
2771
	mlxsw_sp_buffers_fini(mlxsw_sp);
2772
err_buffers_init:
2773 2774
	mlxsw_sp_devlink_traps_fini(mlxsw_sp);
err_devlink_traps_init:
2775
	mlxsw_sp_traps_fini(mlxsw_sp);
2776
err_traps_init:
2777 2778
	mlxsw_sp_policers_fini(mlxsw_sp);
err_policers_init:
2779
	mlxsw_sp_fids_fini(mlxsw_sp);
2780 2781
err_fids_init:
	mlxsw_sp_kvdl_fini(mlxsw_sp);
2782 2783 2784
	return err;
}

2785
static int mlxsw_sp1_init(struct mlxsw_core *mlxsw_core,
2786 2787
			  const struct mlxsw_bus_info *mlxsw_bus_info,
			  struct netlink_ext_ack *extack)
2788 2789 2790 2791 2792 2793 2794
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);

	mlxsw_sp->kvdl_ops = &mlxsw_sp1_kvdl_ops;
	mlxsw_sp->afa_ops = &mlxsw_sp1_act_afa_ops;
	mlxsw_sp->afk_ops = &mlxsw_sp1_afk_ops;
	mlxsw_sp->mr_tcam_ops = &mlxsw_sp1_mr_tcam_ops;
2795
	mlxsw_sp->acl_rulei_ops = &mlxsw_sp1_acl_rulei_ops;
2796
	mlxsw_sp->acl_tcam_ops = &mlxsw_sp1_acl_tcam_ops;
2797
	mlxsw_sp->nve_ops_arr = mlxsw_sp1_nve_ops_arr;
2798
	mlxsw_sp->mac_mask = mlxsw_sp1_mac_mask;
2799
	mlxsw_sp->rif_ops_arr = mlxsw_sp1_rif_ops_arr;
2800
	mlxsw_sp->sb_vals = &mlxsw_sp1_sb_vals;
2801
	mlxsw_sp->sb_ops = &mlxsw_sp1_sb_ops;
2802
	mlxsw_sp->port_type_speed_ops = &mlxsw_sp1_port_type_speed_ops;
2803
	mlxsw_sp->ptp_ops = &mlxsw_sp1_ptp_ops;
2804
	mlxsw_sp->span_ops = &mlxsw_sp1_span_ops;
2805
	mlxsw_sp->policer_core_ops = &mlxsw_sp1_policer_core_ops;
2806
	mlxsw_sp->trap_ops = &mlxsw_sp1_trap_ops;
2807 2808
	mlxsw_sp->listeners = mlxsw_sp1_listener;
	mlxsw_sp->listeners_count = ARRAY_SIZE(mlxsw_sp1_listener);
2809
	mlxsw_sp->lowest_shaper_bs = MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP1;
2810

2811
	return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info, extack);
2812 2813 2814
}

static int mlxsw_sp2_init(struct mlxsw_core *mlxsw_core,
2815 2816
			  const struct mlxsw_bus_info *mlxsw_bus_info,
			  struct netlink_ext_ack *extack)
2817 2818 2819 2820 2821 2822 2823
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);

	mlxsw_sp->kvdl_ops = &mlxsw_sp2_kvdl_ops;
	mlxsw_sp->afa_ops = &mlxsw_sp2_act_afa_ops;
	mlxsw_sp->afk_ops = &mlxsw_sp2_afk_ops;
	mlxsw_sp->mr_tcam_ops = &mlxsw_sp2_mr_tcam_ops;
2824
	mlxsw_sp->acl_rulei_ops = &mlxsw_sp2_acl_rulei_ops;
2825
	mlxsw_sp->acl_tcam_ops = &mlxsw_sp2_acl_tcam_ops;
2826
	mlxsw_sp->nve_ops_arr = mlxsw_sp2_nve_ops_arr;
2827
	mlxsw_sp->mac_mask = mlxsw_sp2_mac_mask;
2828
	mlxsw_sp->rif_ops_arr = mlxsw_sp2_rif_ops_arr;
2829
	mlxsw_sp->sb_vals = &mlxsw_sp2_sb_vals;
2830
	mlxsw_sp->sb_ops = &mlxsw_sp2_sb_ops;
2831
	mlxsw_sp->port_type_speed_ops = &mlxsw_sp2_port_type_speed_ops;
2832
	mlxsw_sp->ptp_ops = &mlxsw_sp2_ptp_ops;
2833
	mlxsw_sp->span_ops = &mlxsw_sp2_span_ops;
2834
	mlxsw_sp->policer_core_ops = &mlxsw_sp2_policer_core_ops;
2835
	mlxsw_sp->trap_ops = &mlxsw_sp2_trap_ops;
2836
	mlxsw_sp->lowest_shaper_bs = MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP2;
2837

2838
	return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info, extack);
2839 2840
}

2841 2842 2843 2844 2845 2846 2847 2848 2849 2850
static int mlxsw_sp3_init(struct mlxsw_core *mlxsw_core,
			  const struct mlxsw_bus_info *mlxsw_bus_info,
			  struct netlink_ext_ack *extack)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);

	mlxsw_sp->kvdl_ops = &mlxsw_sp2_kvdl_ops;
	mlxsw_sp->afa_ops = &mlxsw_sp2_act_afa_ops;
	mlxsw_sp->afk_ops = &mlxsw_sp2_afk_ops;
	mlxsw_sp->mr_tcam_ops = &mlxsw_sp2_mr_tcam_ops;
2851
	mlxsw_sp->acl_rulei_ops = &mlxsw_sp2_acl_rulei_ops;
2852 2853 2854 2855 2856
	mlxsw_sp->acl_tcam_ops = &mlxsw_sp2_acl_tcam_ops;
	mlxsw_sp->nve_ops_arr = mlxsw_sp2_nve_ops_arr;
	mlxsw_sp->mac_mask = mlxsw_sp2_mac_mask;
	mlxsw_sp->rif_ops_arr = mlxsw_sp2_rif_ops_arr;
	mlxsw_sp->sb_vals = &mlxsw_sp2_sb_vals;
2857
	mlxsw_sp->sb_ops = &mlxsw_sp3_sb_ops;
2858 2859
	mlxsw_sp->port_type_speed_ops = &mlxsw_sp2_port_type_speed_ops;
	mlxsw_sp->ptp_ops = &mlxsw_sp2_ptp_ops;
2860
	mlxsw_sp->span_ops = &mlxsw_sp3_span_ops;
2861
	mlxsw_sp->policer_core_ops = &mlxsw_sp2_policer_core_ops;
2862
	mlxsw_sp->trap_ops = &mlxsw_sp2_trap_ops;
2863
	mlxsw_sp->lowest_shaper_bs = MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP3;
2864 2865 2866 2867

	return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info, extack);
}

2868
static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
2869
{
2870
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
2871

2872
	mlxsw_sp_ports_remove(mlxsw_sp);
2873
	mlxsw_sp_port_module_info_fini(mlxsw_sp);
2874
	mlxsw_sp_dpipe_fini(mlxsw_sp);
2875
	unregister_netdevice_notifier_net(mlxsw_sp_net(mlxsw_sp),
2876
					  &mlxsw_sp->netdevice_nb);
2877 2878
	if (mlxsw_sp->clock) {
		mlxsw_sp->ptp_ops->fini(mlxsw_sp->ptp_state);
2879
		mlxsw_sp->ptp_ops->clock_fini(mlxsw_sp->clock);
2880
	}
2881
	mlxsw_sp_router_fini(mlxsw_sp);
2882
	mlxsw_sp_acl_fini(mlxsw_sp);
2883
	mlxsw_sp_nve_fini(mlxsw_sp);
2884
	mlxsw_sp_afa_fini(mlxsw_sp);
Y
Yotam Gigi 已提交
2885
	mlxsw_sp_counter_pool_fini(mlxsw_sp);
2886
	mlxsw_sp_switchdev_fini(mlxsw_sp);
2887
	mlxsw_sp_span_fini(mlxsw_sp);
2888
	mlxsw_sp_lag_fini(mlxsw_sp);
2889
	mlxsw_sp_buffers_fini(mlxsw_sp);
2890
	mlxsw_sp_devlink_traps_fini(mlxsw_sp);
2891
	mlxsw_sp_traps_fini(mlxsw_sp);
2892
	mlxsw_sp_policers_fini(mlxsw_sp);
2893
	mlxsw_sp_fids_fini(mlxsw_sp);
2894
	mlxsw_sp_kvdl_fini(mlxsw_sp);
2895 2896
}

2897 2898 2899 2900 2901 2902
/* Per-FID flood tables are used for both "true" 802.1D FIDs and emulated
 * 802.1Q FIDs
 */
#define MLXSW_SP_FID_FLOOD_TABLE_SIZE	(MLXSW_SP_FID_8021D_MAX + \
					 VLAN_VID_MASK - 1)

2903
static const struct mlxsw_config_profile mlxsw_sp1_config_profile = {
2904
	.used_max_mid			= 1,
2905
	.max_mid			= MLXSW_SP_MID_MAX,
2906 2907 2908
	.used_flood_tables		= 1,
	.used_flood_mode		= 1,
	.flood_mode			= 3,
2909
	.max_fid_flood_tables		= 3,
2910
	.fid_flood_table_size		= MLXSW_SP_FID_FLOOD_TABLE_SIZE,
2911 2912 2913 2914
	.used_max_ib_mc			= 1,
	.max_ib_mc			= 0,
	.used_max_pkey			= 1,
	.max_pkey			= 0,
2915
	.used_kvd_sizes			= 1,
2916 2917
	.kvd_hash_single_parts		= 59,
	.kvd_hash_double_parts		= 41,
2918
	.kvd_linear_size		= MLXSW_SP_KVD_LINEAR_SIZE,
2919 2920 2921 2922 2923 2924 2925 2926
	.swid_config			= {
		{
			.used_type	= 1,
			.type		= MLXSW_PORT_SWID_TYPE_ETH,
		}
	},
};

2927 2928 2929 2930 2931 2932 2933
static const struct mlxsw_config_profile mlxsw_sp2_config_profile = {
	.used_max_mid			= 1,
	.max_mid			= MLXSW_SP_MID_MAX,
	.used_flood_tables		= 1,
	.used_flood_mode		= 1,
	.flood_mode			= 3,
	.max_fid_flood_tables		= 3,
2934
	.fid_flood_table_size		= MLXSW_SP_FID_FLOOD_TABLE_SIZE,
2935 2936 2937 2938 2939 2940 2941 2942 2943 2944 2945 2946
	.used_max_ib_mc			= 1,
	.max_ib_mc			= 0,
	.used_max_pkey			= 1,
	.max_pkey			= 0,
	.swid_config			= {
		{
			.used_type	= 1,
			.type		= MLXSW_PORT_SWID_TYPE_ETH,
		}
	},
};

2947
static void
2948 2949 2950 2951 2952
mlxsw_sp_resource_size_params_prepare(struct mlxsw_core *mlxsw_core,
				      struct devlink_resource_size_params *kvd_size_params,
				      struct devlink_resource_size_params *linear_size_params,
				      struct devlink_resource_size_params *hash_double_size_params,
				      struct devlink_resource_size_params *hash_single_size_params)
2953 2954 2955 2956 2957 2958 2959 2960
{
	u32 single_size_min = MLXSW_CORE_RES_GET(mlxsw_core,
						 KVD_SINGLE_MIN_SIZE);
	u32 double_size_min = MLXSW_CORE_RES_GET(mlxsw_core,
						 KVD_DOUBLE_MIN_SIZE);
	u32 kvd_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE);
	u32 linear_size_min = 0;

2961 2962 2963 2964 2965 2966 2967 2968 2969 2970 2971 2972 2973 2974 2975 2976 2977 2978 2979 2980
	devlink_resource_size_params_init(kvd_size_params, kvd_size, kvd_size,
					  MLXSW_SP_KVD_GRANULARITY,
					  DEVLINK_RESOURCE_UNIT_ENTRY);
	devlink_resource_size_params_init(linear_size_params, linear_size_min,
					  kvd_size - single_size_min -
					  double_size_min,
					  MLXSW_SP_KVD_GRANULARITY,
					  DEVLINK_RESOURCE_UNIT_ENTRY);
	devlink_resource_size_params_init(hash_double_size_params,
					  double_size_min,
					  kvd_size - single_size_min -
					  linear_size_min,
					  MLXSW_SP_KVD_GRANULARITY,
					  DEVLINK_RESOURCE_UNIT_ENTRY);
	devlink_resource_size_params_init(hash_single_size_params,
					  single_size_min,
					  kvd_size - double_size_min -
					  linear_size_min,
					  MLXSW_SP_KVD_GRANULARITY,
					  DEVLINK_RESOURCE_UNIT_ENTRY);
2981 2982
}

2983
static int mlxsw_sp1_resources_kvd_register(struct mlxsw_core *mlxsw_core)
2984 2985
{
	struct devlink *devlink = priv_to_devlink(mlxsw_core);
2986 2987 2988 2989
	struct devlink_resource_size_params hash_single_size_params;
	struct devlink_resource_size_params hash_double_size_params;
	struct devlink_resource_size_params linear_size_params;
	struct devlink_resource_size_params kvd_size_params;
2990 2991 2992 2993
	u32 kvd_size, single_size, double_size, linear_size;
	const struct mlxsw_config_profile *profile;
	int err;

2994
	profile = &mlxsw_sp1_config_profile;
2995 2996 2997
	if (!MLXSW_CORE_RES_VALID(mlxsw_core, KVD_SIZE))
		return -EIO;

2998 2999 3000 3001 3002
	mlxsw_sp_resource_size_params_prepare(mlxsw_core, &kvd_size_params,
					      &linear_size_params,
					      &hash_double_size_params,
					      &hash_single_size_params);

3003 3004
	kvd_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE);
	err = devlink_resource_register(devlink, MLXSW_SP_RESOURCE_NAME_KVD,
3005
					kvd_size, MLXSW_SP_RESOURCE_KVD,
3006
					DEVLINK_RESOURCE_ID_PARENT_TOP,
3007
					&kvd_size_params);
3008 3009 3010 3011 3012
	if (err)
		return err;

	linear_size = profile->kvd_linear_size;
	err = devlink_resource_register(devlink, MLXSW_SP_RESOURCE_NAME_KVD_LINEAR,
3013
					linear_size,
3014 3015
					MLXSW_SP_RESOURCE_KVD_LINEAR,
					MLXSW_SP_RESOURCE_KVD,
3016
					&linear_size_params);
3017 3018 3019
	if (err)
		return err;

3020
	err = mlxsw_sp1_kvdl_resources_register(mlxsw_core);
3021 3022 3023
	if  (err)
		return err;

3024 3025 3026 3027
	double_size = kvd_size - linear_size;
	double_size *= profile->kvd_hash_double_parts;
	double_size /= profile->kvd_hash_double_parts +
		       profile->kvd_hash_single_parts;
3028
	double_size = rounddown(double_size, MLXSW_SP_KVD_GRANULARITY);
3029
	err = devlink_resource_register(devlink, MLXSW_SP_RESOURCE_NAME_KVD_HASH_DOUBLE,
3030
					double_size,
3031 3032
					MLXSW_SP_RESOURCE_KVD_HASH_DOUBLE,
					MLXSW_SP_RESOURCE_KVD,
3033
					&hash_double_size_params);
3034 3035 3036 3037 3038
	if (err)
		return err;

	single_size = kvd_size - double_size - linear_size;
	err = devlink_resource_register(devlink, MLXSW_SP_RESOURCE_NAME_KVD_HASH_SINGLE,
3039
					single_size,
3040 3041
					MLXSW_SP_RESOURCE_KVD_HASH_SINGLE,
					MLXSW_SP_RESOURCE_KVD,
3042
					&hash_single_size_params);
3043 3044 3045 3046 3047 3048
	if (err)
		return err;

	return 0;
}

3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068
static int mlxsw_sp2_resources_kvd_register(struct mlxsw_core *mlxsw_core)
{
	struct devlink *devlink = priv_to_devlink(mlxsw_core);
	struct devlink_resource_size_params kvd_size_params;
	u32 kvd_size;

	if (!MLXSW_CORE_RES_VALID(mlxsw_core, KVD_SIZE))
		return -EIO;

	kvd_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE);
	devlink_resource_size_params_init(&kvd_size_params, kvd_size, kvd_size,
					  MLXSW_SP_KVD_GRANULARITY,
					  DEVLINK_RESOURCE_UNIT_ENTRY);

	return devlink_resource_register(devlink, MLXSW_SP_RESOURCE_NAME_KVD,
					 kvd_size, MLXSW_SP_RESOURCE_KVD,
					 DEVLINK_RESOURCE_ID_PARENT_TOP,
					 &kvd_size_params);
}

3069 3070 3071 3072 3073 3074 3075 3076 3077 3078 3079 3080 3081 3082 3083 3084 3085 3086 3087
static int mlxsw_sp_resources_span_register(struct mlxsw_core *mlxsw_core)
{
	struct devlink *devlink = priv_to_devlink(mlxsw_core);
	struct devlink_resource_size_params span_size_params;
	u32 max_span;

	if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SPAN))
		return -EIO;

	max_span = MLXSW_CORE_RES_GET(mlxsw_core, MAX_SPAN);
	devlink_resource_size_params_init(&span_size_params, max_span, max_span,
					  1, DEVLINK_RESOURCE_UNIT_ENTRY);

	return devlink_resource_register(devlink, MLXSW_SP_RESOURCE_NAME_SPAN,
					 max_span, MLXSW_SP_RESOURCE_SPAN,
					 DEVLINK_RESOURCE_ID_PARENT_TOP,
					 &span_size_params);
}

3088 3089
static int mlxsw_sp1_resources_register(struct mlxsw_core *mlxsw_core)
{
3090 3091 3092 3093 3094 3095 3096 3097 3098 3099
	int err;

	err = mlxsw_sp1_resources_kvd_register(mlxsw_core);
	if (err)
		return err;

	err = mlxsw_sp_resources_span_register(mlxsw_core);
	if (err)
		goto err_resources_span_register;

3100 3101 3102 3103
	err = mlxsw_sp_counter_resources_register(mlxsw_core);
	if (err)
		goto err_resources_counter_register;

3104 3105 3106 3107
	err = mlxsw_sp_policer_resources_register(mlxsw_core);
	if (err)
		goto err_resources_counter_register;

3108 3109
	return 0;

3110
err_resources_counter_register:
3111 3112 3113
err_resources_span_register:
	devlink_resources_unregister(priv_to_devlink(mlxsw_core), NULL);
	return err;
3114 3115 3116 3117
}

static int mlxsw_sp2_resources_register(struct mlxsw_core *mlxsw_core)
{
3118 3119 3120 3121 3122 3123 3124 3125 3126 3127
	int err;

	err = mlxsw_sp2_resources_kvd_register(mlxsw_core);
	if (err)
		return err;

	err = mlxsw_sp_resources_span_register(mlxsw_core);
	if (err)
		goto err_resources_span_register;

3128 3129 3130 3131
	err = mlxsw_sp_counter_resources_register(mlxsw_core);
	if (err)
		goto err_resources_counter_register;

3132 3133 3134 3135
	err = mlxsw_sp_policer_resources_register(mlxsw_core);
	if (err)
		goto err_resources_counter_register;

3136 3137
	return 0;

3138
err_resources_counter_register:
3139 3140 3141
err_resources_span_register:
	devlink_resources_unregister(priv_to_devlink(mlxsw_core), NULL);
	return err;
3142 3143
}

3144 3145 3146 3147 3148 3149 3150 3151 3152 3153
static int mlxsw_sp_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
				  const struct mlxsw_config_profile *profile,
				  u64 *p_single_size, u64 *p_double_size,
				  u64 *p_linear_size)
{
	struct devlink *devlink = priv_to_devlink(mlxsw_core);
	u32 double_size;
	int err;

	if (!MLXSW_CORE_RES_VALID(mlxsw_core, KVD_SINGLE_MIN_SIZE) ||
3154
	    !MLXSW_CORE_RES_VALID(mlxsw_core, KVD_DOUBLE_MIN_SIZE))
3155 3156 3157 3158 3159 3160 3161 3162 3163 3164 3165 3166 3167 3168 3169 3170 3171 3172 3173 3174 3175 3176 3177 3178 3179
		return -EIO;

	/* The hash part is what left of the kvd without the
	 * linear part. It is split to the single size and
	 * double size by the parts ratio from the profile.
	 * Both sizes must be a multiplications of the
	 * granularity from the profile. In case the user
	 * provided the sizes they are obtained via devlink.
	 */
	err = devlink_resource_size_get(devlink,
					MLXSW_SP_RESOURCE_KVD_LINEAR,
					p_linear_size);
	if (err)
		*p_linear_size = profile->kvd_linear_size;

	err = devlink_resource_size_get(devlink,
					MLXSW_SP_RESOURCE_KVD_HASH_DOUBLE,
					p_double_size);
	if (err) {
		double_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE) -
			      *p_linear_size;
		double_size *= profile->kvd_hash_double_parts;
		double_size /= profile->kvd_hash_double_parts +
			       profile->kvd_hash_single_parts;
		*p_double_size = rounddown(double_size,
3180
					   MLXSW_SP_KVD_GRANULARITY);
3181 3182 3183 3184 3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195 3196 3197 3198
	}

	err = devlink_resource_size_get(devlink,
					MLXSW_SP_RESOURCE_KVD_HASH_SINGLE,
					p_single_size);
	if (err)
		*p_single_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE) -
				 *p_double_size - *p_linear_size;

	/* Check results are legal. */
	if (*p_single_size < MLXSW_CORE_RES_GET(mlxsw_core, KVD_SINGLE_MIN_SIZE) ||
	    *p_double_size < MLXSW_CORE_RES_GET(mlxsw_core, KVD_DOUBLE_MIN_SIZE) ||
	    MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE) < *p_linear_size)
		return -EIO;

	return 0;
}

3199 3200 3201 3202 3203 3204 3205 3206 3207 3208 3209 3210 3211 3212 3213 3214 3215 3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238
static int
mlxsw_sp_params_acl_region_rehash_intrvl_get(struct devlink *devlink, u32 id,
					     struct devlink_param_gset_ctx *ctx)
{
	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);

	ctx->val.vu32 = mlxsw_sp_acl_region_rehash_intrvl_get(mlxsw_sp);
	return 0;
}

static int
mlxsw_sp_params_acl_region_rehash_intrvl_set(struct devlink *devlink, u32 id,
					     struct devlink_param_gset_ctx *ctx)
{
	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);

	return mlxsw_sp_acl_region_rehash_intrvl_set(mlxsw_sp, ctx->val.vu32);
}

static const struct devlink_param mlxsw_sp2_devlink_params[] = {
	DEVLINK_PARAM_DRIVER(MLXSW_DEVLINK_PARAM_ID_ACL_REGION_REHASH_INTERVAL,
			     "acl_region_rehash_interval",
			     DEVLINK_PARAM_TYPE_U32,
			     BIT(DEVLINK_PARAM_CMODE_RUNTIME),
			     mlxsw_sp_params_acl_region_rehash_intrvl_get,
			     mlxsw_sp_params_acl_region_rehash_intrvl_set,
			     NULL),
};

static int mlxsw_sp2_params_register(struct mlxsw_core *mlxsw_core)
{
	struct devlink *devlink = priv_to_devlink(mlxsw_core);
	union devlink_param_value value;
	int err;

	err = devlink_params_register(devlink, mlxsw_sp2_devlink_params,
				      ARRAY_SIZE(mlxsw_sp2_devlink_params));
	if (err)
3239
		return err;
3240 3241 3242 3243 3244 3245 3246 3247 3248 3249 3250 3251 3252 3253 3254

	value.vu32 = 0;
	devlink_param_driverinit_value_set(devlink,
					   MLXSW_DEVLINK_PARAM_ID_ACL_REGION_REHASH_INTERVAL,
					   value);
	return 0;
}

static void mlxsw_sp2_params_unregister(struct mlxsw_core *mlxsw_core)
{
	devlink_params_unregister(priv_to_devlink(mlxsw_core),
				  mlxsw_sp2_devlink_params,
				  ARRAY_SIZE(mlxsw_sp2_devlink_params));
}

3255 3256 3257 3258 3259 3260 3261 3262 3263
static void mlxsw_sp_ptp_transmitted(struct mlxsw_core *mlxsw_core,
				     struct sk_buff *skb, u8 local_port)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);

	skb_pull(skb, MLXSW_TXHDR_LEN);
	mlxsw_sp->ptp_ops->transmitted(mlxsw_sp, skb, local_port);
}

3264 3265
static struct mlxsw_driver mlxsw_sp1_driver = {
	.kind				= mlxsw_sp1_driver_name,
3266
	.priv_size			= sizeof(struct mlxsw_sp),
3267 3268
	.fw_req_rev			= &mlxsw_sp1_fw_rev,
	.fw_filename			= MLXSW_SP1_FW_FILENAME,
3269
	.init				= mlxsw_sp1_init,
3270
	.fini				= mlxsw_sp_fini,
3271
	.basic_trap_groups_set		= mlxsw_sp_basic_trap_groups_set,
3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282 3283
	.port_split			= mlxsw_sp_port_split,
	.port_unsplit			= mlxsw_sp_port_unsplit,
	.sb_pool_get			= mlxsw_sp_sb_pool_get,
	.sb_pool_set			= mlxsw_sp_sb_pool_set,
	.sb_port_pool_get		= mlxsw_sp_sb_port_pool_get,
	.sb_port_pool_set		= mlxsw_sp_sb_port_pool_set,
	.sb_tc_pool_bind_get		= mlxsw_sp_sb_tc_pool_bind_get,
	.sb_tc_pool_bind_set		= mlxsw_sp_sb_tc_pool_bind_set,
	.sb_occ_snapshot		= mlxsw_sp_sb_occ_snapshot,
	.sb_occ_max_clear		= mlxsw_sp_sb_occ_max_clear,
	.sb_occ_port_pool_get		= mlxsw_sp_sb_occ_port_pool_get,
	.sb_occ_tc_port_bind_get	= mlxsw_sp_sb_occ_tc_port_bind_get,
3284 3285 3286 3287
	.trap_init			= mlxsw_sp_trap_init,
	.trap_fini			= mlxsw_sp_trap_fini,
	.trap_action_set		= mlxsw_sp_trap_action_set,
	.trap_group_init		= mlxsw_sp_trap_group_init,
3288
	.trap_group_set			= mlxsw_sp_trap_group_set,
3289 3290 3291 3292
	.trap_policer_init		= mlxsw_sp_trap_policer_init,
	.trap_policer_fini		= mlxsw_sp_trap_policer_fini,
	.trap_policer_set		= mlxsw_sp_trap_policer_set,
	.trap_policer_counter_get	= mlxsw_sp_trap_policer_counter_get,
3293
	.txhdr_construct		= mlxsw_sp_txhdr_construct,
3294
	.resources_register		= mlxsw_sp1_resources_register,
3295
	.kvd_sizes_get			= mlxsw_sp_kvd_sizes_get,
3296
	.ptp_transmitted		= mlxsw_sp_ptp_transmitted,
3297
	.txhdr_len			= MLXSW_TXHDR_LEN,
3298 3299
	.profile			= &mlxsw_sp1_config_profile,
	.res_query_enabled		= true,
3300
	.fw_fatal_enabled		= true,
3301
	.temp_warn_enabled		= true,
3302 3303 3304 3305 3306
};

static struct mlxsw_driver mlxsw_sp2_driver = {
	.kind				= mlxsw_sp2_driver_name,
	.priv_size			= sizeof(struct mlxsw_sp),
3307 3308
	.fw_req_rev			= &mlxsw_sp2_fw_rev,
	.fw_filename			= MLXSW_SP2_FW_FILENAME,
3309 3310 3311 3312 3313 3314 3315 3316 3317 3318 3319 3320 3321 3322 3323
	.init				= mlxsw_sp2_init,
	.fini				= mlxsw_sp_fini,
	.basic_trap_groups_set		= mlxsw_sp_basic_trap_groups_set,
	.port_split			= mlxsw_sp_port_split,
	.port_unsplit			= mlxsw_sp_port_unsplit,
	.sb_pool_get			= mlxsw_sp_sb_pool_get,
	.sb_pool_set			= mlxsw_sp_sb_pool_set,
	.sb_port_pool_get		= mlxsw_sp_sb_port_pool_get,
	.sb_port_pool_set		= mlxsw_sp_sb_port_pool_set,
	.sb_tc_pool_bind_get		= mlxsw_sp_sb_tc_pool_bind_get,
	.sb_tc_pool_bind_set		= mlxsw_sp_sb_tc_pool_bind_set,
	.sb_occ_snapshot		= mlxsw_sp_sb_occ_snapshot,
	.sb_occ_max_clear		= mlxsw_sp_sb_occ_max_clear,
	.sb_occ_port_pool_get		= mlxsw_sp_sb_occ_port_pool_get,
	.sb_occ_tc_port_bind_get	= mlxsw_sp_sb_occ_tc_port_bind_get,
3324 3325 3326 3327
	.trap_init			= mlxsw_sp_trap_init,
	.trap_fini			= mlxsw_sp_trap_fini,
	.trap_action_set		= mlxsw_sp_trap_action_set,
	.trap_group_init		= mlxsw_sp_trap_group_init,
3328
	.trap_group_set			= mlxsw_sp_trap_group_set,
3329 3330 3331 3332
	.trap_policer_init		= mlxsw_sp_trap_policer_init,
	.trap_policer_fini		= mlxsw_sp_trap_policer_fini,
	.trap_policer_set		= mlxsw_sp_trap_policer_set,
	.trap_policer_counter_get	= mlxsw_sp_trap_policer_counter_get,
3333 3334
	.txhdr_construct		= mlxsw_sp_txhdr_construct,
	.resources_register		= mlxsw_sp2_resources_register,
3335 3336
	.params_register		= mlxsw_sp2_params_register,
	.params_unregister		= mlxsw_sp2_params_unregister,
3337
	.ptp_transmitted		= mlxsw_sp_ptp_transmitted,
3338 3339
	.txhdr_len			= MLXSW_TXHDR_LEN,
	.profile			= &mlxsw_sp2_config_profile,
3340
	.res_query_enabled		= true,
3341
	.fw_fatal_enabled		= true,
3342
	.temp_warn_enabled		= true,
3343 3344
};

3345 3346 3347
static struct mlxsw_driver mlxsw_sp3_driver = {
	.kind				= mlxsw_sp3_driver_name,
	.priv_size			= sizeof(struct mlxsw_sp),
3348 3349
	.fw_req_rev			= &mlxsw_sp3_fw_rev,
	.fw_filename			= MLXSW_SP3_FW_FILENAME,
3350
	.init				= mlxsw_sp3_init,
3351 3352 3353 3354 3355 3356 3357 3358 3359 3360 3361 3362 3363 3364
	.fini				= mlxsw_sp_fini,
	.basic_trap_groups_set		= mlxsw_sp_basic_trap_groups_set,
	.port_split			= mlxsw_sp_port_split,
	.port_unsplit			= mlxsw_sp_port_unsplit,
	.sb_pool_get			= mlxsw_sp_sb_pool_get,
	.sb_pool_set			= mlxsw_sp_sb_pool_set,
	.sb_port_pool_get		= mlxsw_sp_sb_port_pool_get,
	.sb_port_pool_set		= mlxsw_sp_sb_port_pool_set,
	.sb_tc_pool_bind_get		= mlxsw_sp_sb_tc_pool_bind_get,
	.sb_tc_pool_bind_set		= mlxsw_sp_sb_tc_pool_bind_set,
	.sb_occ_snapshot		= mlxsw_sp_sb_occ_snapshot,
	.sb_occ_max_clear		= mlxsw_sp_sb_occ_max_clear,
	.sb_occ_port_pool_get		= mlxsw_sp_sb_occ_port_pool_get,
	.sb_occ_tc_port_bind_get	= mlxsw_sp_sb_occ_tc_port_bind_get,
3365 3366 3367 3368
	.trap_init			= mlxsw_sp_trap_init,
	.trap_fini			= mlxsw_sp_trap_fini,
	.trap_action_set		= mlxsw_sp_trap_action_set,
	.trap_group_init		= mlxsw_sp_trap_group_init,
3369
	.trap_group_set			= mlxsw_sp_trap_group_set,
3370 3371 3372 3373
	.trap_policer_init		= mlxsw_sp_trap_policer_init,
	.trap_policer_fini		= mlxsw_sp_trap_policer_fini,
	.trap_policer_set		= mlxsw_sp_trap_policer_set,
	.trap_policer_counter_get	= mlxsw_sp_trap_policer_counter_get,
3374 3375 3376 3377 3378 3379 3380 3381
	.txhdr_construct		= mlxsw_sp_txhdr_construct,
	.resources_register		= mlxsw_sp2_resources_register,
	.params_register		= mlxsw_sp2_params_register,
	.params_unregister		= mlxsw_sp2_params_unregister,
	.ptp_transmitted		= mlxsw_sp_ptp_transmitted,
	.txhdr_len			= MLXSW_TXHDR_LEN,
	.profile			= &mlxsw_sp2_config_profile,
	.res_query_enabled		= true,
3382
	.fw_fatal_enabled		= true,
3383
	.temp_warn_enabled		= true,
3384 3385
};

3386
bool mlxsw_sp_port_dev_check(const struct net_device *dev)
3387 3388 3389 3390
{
	return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
}

3391 3392
static int mlxsw_sp_lower_dev_walk(struct net_device *lower_dev,
				   struct netdev_nested_priv *priv)
D
David Ahern 已提交
3393 3394 3395 3396
{
	int ret = 0;

	if (mlxsw_sp_port_dev_check(lower_dev)) {
3397
		priv->data = (void *)netdev_priv(lower_dev);
D
David Ahern 已提交
3398 3399 3400 3401 3402 3403
		ret = 1;
	}

	return ret;
}

3404
struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3405
{
3406 3407 3408
	struct netdev_nested_priv priv = {
		.data = NULL,
	};
3409 3410 3411 3412

	if (mlxsw_sp_port_dev_check(dev))
		return netdev_priv(dev);

3413
	netdev_walk_all_lower_dev(dev, mlxsw_sp_lower_dev_walk, &priv);
D
David Ahern 已提交
3414

3415
	return (struct mlxsw_sp_port *)priv.data;
3416 3417
}

3418
struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3419 3420 3421 3422 3423 3424 3425
{
	struct mlxsw_sp_port *mlxsw_sp_port;

	mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
	return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
}

3426
struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3427
{
3428 3429 3430
	struct netdev_nested_priv priv = {
		.data = NULL,
	};
3431 3432 3433 3434

	if (mlxsw_sp_port_dev_check(dev))
		return netdev_priv(dev);

3435
	netdev_walk_all_lower_dev_rcu(dev, mlxsw_sp_lower_dev_walk,
3436
				      &priv);
D
David Ahern 已提交
3437

3438
	return (struct mlxsw_sp_port *)priv.data;
3439 3440 3441 3442 3443 3444 3445 3446 3447 3448 3449 3450 3451 3452 3453 3454 3455 3456 3457
}

struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
{
	struct mlxsw_sp_port *mlxsw_sp_port;

	rcu_read_lock();
	mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
	if (mlxsw_sp_port)
		dev_hold(mlxsw_sp_port->dev);
	rcu_read_unlock();
	return mlxsw_sp_port;
}

void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
{
	dev_put(mlxsw_sp_port->dev);
}

3458 3459 3460 3461 3462 3463 3464 3465 3466 3467 3468 3469 3470 3471 3472 3473 3474 3475 3476
static void
mlxsw_sp_port_lag_uppers_cleanup(struct mlxsw_sp_port *mlxsw_sp_port,
				 struct net_device *lag_dev)
{
	struct net_device *br_dev = netdev_master_upper_dev_get(lag_dev);
	struct net_device *upper_dev;
	struct list_head *iter;

	if (netif_is_bridge_port(lag_dev))
		mlxsw_sp_port_bridge_leave(mlxsw_sp_port, lag_dev, br_dev);

	netdev_for_each_upper_dev_rcu(lag_dev, upper_dev, iter) {
		if (!netif_is_bridge_port(upper_dev))
			continue;
		br_dev = netdev_master_upper_dev_get(upper_dev);
		mlxsw_sp_port_bridge_leave(mlxsw_sp_port, upper_dev, br_dev);
	}
}

3477 3478 3479 3480 3481 3482 3483 3484 3485 3486 3487 3488 3489 3490 3491 3492 3493 3494 3495 3496 3497 3498 3499 3500 3501 3502 3503 3504 3505 3506 3507 3508 3509 3510 3511 3512 3513 3514 3515 3516 3517 3518 3519 3520 3521 3522 3523 3524 3525 3526 3527 3528 3529 3530 3531 3532 3533 3534 3535 3536 3537 3538 3539 3540 3541 3542
static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
{
	char sldr_pl[MLXSW_REG_SLDR_LEN];

	mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
}

static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
{
	char sldr_pl[MLXSW_REG_SLDR_LEN];

	mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
}

static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
				     u16 lag_id, u8 port_index)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char slcor_pl[MLXSW_REG_SLCOR_LEN];

	mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
				      lag_id, port_index);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
}

static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
					u16 lag_id)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char slcor_pl[MLXSW_REG_SLCOR_LEN];

	mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
					 lag_id);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
}

static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
					u16 lag_id)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char slcor_pl[MLXSW_REG_SLCOR_LEN];

	mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
					lag_id);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
}

static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
					 u16 lag_id)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char slcor_pl[MLXSW_REG_SLCOR_LEN];

	mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
					 lag_id);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
}

static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
				  struct net_device *lag_dev,
				  u16 *p_lag_id)
{
	struct mlxsw_sp_upper *lag;
	int free_lag_id = -1;
J
Jiri Pirko 已提交
3543
	u64 max_lag;
3544 3545
	int i;

J
Jiri Pirko 已提交
3546 3547
	max_lag = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG);
	for (i = 0; i < max_lag; i++) {
3548 3549 3550 3551 3552 3553 3554 3555 3556 3557 3558 3559 3560 3561 3562 3563 3564 3565 3566
		lag = mlxsw_sp_lag_get(mlxsw_sp, i);
		if (lag->ref_count) {
			if (lag->dev == lag_dev) {
				*p_lag_id = i;
				return 0;
			}
		} else if (free_lag_id < 0) {
			free_lag_id = i;
		}
	}
	if (free_lag_id < 0)
		return -EBUSY;
	*p_lag_id = free_lag_id;
	return 0;
}

static bool
mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
			  struct net_device *lag_dev,
3567 3568
			  struct netdev_lag_upper_info *lag_upper_info,
			  struct netlink_ext_ack *extack)
3569 3570 3571
{
	u16 lag_id;

3572
	if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0) {
3573
		NL_SET_ERR_MSG_MOD(extack, "Exceeded number of supported LAG devices");
3574
		return false;
3575 3576
	}
	if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH) {
3577
		NL_SET_ERR_MSG_MOD(extack, "LAG device using unsupported Tx type");
3578
		return false;
3579
	}
3580 3581 3582 3583 3584 3585
	return true;
}

static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
				       u16 lag_id, u8 *p_port_index)
{
J
Jiri Pirko 已提交
3586
	u64 max_lag_members;
3587 3588
	int i;

J
Jiri Pirko 已提交
3589 3590 3591
	max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
					     MAX_LAG_MEMBERS);
	for (i = 0; i < max_lag_members; i++) {
3592 3593 3594 3595 3596 3597 3598 3599 3600
		if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
			*p_port_index = i;
			return 0;
		}
	}
	return -EBUSY;
}

static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3601 3602
				  struct net_device *lag_dev,
				  struct netlink_ext_ack *extack)
3603 3604 3605 3606 3607 3608 3609 3610 3611 3612 3613 3614 3615 3616 3617 3618 3619 3620 3621 3622 3623 3624 3625 3626 3627 3628 3629 3630 3631 3632
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	struct mlxsw_sp_upper *lag;
	u16 lag_id;
	u8 port_index;
	int err;

	err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
	if (err)
		return err;
	lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
	if (!lag->ref_count) {
		err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
		if (err)
			return err;
		lag->dev = lag_dev;
	}

	err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
	if (err)
		return err;
	err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
	if (err)
		goto err_col_port_add;

	mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
				   mlxsw_sp_port->local_port);
	mlxsw_sp_port->lag_id = lag_id;
	mlxsw_sp_port->lagged = 1;
	lag->ref_count++;
3633

3634
	/* Port is no longer usable as a router interface */
3635 3636
	if (mlxsw_sp_port->default_vlan->fid)
		mlxsw_sp_port_vlan_router_leave(mlxsw_sp_port->default_vlan);
3637

3638 3639 3640 3641 3642 3643
	/* Join a router interface configured on the LAG, if exists */
	err = mlxsw_sp_port_vlan_router_join(mlxsw_sp_port->default_vlan,
					     lag_dev, extack);
	if (err)
		goto err_router_join;

3644 3645
	return 0;

3646 3647 3648 3649 3650 3651
err_router_join:
	lag->ref_count--;
	mlxsw_sp_port->lagged = 0;
	mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
				     mlxsw_sp_port->local_port);
	mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
3652 3653 3654 3655 3656 3657
err_col_port_add:
	if (!lag->ref_count)
		mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
	return err;
}

3658 3659
static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
				    struct net_device *lag_dev)
3660 3661 3662
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	u16 lag_id = mlxsw_sp_port->lag_id;
3663
	struct mlxsw_sp_upper *lag;
3664 3665

	if (!mlxsw_sp_port->lagged)
3666
		return;
3667 3668 3669
	lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
	WARN_ON(lag->ref_count == 0);

3670
	mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
3671

3672
	/* Any VLANs configured on the port are no longer valid */
3673 3674
	mlxsw_sp_port_vlan_flush(mlxsw_sp_port, false);
	mlxsw_sp_port_vlan_cleanup(mlxsw_sp_port->default_vlan);
3675 3676 3677 3678
	/* Make the LAG and its directly linked uppers leave bridges they
	 * are memeber in
	 */
	mlxsw_sp_port_lag_uppers_cleanup(mlxsw_sp_port, lag_dev);
3679

3680
	if (lag->ref_count == 1)
3681
		mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
3682 3683 3684 3685 3686

	mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
				     mlxsw_sp_port->local_port);
	mlxsw_sp_port->lagged = 0;
	lag->ref_count--;
3687

3688
	/* Make sure untagged frames are allowed to ingress */
3689 3690
	mlxsw_sp_port_pvid_set(mlxsw_sp_port, MLXSW_SP_DEFAULT_VID,
			       ETH_P_8021Q);
3691 3692
}

3693 3694 3695 3696 3697 3698 3699 3700 3701 3702 3703 3704 3705 3706 3707 3708 3709 3710 3711 3712 3713 3714
static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
				      u16 lag_id)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char sldr_pl[MLXSW_REG_SLDR_LEN];

	mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
					 mlxsw_sp_port->local_port);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
}

static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
					 u16 lag_id)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	char sldr_pl[MLXSW_REG_SLDR_LEN];

	mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
					    mlxsw_sp_port->local_port);
	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
}

3715 3716
static int
mlxsw_sp_port_lag_col_dist_enable(struct mlxsw_sp_port *mlxsw_sp_port)
3717
{
3718 3719 3720 3721 3722 3723 3724 3725 3726 3727 3728 3729 3730 3731 3732 3733 3734 3735 3736 3737 3738 3739 3740 3741 3742 3743 3744 3745 3746 3747 3748 3749 3750 3751 3752 3753 3754 3755
	int err;

	err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port,
					   mlxsw_sp_port->lag_id);
	if (err)
		return err;

	err = mlxsw_sp_lag_dist_port_add(mlxsw_sp_port, mlxsw_sp_port->lag_id);
	if (err)
		goto err_dist_port_add;

	return 0;

err_dist_port_add:
	mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, mlxsw_sp_port->lag_id);
	return err;
}

static int
mlxsw_sp_port_lag_col_dist_disable(struct mlxsw_sp_port *mlxsw_sp_port)
{
	int err;

	err = mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
					    mlxsw_sp_port->lag_id);
	if (err)
		return err;

	err = mlxsw_sp_lag_col_port_disable(mlxsw_sp_port,
					    mlxsw_sp_port->lag_id);
	if (err)
		goto err_col_port_disable;

	return 0;

err_col_port_disable:
	mlxsw_sp_lag_dist_port_add(mlxsw_sp_port, mlxsw_sp_port->lag_id);
	return err;
3756 3757 3758 3759 3760
}

static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
				     struct netdev_lag_lower_state_info *info)
{
3761 3762 3763 3764
	if (info->tx_enabled)
		return mlxsw_sp_port_lag_col_dist_enable(mlxsw_sp_port);
	else
		return mlxsw_sp_port_lag_col_dist_disable(mlxsw_sp_port);
3765 3766
}

3767 3768 3769 3770 3771 3772 3773 3774 3775 3776 3777 3778 3779 3780 3781 3782 3783 3784 3785 3786 3787 3788 3789 3790 3791 3792 3793
static int mlxsw_sp_port_stp_set(struct mlxsw_sp_port *mlxsw_sp_port,
				 bool enable)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	enum mlxsw_reg_spms_state spms_state;
	char *spms_pl;
	u16 vid;
	int err;

	spms_state = enable ? MLXSW_REG_SPMS_STATE_FORWARDING :
			      MLXSW_REG_SPMS_STATE_DISCARDING;

	spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
	if (!spms_pl)
		return -ENOMEM;
	mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);

	for (vid = 0; vid < VLAN_N_VID; vid++)
		mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);

	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
	kfree(spms_pl);
	return err;
}

static int mlxsw_sp_port_ovs_join(struct mlxsw_sp_port *mlxsw_sp_port)
{
3794
	u16 vid = 1;
3795 3796
	int err;

3797
	err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
3798 3799
	if (err)
		return err;
3800 3801 3802
	err = mlxsw_sp_port_stp_set(mlxsw_sp_port, true);
	if (err)
		goto err_port_stp_set;
3803
	err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, 1, VLAN_N_VID - 2,
3804 3805 3806
				     true, false);
	if (err)
		goto err_port_vlan_set;
3807 3808 3809 3810 3811 3812 3813 3814

	for (; vid <= VLAN_N_VID - 1; vid++) {
		err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_port,
						     vid, false);
		if (err)
			goto err_vid_learning_set;
	}

3815 3816
	return 0;

3817 3818 3819
err_vid_learning_set:
	for (vid--; vid >= 1; vid--)
		mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, true);
3820 3821
err_port_vlan_set:
	mlxsw_sp_port_stp_set(mlxsw_sp_port, false);
3822 3823
err_port_stp_set:
	mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
3824 3825 3826 3827 3828
	return err;
}

static void mlxsw_sp_port_ovs_leave(struct mlxsw_sp_port *mlxsw_sp_port)
{
3829 3830 3831 3832 3833 3834
	u16 vid;

	for (vid = VLAN_N_VID - 1; vid >= 1; vid--)
		mlxsw_sp_port_vid_learning_set(mlxsw_sp_port,
					       vid, true);

3835
	mlxsw_sp_port_vlan_set(mlxsw_sp_port, 1, VLAN_N_VID - 2,
3836 3837
			       false, false);
	mlxsw_sp_port_stp_set(mlxsw_sp_port, false);
3838
	mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
3839 3840
}

3841 3842 3843 3844 3845 3846 3847 3848 3849 3850 3851 3852 3853 3854
static bool mlxsw_sp_bridge_has_multiple_vxlans(struct net_device *br_dev)
{
	unsigned int num_vxlans = 0;
	struct net_device *dev;
	struct list_head *iter;

	netdev_for_each_lower_dev(br_dev, dev, iter) {
		if (netif_is_vxlan(dev))
			num_vxlans++;
	}

	return num_vxlans > 1;
}

3855 3856 3857 3858 3859 3860 3861 3862 3863 3864 3865 3866 3867 3868 3869 3870 3871 3872 3873 3874 3875 3876 3877 3878
static bool mlxsw_sp_bridge_vxlan_vlan_is_valid(struct net_device *br_dev)
{
	DECLARE_BITMAP(vlans, VLAN_N_VID) = {0};
	struct net_device *dev;
	struct list_head *iter;

	netdev_for_each_lower_dev(br_dev, dev, iter) {
		u16 pvid;
		int err;

		if (!netif_is_vxlan(dev))
			continue;

		err = mlxsw_sp_vxlan_mapped_vid(dev, &pvid);
		if (err || !pvid)
			continue;

		if (test_and_set_bit(pvid, vlans))
			return false;
	}

	return true;
}

3879 3880 3881 3882 3883 3884 3885 3886
static bool mlxsw_sp_bridge_vxlan_is_valid(struct net_device *br_dev,
					   struct netlink_ext_ack *extack)
{
	if (br_multicast_enabled(br_dev)) {
		NL_SET_ERR_MSG_MOD(extack, "Multicast can not be enabled on a bridge with a VxLAN device");
		return false;
	}

3887 3888 3889
	if (!br_vlan_enabled(br_dev) &&
	    mlxsw_sp_bridge_has_multiple_vxlans(br_dev)) {
		NL_SET_ERR_MSG_MOD(extack, "Multiple VxLAN devices are not supported in a VLAN-unaware bridge");
3890 3891 3892
		return false;
	}

3893 3894 3895
	if (br_vlan_enabled(br_dev) &&
	    !mlxsw_sp_bridge_vxlan_vlan_is_valid(br_dev)) {
		NL_SET_ERR_MSG_MOD(extack, "Multiple VxLAN devices cannot have the same VLAN as PVID and egress untagged");
3896 3897 3898 3899 3900 3901
		return false;
	}

	return true;
}

3902 3903
static int mlxsw_sp_netdevice_port_upper_event(struct net_device *lower_dev,
					       struct net_device *dev,
3904
					       unsigned long event, void *ptr)
3905 3906 3907
{
	struct netdev_notifier_changeupper_info *info;
	struct mlxsw_sp_port *mlxsw_sp_port;
3908
	struct netlink_ext_ack *extack;
3909 3910
	struct net_device *upper_dev;
	struct mlxsw_sp *mlxsw_sp;
3911
	int err = 0;
3912
	u16 proto;
3913 3914 3915 3916

	mlxsw_sp_port = netdev_priv(dev);
	mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	info = ptr;
3917
	extack = netdev_notifier_info_to_extack(&info->info);
3918 3919 3920 3921

	switch (event) {
	case NETDEV_PRECHANGEUPPER:
		upper_dev = info->upper_dev;
3922 3923
		if (!is_vlan_dev(upper_dev) &&
		    !netif_is_lag_master(upper_dev) &&
3924
		    !netif_is_bridge_master(upper_dev) &&
3925 3926
		    !netif_is_ovs_master(upper_dev) &&
		    !netif_is_macvlan(upper_dev)) {
3927
			NL_SET_ERR_MSG_MOD(extack, "Unknown upper device type");
3928
			return -EINVAL;
3929
		}
3930
		if (!info->linking)
3931
			break;
3932 3933 3934 3935 3936
		if (netif_is_bridge_master(upper_dev) &&
		    !mlxsw_sp_bridge_device_is_offloaded(mlxsw_sp, upper_dev) &&
		    mlxsw_sp_bridge_has_vxlan(upper_dev) &&
		    !mlxsw_sp_bridge_vxlan_is_valid(upper_dev, extack))
			return -EOPNOTSUPP;
3937 3938 3939 3940
		if (netdev_has_any_upper_dev(upper_dev) &&
		    (!netif_is_bridge_master(upper_dev) ||
		     !mlxsw_sp_bridge_device_is_offloaded(mlxsw_sp,
							  upper_dev))) {
3941
			NL_SET_ERR_MSG_MOD(extack, "Enslaving a port to a device that already has an upper device is not supported");
3942
			return -EINVAL;
3943
		}
3944 3945
		if (netif_is_lag_master(upper_dev) &&
		    !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
3946
					       info->upper_info, extack))
3947
			return -EINVAL;
3948
		if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev)) {
3949
			NL_SET_ERR_MSG_MOD(extack, "Master device is a LAG master and this device has a VLAN");
3950
			return -EINVAL;
3951
		}
3952
		if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
3953
		    !netif_is_lag_master(vlan_dev_real_dev(upper_dev))) {
3954
			NL_SET_ERR_MSG_MOD(extack, "Can not put a VLAN on a LAG port");
3955
			return -EINVAL;
3956
		}
3957
		if (netif_is_macvlan(upper_dev) &&
3958
		    !mlxsw_sp_rif_exists(mlxsw_sp, lower_dev)) {
3959 3960 3961
			NL_SET_ERR_MSG_MOD(extack, "macvlan is only supported on top of router interfaces");
			return -EOPNOTSUPP;
		}
3962
		if (netif_is_ovs_master(upper_dev) && vlan_uses_dev(dev)) {
3963
			NL_SET_ERR_MSG_MOD(extack, "Master device is an OVS master and this device has a VLAN");
3964
			return -EINVAL;
3965 3966
		}
		if (netif_is_ovs_port(dev) && is_vlan_dev(upper_dev)) {
3967
			NL_SET_ERR_MSG_MOD(extack, "Can not put a VLAN on an OVS port");
3968
			return -EINVAL;
3969
		}
3970 3971 3972 3973 3974 3975 3976 3977 3978 3979 3980 3981 3982 3983 3984 3985 3986 3987 3988 3989 3990 3991 3992 3993 3994 3995 3996 3997 3998 3999
		if (netif_is_bridge_master(upper_dev)) {
			br_vlan_get_proto(upper_dev, &proto);
			if (br_vlan_enabled(upper_dev) &&
			    proto != ETH_P_8021Q && proto != ETH_P_8021AD) {
				NL_SET_ERR_MSG_MOD(extack, "Enslaving a port to a bridge with unknown VLAN protocol is not supported");
				return -EOPNOTSUPP;
			}
			if (vlan_uses_dev(lower_dev) &&
			    br_vlan_enabled(upper_dev) &&
			    proto == ETH_P_8021AD) {
				NL_SET_ERR_MSG_MOD(extack, "Enslaving a port that already has a VLAN upper to an 802.1ad bridge is not supported");
				return -EOPNOTSUPP;
			}
		}
		if (netif_is_bridge_port(lower_dev) && is_vlan_dev(upper_dev)) {
			struct net_device *br_dev = netdev_master_upper_dev_get(lower_dev);

			if (br_vlan_enabled(br_dev)) {
				br_vlan_get_proto(br_dev, &proto);
				if (proto == ETH_P_8021AD) {
					NL_SET_ERR_MSG_MOD(extack, "VLAN uppers are not supported on a port enslaved to an 802.1ad bridge");
					return -EOPNOTSUPP;
				}
			}
		}
		if (is_vlan_dev(upper_dev) &&
		    ntohs(vlan_dev_vlan_proto(upper_dev)) != ETH_P_8021Q) {
			NL_SET_ERR_MSG_MOD(extack, "VLAN uppers are only supported with 802.1q VLAN protocol");
			return -EOPNOTSUPP;
		}
4000 4001 4002
		break;
	case NETDEV_CHANGEUPPER:
		upper_dev = info->upper_dev;
4003
		if (netif_is_bridge_master(upper_dev)) {
4004 4005
			if (info->linking)
				err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4006
								lower_dev,
4007 4008
								upper_dev,
								extack);
4009
			else
4010 4011 4012
				mlxsw_sp_port_bridge_leave(mlxsw_sp_port,
							   lower_dev,
							   upper_dev);
4013
		} else if (netif_is_lag_master(upper_dev)) {
4014
			if (info->linking) {
4015
				err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4016
							     upper_dev, extack);
4017
			} else {
4018
				mlxsw_sp_port_lag_col_dist_disable(mlxsw_sp_port);
4019 4020
				mlxsw_sp_port_lag_leave(mlxsw_sp_port,
							upper_dev);
4021
			}
4022 4023 4024 4025 4026
		} else if (netif_is_ovs_master(upper_dev)) {
			if (info->linking)
				err = mlxsw_sp_port_ovs_join(mlxsw_sp_port);
			else
				mlxsw_sp_port_ovs_leave(mlxsw_sp_port);
4027 4028 4029
		} else if (netif_is_macvlan(upper_dev)) {
			if (!info->linking)
				mlxsw_sp_rif_macvlan_del(mlxsw_sp, upper_dev);
4030 4031 4032 4033 4034 4035 4036 4037 4038 4039
		} else if (is_vlan_dev(upper_dev)) {
			struct net_device *br_dev;

			if (!netif_is_bridge_port(upper_dev))
				break;
			if (info->linking)
				break;
			br_dev = netdev_master_upper_dev_get(upper_dev);
			mlxsw_sp_port_bridge_leave(mlxsw_sp_port, upper_dev,
						   br_dev);
4040 4041 4042 4043
		}
		break;
	}

4044
	return err;
4045 4046
}

4047 4048 4049 4050 4051 4052 4053 4054 4055 4056 4057 4058 4059 4060 4061 4062 4063 4064 4065 4066 4067
static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
					       unsigned long event, void *ptr)
{
	struct netdev_notifier_changelowerstate_info *info;
	struct mlxsw_sp_port *mlxsw_sp_port;
	int err;

	mlxsw_sp_port = netdev_priv(dev);
	info = ptr;

	switch (event) {
	case NETDEV_CHANGELOWERSTATE:
		if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
			err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
							info->lower_state_info);
			if (err)
				netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
		}
		break;
	}

4068
	return 0;
4069 4070
}

4071 4072
static int mlxsw_sp_netdevice_port_event(struct net_device *lower_dev,
					 struct net_device *port_dev,
4073 4074 4075 4076 4077
					 unsigned long event, void *ptr)
{
	switch (event) {
	case NETDEV_PRECHANGEUPPER:
	case NETDEV_CHANGEUPPER:
4078 4079
		return mlxsw_sp_netdevice_port_upper_event(lower_dev, port_dev,
							   event, ptr);
4080
	case NETDEV_CHANGELOWERSTATE:
4081 4082
		return mlxsw_sp_netdevice_port_lower_event(port_dev, event,
							   ptr);
4083 4084
	}

4085
	return 0;
4086 4087
}

4088 4089 4090 4091 4092 4093 4094 4095 4096
static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
					unsigned long event, void *ptr)
{
	struct net_device *dev;
	struct list_head *iter;
	int ret;

	netdev_for_each_lower_dev(lag_dev, dev, iter) {
		if (mlxsw_sp_port_dev_check(dev)) {
4097 4098
			ret = mlxsw_sp_netdevice_port_event(lag_dev, dev, event,
							    ptr);
4099
			if (ret)
4100 4101 4102 4103
				return ret;
		}
	}

4104
	return 0;
4105 4106
}

4107 4108 4109 4110
static int mlxsw_sp_netdevice_port_vlan_event(struct net_device *vlan_dev,
					      struct net_device *dev,
					      unsigned long event, void *ptr,
					      u16 vid)
4111 4112
{
	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4113
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4114
	struct netdev_notifier_changeupper_info *info = ptr;
4115
	struct netlink_ext_ack *extack;
4116
	struct net_device *upper_dev;
4117
	int err = 0;
4118

4119 4120
	extack = netdev_notifier_info_to_extack(&info->info);

4121 4122 4123
	switch (event) {
	case NETDEV_PRECHANGEUPPER:
		upper_dev = info->upper_dev;
4124 4125 4126
		if (!netif_is_bridge_master(upper_dev) &&
		    !netif_is_macvlan(upper_dev)) {
			NL_SET_ERR_MSG_MOD(extack, "Unknown upper device type");
4127
			return -EINVAL;
4128
		}
4129 4130
		if (!info->linking)
			break;
4131 4132 4133 4134 4135
		if (netif_is_bridge_master(upper_dev) &&
		    !mlxsw_sp_bridge_device_is_offloaded(mlxsw_sp, upper_dev) &&
		    mlxsw_sp_bridge_has_vxlan(upper_dev) &&
		    !mlxsw_sp_bridge_vxlan_is_valid(upper_dev, extack))
			return -EOPNOTSUPP;
4136 4137 4138 4139
		if (netdev_has_any_upper_dev(upper_dev) &&
		    (!netif_is_bridge_master(upper_dev) ||
		     !mlxsw_sp_bridge_device_is_offloaded(mlxsw_sp,
							  upper_dev))) {
4140
			NL_SET_ERR_MSG_MOD(extack, "Enslaving a port to a device that already has an upper device is not supported");
4141
			return -EINVAL;
4142
		}
4143
		if (netif_is_macvlan(upper_dev) &&
4144
		    !mlxsw_sp_rif_exists(mlxsw_sp, vlan_dev)) {
4145 4146 4147
			NL_SET_ERR_MSG_MOD(extack, "macvlan is only supported on top of router interfaces");
			return -EOPNOTSUPP;
		}
4148 4149 4150
		break;
	case NETDEV_CHANGEUPPER:
		upper_dev = info->upper_dev;
4151 4152
		if (netif_is_bridge_master(upper_dev)) {
			if (info->linking)
4153 4154
				err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
								vlan_dev,
4155 4156
								upper_dev,
								extack);
4157
			else
4158 4159 4160
				mlxsw_sp_port_bridge_leave(mlxsw_sp_port,
							   vlan_dev,
							   upper_dev);
4161 4162 4163
		} else if (netif_is_macvlan(upper_dev)) {
			if (!info->linking)
				mlxsw_sp_rif_macvlan_del(mlxsw_sp, upper_dev);
4164
		} else {
4165 4166
			err = -EINVAL;
			WARN_ON(1);
4167
		}
4168
		break;
4169 4170
	}

4171
	return err;
4172 4173
}

4174 4175 4176 4177
static int mlxsw_sp_netdevice_lag_port_vlan_event(struct net_device *vlan_dev,
						  struct net_device *lag_dev,
						  unsigned long event,
						  void *ptr, u16 vid)
4178 4179 4180 4181 4182 4183 4184
{
	struct net_device *dev;
	struct list_head *iter;
	int ret;

	netdev_for_each_lower_dev(lag_dev, dev, iter) {
		if (mlxsw_sp_port_dev_check(dev)) {
4185 4186 4187
			ret = mlxsw_sp_netdevice_port_vlan_event(vlan_dev, dev,
								 event, ptr,
								 vid);
4188
			if (ret)
4189 4190 4191 4192
				return ret;
		}
	}

4193
	return 0;
4194 4195
}

4196 4197 4198 4199 4200 4201 4202 4203 4204 4205 4206 4207 4208 4209 4210 4211 4212 4213 4214 4215 4216 4217 4218 4219 4220
static int mlxsw_sp_netdevice_bridge_vlan_event(struct net_device *vlan_dev,
						struct net_device *br_dev,
						unsigned long event, void *ptr,
						u16 vid)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
	struct netdev_notifier_changeupper_info *info = ptr;
	struct netlink_ext_ack *extack;
	struct net_device *upper_dev;

	if (!mlxsw_sp)
		return 0;

	extack = netdev_notifier_info_to_extack(&info->info);

	switch (event) {
	case NETDEV_PRECHANGEUPPER:
		upper_dev = info->upper_dev;
		if (!netif_is_macvlan(upper_dev)) {
			NL_SET_ERR_MSG_MOD(extack, "Unknown upper device type");
			return -EOPNOTSUPP;
		}
		if (!info->linking)
			break;
		if (netif_is_macvlan(upper_dev) &&
4221
		    !mlxsw_sp_rif_exists(mlxsw_sp, vlan_dev)) {
4222 4223 4224 4225 4226 4227 4228 4229 4230 4231 4232 4233 4234 4235 4236 4237
			NL_SET_ERR_MSG_MOD(extack, "macvlan is only supported on top of router interfaces");
			return -EOPNOTSUPP;
		}
		break;
	case NETDEV_CHANGEUPPER:
		upper_dev = info->upper_dev;
		if (info->linking)
			break;
		if (netif_is_macvlan(upper_dev))
			mlxsw_sp_rif_macvlan_del(mlxsw_sp, upper_dev);
		break;
	}

	return 0;
}

4238 4239 4240 4241 4242 4243
static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
					 unsigned long event, void *ptr)
{
	struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
	u16 vid = vlan_dev_vlan_id(vlan_dev);

4244
	if (mlxsw_sp_port_dev_check(real_dev))
4245 4246
		return mlxsw_sp_netdevice_port_vlan_event(vlan_dev, real_dev,
							  event, ptr, vid);
4247
	else if (netif_is_lag_master(real_dev))
4248 4249 4250
		return mlxsw_sp_netdevice_lag_port_vlan_event(vlan_dev,
							      real_dev, event,
							      ptr, vid);
4251 4252 4253
	else if (netif_is_bridge_master(real_dev))
		return mlxsw_sp_netdevice_bridge_vlan_event(vlan_dev, real_dev,
							    event, ptr, vid);
4254

4255
	return 0;
4256 4257
}

4258 4259 4260 4261 4262 4263 4264
static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
					   unsigned long event, void *ptr)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(br_dev);
	struct netdev_notifier_changeupper_info *info = ptr;
	struct netlink_ext_ack *extack;
	struct net_device *upper_dev;
4265
	u16 proto;
4266 4267 4268 4269 4270 4271 4272 4273 4274 4275 4276 4277 4278 4279 4280

	if (!mlxsw_sp)
		return 0;

	extack = netdev_notifier_info_to_extack(&info->info);

	switch (event) {
	case NETDEV_PRECHANGEUPPER:
		upper_dev = info->upper_dev;
		if (!is_vlan_dev(upper_dev) && !netif_is_macvlan(upper_dev)) {
			NL_SET_ERR_MSG_MOD(extack, "Unknown upper device type");
			return -EOPNOTSUPP;
		}
		if (!info->linking)
			break;
4281 4282 4283 4284 4285 4286 4287 4288 4289 4290 4291 4292
		if (br_vlan_enabled(br_dev)) {
			br_vlan_get_proto(br_dev, &proto);
			if (proto == ETH_P_8021AD) {
				NL_SET_ERR_MSG_MOD(extack, "Uppers are not supported on top of an 802.1ad bridge");
				return -EOPNOTSUPP;
			}
		}
		if (is_vlan_dev(upper_dev) &&
		    ntohs(vlan_dev_vlan_proto(upper_dev)) != ETH_P_8021Q) {
			NL_SET_ERR_MSG_MOD(extack, "VLAN uppers are only supported with 802.1q VLAN protocol");
			return -EOPNOTSUPP;
		}
4293
		if (netif_is_macvlan(upper_dev) &&
4294
		    !mlxsw_sp_rif_exists(mlxsw_sp, br_dev)) {
4295 4296 4297 4298 4299
			NL_SET_ERR_MSG_MOD(extack, "macvlan is only supported on top of router interfaces");
			return -EOPNOTSUPP;
		}
		break;
	case NETDEV_CHANGEUPPER:
4300 4301 4302
		upper_dev = info->upper_dev;
		if (info->linking)
			break;
4303 4304
		if (is_vlan_dev(upper_dev))
			mlxsw_sp_rif_destroy_by_dev(mlxsw_sp, upper_dev);
4305 4306
		if (netif_is_macvlan(upper_dev))
			mlxsw_sp_rif_macvlan_del(mlxsw_sp, upper_dev);
4307 4308 4309 4310 4311 4312 4313 4314 4315 4316 4317 4318 4319 4320 4321 4322 4323 4324 4325 4326 4327 4328 4329 4330
		break;
	}

	return 0;
}

static int mlxsw_sp_netdevice_macvlan_event(struct net_device *macvlan_dev,
					    unsigned long event, void *ptr)
{
	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(macvlan_dev);
	struct netdev_notifier_changeupper_info *info = ptr;
	struct netlink_ext_ack *extack;

	if (!mlxsw_sp || event != NETDEV_PRECHANGEUPPER)
		return 0;

	extack = netdev_notifier_info_to_extack(&info->info);

	/* VRF enslavement is handled in mlxsw_sp_netdevice_vrf_event() */
	NL_SET_ERR_MSG_MOD(extack, "Unknown upper device type");

	return -EOPNOTSUPP;
}

4331 4332 4333 4334 4335 4336 4337 4338 4339
static bool mlxsw_sp_is_vrf_event(unsigned long event, void *ptr)
{
	struct netdev_notifier_changeupper_info *info = ptr;

	if (event != NETDEV_PRECHANGEUPPER && event != NETDEV_CHANGEUPPER)
		return false;
	return netif_is_l3_master(info->upper_dev);
}

4340 4341 4342 4343 4344 4345 4346 4347 4348 4349 4350 4351 4352 4353 4354 4355 4356 4357 4358 4359 4360 4361 4362 4363 4364 4365
static int mlxsw_sp_netdevice_vxlan_event(struct mlxsw_sp *mlxsw_sp,
					  struct net_device *dev,
					  unsigned long event, void *ptr)
{
	struct netdev_notifier_changeupper_info *cu_info;
	struct netdev_notifier_info *info = ptr;
	struct netlink_ext_ack *extack;
	struct net_device *upper_dev;

	extack = netdev_notifier_info_to_extack(info);

	switch (event) {
	case NETDEV_CHANGEUPPER:
		cu_info = container_of(info,
				       struct netdev_notifier_changeupper_info,
				       info);
		upper_dev = cu_info->upper_dev;
		if (!netif_is_bridge_master(upper_dev))
			return 0;
		if (!mlxsw_sp_lower_get(upper_dev))
			return 0;
		if (!mlxsw_sp_bridge_vxlan_is_valid(upper_dev, extack))
			return -EOPNOTSUPP;
		if (cu_info->linking) {
			if (!netif_running(dev))
				return 0;
4366 4367 4368 4369 4370 4371
			/* When the bridge is VLAN-aware, the VNI of the VxLAN
			 * device needs to be mapped to a VLAN, but at this
			 * point no VLANs are configured on the VxLAN device
			 */
			if (br_vlan_enabled(upper_dev))
				return 0;
4372
			return mlxsw_sp_bridge_vxlan_join(mlxsw_sp, upper_dev,
4373
							  dev, 0, extack);
4374
		} else {
4375 4376 4377 4378 4379
			/* VLANs were already flushed, which triggered the
			 * necessary cleanup
			 */
			if (br_vlan_enabled(upper_dev))
				return 0;
4380
			mlxsw_sp_bridge_vxlan_leave(mlxsw_sp, dev);
4381 4382 4383 4384 4385 4386 4387 4388 4389 4390
		}
		break;
	case NETDEV_PRE_UP:
		upper_dev = netdev_master_upper_dev_get(dev);
		if (!upper_dev)
			return 0;
		if (!netif_is_bridge_master(upper_dev))
			return 0;
		if (!mlxsw_sp_lower_get(upper_dev))
			return 0;
4391
		return mlxsw_sp_bridge_vxlan_join(mlxsw_sp, upper_dev, dev, 0,
4392 4393 4394 4395 4396 4397 4398 4399 4400
						  extack);
	case NETDEV_DOWN:
		upper_dev = netdev_master_upper_dev_get(dev);
		if (!upper_dev)
			return 0;
		if (!netif_is_bridge_master(upper_dev))
			return 0;
		if (!mlxsw_sp_lower_get(upper_dev))
			return 0;
4401
		mlxsw_sp_bridge_vxlan_leave(mlxsw_sp, dev);
4402 4403 4404 4405 4406 4407
		break;
	}

	return 0;
}

4408
static int mlxsw_sp_netdevice_event(struct notifier_block *nb,
4409 4410 4411
				    unsigned long event, void *ptr)
{
	struct net_device *dev = netdev_notifier_info_to_dev(ptr);
4412
	struct mlxsw_sp_span_entry *span_entry;
4413
	struct mlxsw_sp *mlxsw_sp;
4414
	int err = 0;
4415

4416
	mlxsw_sp = container_of(nb, struct mlxsw_sp, netdevice_nb);
4417 4418 4419 4420 4421
	if (event == NETDEV_UNREGISTER) {
		span_entry = mlxsw_sp_span_entry_find_by_port(mlxsw_sp, dev);
		if (span_entry)
			mlxsw_sp_span_entry_invalidate(mlxsw_sp, span_entry);
	}
4422
	mlxsw_sp_span_respin(mlxsw_sp);
4423

4424 4425
	if (netif_is_vxlan(dev))
		err = mlxsw_sp_netdevice_vxlan_event(mlxsw_sp, dev, event, ptr);
4426 4427 4428
	if (mlxsw_sp_netdev_is_ipip_ol(mlxsw_sp, dev))
		err = mlxsw_sp_netdevice_ipip_ol_event(mlxsw_sp, dev,
						       event, ptr);
4429 4430 4431
	else if (mlxsw_sp_netdev_is_ipip_ul(mlxsw_sp, dev))
		err = mlxsw_sp_netdevice_ipip_ul_event(mlxsw_sp, dev,
						       event, ptr);
4432 4433 4434
	else if (event == NETDEV_PRE_CHANGEADDR ||
		 event == NETDEV_CHANGEADDR ||
		 event == NETDEV_CHANGEMTU)
4435
		err = mlxsw_sp_netdevice_router_port_event(dev, event, ptr);
4436 4437
	else if (mlxsw_sp_is_vrf_event(event, ptr))
		err = mlxsw_sp_netdevice_vrf_event(dev, event, ptr);
4438
	else if (mlxsw_sp_port_dev_check(dev))
4439
		err = mlxsw_sp_netdevice_port_event(dev, dev, event, ptr);
4440 4441 4442 4443
	else if (netif_is_lag_master(dev))
		err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
	else if (is_vlan_dev(dev))
		err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
4444 4445 4446 4447
	else if (netif_is_bridge_master(dev))
		err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
	else if (netif_is_macvlan(dev))
		err = mlxsw_sp_netdevice_macvlan_event(dev, event, ptr);
4448

4449
	return notifier_from_errno(err);
4450 4451
}

4452 4453 4454 4455 4456 4457
static struct notifier_block mlxsw_sp_inetaddr_valid_nb __read_mostly = {
	.notifier_call = mlxsw_sp_inetaddr_valid_event,
};

static struct notifier_block mlxsw_sp_inet6addr_valid_nb __read_mostly = {
	.notifier_call = mlxsw_sp_inet6addr_valid_event,
4458 4459
};

4460
static const struct pci_device_id mlxsw_sp1_pci_id_table[] = {
4461 4462 4463 4464
	{PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0},
	{0, },
};

4465 4466 4467 4468 4469 4470 4471 4472 4473 4474 4475 4476 4477
static struct pci_driver mlxsw_sp1_pci_driver = {
	.name = mlxsw_sp1_driver_name,
	.id_table = mlxsw_sp1_pci_id_table,
};

static const struct pci_device_id mlxsw_sp2_pci_id_table[] = {
	{PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM2), 0},
	{0, },
};

static struct pci_driver mlxsw_sp2_pci_driver = {
	.name = mlxsw_sp2_driver_name,
	.id_table = mlxsw_sp2_pci_id_table,
4478 4479
};

4480 4481 4482 4483 4484 4485 4486 4487 4488 4489
static const struct pci_device_id mlxsw_sp3_pci_id_table[] = {
	{PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM3), 0},
	{0, },
};

static struct pci_driver mlxsw_sp3_pci_driver = {
	.name = mlxsw_sp3_driver_name,
	.id_table = mlxsw_sp3_pci_id_table,
};

4490 4491 4492 4493
static int __init mlxsw_sp_module_init(void)
{
	int err;

4494 4495
	register_inetaddr_validator_notifier(&mlxsw_sp_inetaddr_valid_nb);
	register_inet6addr_validator_notifier(&mlxsw_sp_inet6addr_valid_nb);
4496

4497 4498 4499 4500 4501 4502 4503 4504
	err = mlxsw_core_driver_register(&mlxsw_sp1_driver);
	if (err)
		goto err_sp1_core_driver_register;

	err = mlxsw_core_driver_register(&mlxsw_sp2_driver);
	if (err)
		goto err_sp2_core_driver_register;

4505 4506 4507 4508
	err = mlxsw_core_driver_register(&mlxsw_sp3_driver);
	if (err)
		goto err_sp3_core_driver_register;

4509
	err = mlxsw_pci_driver_register(&mlxsw_sp1_pci_driver);
4510
	if (err)
4511
		goto err_sp1_pci_driver_register;
4512

4513
	err = mlxsw_pci_driver_register(&mlxsw_sp2_pci_driver);
4514
	if (err)
4515
		goto err_sp2_pci_driver_register;
4516

4517 4518 4519 4520
	err = mlxsw_pci_driver_register(&mlxsw_sp3_pci_driver);
	if (err)
		goto err_sp3_pci_driver_register;

4521 4522
	return 0;

4523 4524
err_sp3_pci_driver_register:
	mlxsw_pci_driver_unregister(&mlxsw_sp2_pci_driver);
4525
err_sp2_pci_driver_register:
4526
	mlxsw_pci_driver_unregister(&mlxsw_sp1_pci_driver);
4527
err_sp1_pci_driver_register:
4528 4529
	mlxsw_core_driver_unregister(&mlxsw_sp3_driver);
err_sp3_core_driver_register:
4530 4531 4532 4533
	mlxsw_core_driver_unregister(&mlxsw_sp2_driver);
err_sp2_core_driver_register:
	mlxsw_core_driver_unregister(&mlxsw_sp1_driver);
err_sp1_core_driver_register:
4534 4535
	unregister_inet6addr_validator_notifier(&mlxsw_sp_inet6addr_valid_nb);
	unregister_inetaddr_validator_notifier(&mlxsw_sp_inetaddr_valid_nb);
4536 4537 4538 4539 4540
	return err;
}

static void __exit mlxsw_sp_module_exit(void)
{
4541
	mlxsw_pci_driver_unregister(&mlxsw_sp3_pci_driver);
4542 4543
	mlxsw_pci_driver_unregister(&mlxsw_sp2_pci_driver);
	mlxsw_pci_driver_unregister(&mlxsw_sp1_pci_driver);
4544
	mlxsw_core_driver_unregister(&mlxsw_sp3_driver);
4545 4546
	mlxsw_core_driver_unregister(&mlxsw_sp2_driver);
	mlxsw_core_driver_unregister(&mlxsw_sp1_driver);
4547 4548
	unregister_inet6addr_validator_notifier(&mlxsw_sp_inet6addr_valid_nb);
	unregister_inetaddr_validator_notifier(&mlxsw_sp_inetaddr_valid_nb);
4549 4550 4551 4552 4553 4554 4555 4556
}

module_init(mlxsw_sp_module_init);
module_exit(mlxsw_sp_module_exit);

MODULE_LICENSE("Dual BSD/GPL");
MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
MODULE_DESCRIPTION("Mellanox Spectrum driver");
4557 4558
MODULE_DEVICE_TABLE(pci, mlxsw_sp1_pci_id_table);
MODULE_DEVICE_TABLE(pci, mlxsw_sp2_pci_id_table);
4559
MODULE_DEVICE_TABLE(pci, mlxsw_sp3_pci_id_table);
4560
MODULE_FIRMWARE(MLXSW_SP1_FW_FILENAME);
4561
MODULE_FIRMWARE(MLXSW_SP2_FW_FILENAME);
4562
MODULE_FIRMWARE(MLXSW_SP3_FW_FILENAME);