qla_os.c 154.1 KB
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/*
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 * QLogic Fibre Channel HBA Driver
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 * Copyright (c)  2003-2013 QLogic Corporation
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 *
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 * See LICENSE.qla2xxx for copyright and licensing details.
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 */
#include "qla_def.h"

#include <linux/moduleparam.h>
#include <linux/vmalloc.h>
#include <linux/delay.h>
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#include <linux/kthread.h>
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#include <linux/mutex.h>
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#include <linux/kobject.h>
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#include <linux/slab.h>
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#include <scsi/scsi_tcq.h>
#include <scsi/scsicam.h>
#include <scsi/scsi_transport.h>
#include <scsi/scsi_transport_fc.h>

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#include "qla_target.h"

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/*
 * Driver version
 */
char qla2x00_version_str[40];

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static int apidev_major;

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/*
 * SRB allocation cache
 */
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static struct kmem_cache *srb_cachep;
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/*
 * CT6 CTX allocation cache
 */
static struct kmem_cache *ctx_cachep;
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/*
 * error level for logging
 */
int ql_errlev = ql_log_all;
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static int ql2xenableclass2;
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module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
MODULE_PARM_DESC(ql2xenableclass2,
		"Specify if Class 2 operations are supported from the very "
		"beginning. Default is 0 - class 2 not supported.");

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int ql2xlogintimeout = 20;
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module_param(ql2xlogintimeout, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xlogintimeout,
		"Login timeout value in seconds.");

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int qlport_down_retry;
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module_param(qlport_down_retry, int, S_IRUGO);
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MODULE_PARM_DESC(qlport_down_retry,
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		"Maximum number of command retries to a port that returns "
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		"a PORT-DOWN status.");

int ql2xplogiabsentdevice;
module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(ql2xplogiabsentdevice,
		"Option to enable PLOGI to devices that are not present after "
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		"a Fabric scan.  This is needed for several broken switches. "
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		"Default is 0 - no PLOGI. 1 - perfom PLOGI.");

int ql2xloginretrycount = 0;
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module_param(ql2xloginretrycount, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xloginretrycount,
		"Specify an alternate value for the NVRAM login retry count.");

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int ql2xallocfwdump = 1;
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module_param(ql2xallocfwdump, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xallocfwdump,
		"Option to enable allocation of memory for a firmware dump "
		"during HBA initialization.  Memory allocation requirements "
		"vary by ISP type.  Default is 1 - allocate memory.");

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int ql2xextended_error_logging;
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module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(ql2xextended_error_logging,
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		"Option to enable extended error logging,\n"
		"\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
		"\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
		"\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
		"\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
		"\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
		"\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
		"\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
		"\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
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		"\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
		"\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
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		"\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
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		"\t\t0x1e400000 - Preferred value for capturing essential "
		"debug information (equivalent to old "
		"ql2xextended_error_logging=1).\n"
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		"\t\tDo LOGICAL OR of the value to enable more than one level");
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int ql2xshiftctondsd = 6;
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module_param(ql2xshiftctondsd, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xshiftctondsd,
		"Set to control shifting of command type processing "
		"based on total number of SG elements.");

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int ql2xfdmienable=1;
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module_param(ql2xfdmienable, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xfdmienable,
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		"Enables FDMI registrations. "
		"0 - no FDMI. Default is 1 - perform FDMI.");
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#define MAX_Q_DEPTH	32
static int ql2xmaxqdepth = MAX_Q_DEPTH;
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module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(ql2xmaxqdepth,
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		"Maximum queue depth to set for each LUN. "
		"Default is 32.");
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int ql2xenabledif = 2;
module_param(ql2xenabledif, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xenabledif,
		" Enable T10-CRC-DIF "
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		" Default is 0 - No DIF Support. 1 - Enable it"
		", 2 - Enable DIF for all types, except Type 0.");
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int ql2xenablehba_err_chk = 2;
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module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(ql2xenablehba_err_chk,
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		" Enable T10-CRC-DIF Error isolation by HBA:\n"
		" Default is 1.\n"
		"  0 -- Error isolation disabled\n"
		"  1 -- Error isolation enabled only for DIX Type 0\n"
		"  2 -- Error isolation enabled for all Types\n");
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int ql2xiidmaenable=1;
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module_param(ql2xiidmaenable, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xiidmaenable,
		"Enables iIDMA settings "
		"Default is 1 - perform iIDMA. 0 - no iIDMA.");

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int ql2xmaxqueues = 1;
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module_param(ql2xmaxqueues, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xmaxqueues,
		"Enables MQ settings "
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		"Default is 1 for single queue. Set it to number "
		"of queues in MQ mode.");
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int ql2xmultique_tag;
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module_param(ql2xmultique_tag, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xmultique_tag,
		"Enables CPU affinity settings for the driver "
		"Default is 0 for no affinity of request and response IO. "
		"Set it to 1 to turn on the cpu affinity.");
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int ql2xfwloadbin;
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module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(ql2xfwloadbin,
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		"Option to specify location from which to load ISP firmware:.\n"
		" 2 -- load firmware via the request_firmware() (hotplug).\n"
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		"      interface.\n"
		" 1 -- load firmware from flash.\n"
		" 0 -- use default semantics.\n");

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int ql2xetsenable;
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module_param(ql2xetsenable, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xetsenable,
		"Enables firmware ETS burst."
		"Default is 0 - skip ETS enablement.");

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int ql2xdbwr = 1;
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module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(ql2xdbwr,
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		"Option to specify scheme for request queue posting.\n"
		" 0 -- Regular doorbell.\n"
		" 1 -- CAMRAM doorbell (faster).\n");
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int ql2xtargetreset = 1;
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module_param(ql2xtargetreset, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xtargetreset,
		 "Enable target reset."
		 "Default is 1 - use hw defaults.");

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int ql2xgffidenable;
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module_param(ql2xgffidenable, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xgffidenable,
		"Enables GFF_ID checks of port type. "
		"Default is 0 - Do not use GFF_ID information.");
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int ql2xasynctmfenable;
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module_param(ql2xasynctmfenable, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xasynctmfenable,
		"Enables issue of TM IOCBs asynchronously via IOCB mechanism"
		"Default is 0 - Issue TM IOCBs via mailbox mechanism.");
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int ql2xdontresethba;
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module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
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MODULE_PARM_DESC(ql2xdontresethba,
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		"Option to specify reset behaviour.\n"
		" 0 (Default) -- Reset on failure.\n"
		" 1 -- Do not reset on failure.\n");
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uint ql2xmaxlun = MAX_LUNS;
module_param(ql2xmaxlun, uint, S_IRUGO);
MODULE_PARM_DESC(ql2xmaxlun,
		"Defines the maximum LU number to register with the SCSI "
		"midlayer. Default is 65535.");

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int ql2xmdcapmask = 0x1F;
module_param(ql2xmdcapmask, int, S_IRUGO);
MODULE_PARM_DESC(ql2xmdcapmask,
		"Set the Minidump driver capture mask level. "
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		"Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
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int ql2xmdenable = 1;
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module_param(ql2xmdenable, int, S_IRUGO);
MODULE_PARM_DESC(ql2xmdenable,
		"Enable/disable MiniDump. "
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		"0 - MiniDump disabled. "
		"1 (Default) - MiniDump enabled.");
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/*
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 * SCSI host template entry points
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 */
static int qla2xxx_slave_configure(struct scsi_device * device);
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static int qla2xxx_slave_alloc(struct scsi_device *);
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static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
static void qla2xxx_scan_start(struct Scsi_Host *);
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static void qla2xxx_slave_destroy(struct scsi_device *);
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static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
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static int qla2xxx_eh_abort(struct scsi_cmnd *);
static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
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static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
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static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
static int qla2xxx_eh_host_reset(struct scsi_cmnd *);

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static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
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static int qla2x00_change_queue_type(struct scsi_device *, int);
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static void qla2x00_free_device(scsi_qla_host_t *);
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struct scsi_host_template qla2xxx_driver_template = {
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	.module			= THIS_MODULE,
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	.name			= QLA2XXX_DRIVER_NAME,
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	.queuecommand		= qla2xxx_queuecommand,
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	.eh_abort_handler	= qla2xxx_eh_abort,
	.eh_device_reset_handler = qla2xxx_eh_device_reset,
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	.eh_target_reset_handler = qla2xxx_eh_target_reset,
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	.eh_bus_reset_handler	= qla2xxx_eh_bus_reset,
	.eh_host_reset_handler	= qla2xxx_eh_host_reset,

	.slave_configure	= qla2xxx_slave_configure,

	.slave_alloc		= qla2xxx_slave_alloc,
	.slave_destroy		= qla2xxx_slave_destroy,
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	.scan_finished		= qla2xxx_scan_finished,
	.scan_start		= qla2xxx_scan_start,
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	.change_queue_depth	= qla2x00_change_queue_depth,
	.change_queue_type	= qla2x00_change_queue_type,
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	.this_id		= -1,
	.cmd_per_lun		= 3,
	.use_clustering		= ENABLE_CLUSTERING,
	.sg_tablesize		= SG_ALL,

	.max_sectors		= 0xFFFF,
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	.shost_attrs		= qla2x00_host_attrs,
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	.supported_mode		= MODE_INITIATOR,
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};

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static struct scsi_transport_template *qla2xxx_transport_template = NULL;
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struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
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/* TODO Convert to inlines
 *
 * Timer routines
 */

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__inline__ void
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qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
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{
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	init_timer(&vha->timer);
	vha->timer.expires = jiffies + interval * HZ;
	vha->timer.data = (unsigned long)vha;
	vha->timer.function = (void (*)(unsigned long))func;
	add_timer(&vha->timer);
	vha->timer_active = 1;
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}

static inline void
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qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
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{
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	/* Currently used for 82XX only. */
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	if (vha->device_flags & DFLG_DEV_FAILED) {
		ql_dbg(ql_dbg_timer, vha, 0x600d,
		    "Device in a failed state, returning.\n");
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		return;
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	}
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	mod_timer(&vha->timer, jiffies + interval * HZ);
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}

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static __inline__ void
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qla2x00_stop_timer(scsi_qla_host_t *vha)
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{
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	del_timer_sync(&vha->timer);
	vha->timer_active = 0;
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}

static int qla2x00_do_dpc(void *data);

static void qla2x00_rst_aen(scsi_qla_host_t *);

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static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
	struct req_que **, struct rsp_que **);
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static void qla2x00_free_fw_dump(struct qla_hw_data *);
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static void qla2x00_mem_free(struct qla_hw_data *);
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/* -------------------------------------------------------------------------- */
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static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
				struct rsp_que *rsp)
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{
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	scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
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	ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
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				GFP_KERNEL);
	if (!ha->req_q_map) {
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		ql_log(ql_log_fatal, vha, 0x003b,
		    "Unable to allocate memory for request queue ptrs.\n");
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		goto fail_req_map;
	}

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	ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
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				GFP_KERNEL);
	if (!ha->rsp_q_map) {
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		ql_log(ql_log_fatal, vha, 0x003c,
		    "Unable to allocate memory for response queue ptrs.\n");
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		goto fail_rsp_map;
	}
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	/*
	 * Make sure we record at least the request and response queue zero in
	 * case we need to free them if part of the probe fails.
	 */
	ha->rsp_q_map[0] = rsp;
	ha->req_q_map[0] = req;
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	set_bit(0, ha->rsp_qid_map);
	set_bit(0, ha->req_qid_map);
	return 1;

fail_rsp_map:
	kfree(ha->req_q_map);
	ha->req_q_map = NULL;
fail_req_map:
	return -ENOMEM;
}

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static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
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{
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	if (IS_QLAFX00(ha)) {
		if (req && req->ring_fx00)
			dma_free_coherent(&ha->pdev->dev,
			    (req->length_fx00 + 1) * sizeof(request_t),
			    req->ring_fx00, req->dma_fx00);
	} else if (req && req->ring)
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		dma_free_coherent(&ha->pdev->dev,
		(req->length + 1) * sizeof(request_t),
		req->ring, req->dma);

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	if (req)
		kfree(req->outstanding_cmds);

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	kfree(req);
	req = NULL;
}

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static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
{
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	if (IS_QLAFX00(ha)) {
		if (rsp && rsp->ring)
			dma_free_coherent(&ha->pdev->dev,
			    (rsp->length_fx00 + 1) * sizeof(request_t),
			    rsp->ring_fx00, rsp->dma_fx00);
	} else if (rsp && rsp->ring) {
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		dma_free_coherent(&ha->pdev->dev,
		(rsp->length + 1) * sizeof(response_t),
		rsp->ring, rsp->dma);
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	}
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	kfree(rsp);
	rsp = NULL;
}

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static void qla2x00_free_queues(struct qla_hw_data *ha)
{
	struct req_que *req;
	struct rsp_que *rsp;
	int cnt;

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	for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
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		req = ha->req_q_map[cnt];
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		qla2x00_free_req_que(ha, req);
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	}
	kfree(ha->req_q_map);
	ha->req_q_map = NULL;
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	for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
		rsp = ha->rsp_q_map[cnt];
		qla2x00_free_rsp_que(ha, rsp);
	}
	kfree(ha->rsp_q_map);
	ha->rsp_q_map = NULL;
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}

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static int qla25xx_setup_mode(struct scsi_qla_host *vha)
{
	uint16_t options = 0;
	int ques, req, ret;
	struct qla_hw_data *ha = vha->hw;

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	if (!(ha->fw_attributes & BIT_6)) {
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		ql_log(ql_log_warn, vha, 0x00d8,
		    "Firmware is not multi-queue capable.\n");
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		goto fail;
	}
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	if (ql2xmultique_tag) {
		/* create a request queue for IO */
		options |= BIT_7;
		req = qla25xx_create_req_que(ha, options, 0, 0, -1,
			QLA_DEFAULT_QUE_QOS);
		if (!req) {
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			ql_log(ql_log_warn, vha, 0x00e0,
			    "Failed to create request queue.\n");
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			goto fail;
		}
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		ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
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		vha->req = ha->req_q_map[req];
		options |= BIT_1;
		for (ques = 1; ques < ha->max_rsp_queues; ques++) {
			ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
			if (!ret) {
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				ql_log(ql_log_warn, vha, 0x00e8,
				    "Failed to create response queue.\n");
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				goto fail2;
			}
		}
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		ha->flags.cpu_affinity_enabled = 1;
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		ql_dbg(ql_dbg_multiq, vha, 0xc007,
		    "CPU affinity mode enalbed, "
		    "no. of response queues:%d no. of request queues:%d.\n",
		    ha->max_rsp_queues, ha->max_req_queues);
		ql_dbg(ql_dbg_init, vha, 0x00e9,
		    "CPU affinity mode enalbed, "
		    "no. of response queues:%d no. of request queues:%d.\n",
		    ha->max_rsp_queues, ha->max_req_queues);
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	}
	return 0;
fail2:
	qla25xx_delete_queues(vha);
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	destroy_workqueue(ha->wq);
	ha->wq = NULL;
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	vha->req = ha->req_q_map[0];
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fail:
	ha->mqenable = 0;
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	kfree(ha->req_q_map);
	kfree(ha->rsp_q_map);
	ha->max_req_queues = ha->max_rsp_queues = 1;
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	return 1;
}

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static char *
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qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
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{
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	struct qla_hw_data *ha = vha->hw;
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	static char *pci_bus_modes[] = {
		"33", "66", "100", "133",
	};
	uint16_t pci_bus;

	strcpy(str, "PCI");
	pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
	if (pci_bus) {
		strcat(str, "-X (");
		strcat(str, pci_bus_modes[pci_bus]);
	} else {
		pci_bus = (ha->pci_attr & BIT_8) >> 8;
		strcat(str, " (");
		strcat(str, pci_bus_modes[pci_bus]);
	}
	strcat(str, " MHz)");

	return (str);
}

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static char *
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qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
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{
	static char *pci_bus_modes[] = { "33", "66", "100", "133", };
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	struct qla_hw_data *ha = vha->hw;
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	uint32_t pci_bus;

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	if (pci_is_pcie(ha->pdev)) {
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		char lwstr[6];
501
		uint32_t lstat, lspeed, lwidth;
502

503 504 505
		pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
		lspeed = lstat & PCI_EXP_LNKCAP_SLS;
		lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
506 507

		strcpy(str, "PCIe (");
508 509
		switch (lspeed) {
		case 1:
510
			strcat(str, "2.5GT/s ");
511 512
			break;
		case 2:
513
			strcat(str, "5.0GT/s ");
514 515 516 517 518
			break;
		case 3:
			strcat(str, "8.0GT/s ");
			break;
		default:
519
			strcat(str, "<unknown> ");
520 521
			break;
		}
522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546
		snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
		strcat(str, lwstr);

		return str;
	}

	strcpy(str, "PCI");
	pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
	if (pci_bus == 0 || pci_bus == 8) {
		strcat(str, " (");
		strcat(str, pci_bus_modes[pci_bus >> 3]);
	} else {
		strcat(str, "-X ");
		if (pci_bus & BIT_2)
			strcat(str, "Mode 2");
		else
			strcat(str, "Mode 1");
		strcat(str, " (");
		strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
	}
	strcat(str, " MHz)");

	return str;
}

547
static char *
548
qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
L
Linus Torvalds 已提交
549 550
{
	char un_str[10];
551
	struct qla_hw_data *ha = vha->hw;
A
Andrew Vasquez 已提交
552

L
Linus Torvalds 已提交
553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585
	sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
	    ha->fw_minor_version,
	    ha->fw_subminor_version);

	if (ha->fw_attributes & BIT_9) {
		strcat(str, "FLX");
		return (str);
	}

	switch (ha->fw_attributes & 0xFF) {
	case 0x7:
		strcat(str, "EF");
		break;
	case 0x17:
		strcat(str, "TP");
		break;
	case 0x37:
		strcat(str, "IP");
		break;
	case 0x77:
		strcat(str, "VI");
		break;
	default:
		sprintf(un_str, "(%x)", ha->fw_attributes);
		strcat(str, un_str);
		break;
	}
	if (ha->fw_attributes & 0x100)
		strcat(str, "X");

	return (str);
}

586
static char *
587
qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
588
{
589
	struct qla_hw_data *ha = vha->hw;
590

591 592
	sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
	    ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
593 594 595
	return str;
}

596 597
void
qla2x00_sp_free_dma(void *vha, void *ptr)
598
{
599 600 601 602
	srb_t *sp = (srb_t *)ptr;
	struct scsi_cmnd *cmd = GET_CMD_SP(sp);
	struct qla_hw_data *ha = sp->fcport->vha->hw;
	void *ctx = GET_CMD_CTX_SP(sp);
603

604 605 606
	if (sp->flags & SRB_DMA_VALID) {
		scsi_dma_unmap(cmd);
		sp->flags &= ~SRB_DMA_VALID;
607
	}
608

609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628
	if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
		dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
		    scsi_prot_sg_count(cmd), cmd->sc_data_direction);
		sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
	}

	if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
		/* List assured to be having elements */
		qla2x00_clean_dsd_pool(ha, sp);
		sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
	}

	if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
		dma_pool_free(ha->dl_dma_pool, ctx,
		    ((struct crc_context *)ctx)->crc_ctx_dma);
		sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
	}

	if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
		struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
629

630 631 632 633 634 635 636 637 638 639
		dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
			ctx1->fcp_cmnd_dma);
		list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
		ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
		ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
		mempool_free(ctx1, ha->ctx_mempool);
		ctx1 = NULL;
	}

	CMD_SP(cmd) = NULL;
640
	qla2x00_rel_sp(sp->fcport->vha, sp);
641 642
}

643
static void
644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664
qla2x00_sp_compl(void *data, void *ptr, int res)
{
	struct qla_hw_data *ha = (struct qla_hw_data *)data;
	srb_t *sp = (srb_t *)ptr;
	struct scsi_cmnd *cmd = GET_CMD_SP(sp);

	cmd->result = res;

	if (atomic_read(&sp->ref_count) == 0) {
		ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
		    "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
		    sp, GET_CMD_SP(sp));
		if (ql2xextended_error_logging & ql_dbg_io)
			BUG();
		return;
	}
	if (!atomic_dec_and_test(&sp->ref_count))
		return;

	qla2x00_sp_free_dma(ha, sp);
	cmd->scsi_done(cmd);
665 666
}

667 668 669
/* If we are SP1 here, we need to still take and release the host_lock as SP1
 * does not have the changes necessary to avoid taking host->host_lock.
 */
L
Linus Torvalds 已提交
670
static int
671
qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
672
{
673
	scsi_qla_host_t *vha = shost_priv(host);
674
	fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
675
	struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
676 677
	struct qla_hw_data *ha = vha->hw;
	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
678 679 680
	srb_t *sp;
	int rval;

681
	if (ha->flags.eeh_busy) {
682
		if (ha->flags.pci_channel_io_perm_failure) {
683
			ql_dbg(ql_dbg_aer, vha, 0x9010,
684 685
			    "PCI Channel IO permanent failure, exiting "
			    "cmd=%p.\n", cmd);
686
			cmd->result = DID_NO_CONNECT << 16;
687
		} else {
688
			ql_dbg(ql_dbg_aer, vha, 0x9011,
689
			    "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
690
			cmd->result = DID_REQUEUE << 16;
691
		}
692 693 694
		goto qc24_fail_command;
	}

695 696 697
	rval = fc_remote_port_chkready(rport);
	if (rval) {
		cmd->result = rval;
698
		ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
699 700
		    "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
		    cmd, rval);
701 702 703
		goto qc24_fail_command;
	}

704 705
	if (!vha->flags.difdix_supported &&
		scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
706 707 708
			ql_dbg(ql_dbg_io, vha, 0x3004,
			    "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
			    cmd);
709 710 711
			cmd->result = DID_NO_CONNECT << 16;
			goto qc24_fail_command;
	}
712 713 714 715 716 717

	if (!fcport) {
		cmd->result = DID_NO_CONNECT << 16;
		goto qc24_fail_command;
	}

718 719
	if (atomic_read(&fcport->state) != FCS_ONLINE) {
		if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
720
			atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
721 722 723 724
			ql_dbg(ql_dbg_io, vha, 0x3005,
			    "Returning DNC, fcport_state=%d loop_state=%d.\n",
			    atomic_read(&fcport->state),
			    atomic_read(&base_vha->loop_state));
725 726 727
			cmd->result = DID_NO_CONNECT << 16;
			goto qc24_fail_command;
		}
728
		goto qc24_target_busy;
729 730
	}

731
	sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
732
	if (!sp)
733
		goto qc24_host_busy;
734

735 736 737 738 739 740 741
	sp->u.scmd.cmd = cmd;
	sp->type = SRB_SCSI_CMD;
	atomic_set(&sp->ref_count, 1);
	CMD_SP(cmd) = (void *)sp;
	sp->free = qla2x00_sp_free_dma;
	sp->done = qla2x00_sp_compl;

742
	rval = ha->isp_ops->start_scsi(sp);
743
	if (rval != QLA_SUCCESS) {
744
		ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
745
		    "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
746
		goto qc24_host_busy_free_sp;
747
	}
748 749 750 751

	return 0;

qc24_host_busy_free_sp:
752
	qla2x00_sp_free_dma(ha, sp);
753

754
qc24_host_busy:
755 756
	return SCSI_MLQUEUE_HOST_BUSY;

757 758 759
qc24_target_busy:
	return SCSI_MLQUEUE_TARGET_BUSY;

760
qc24_fail_command:
761
	cmd->scsi_done(cmd);
762 763 764 765

	return 0;
}

L
Linus Torvalds 已提交
766 767 768 769 770 771 772 773 774 775 776 777 778
/*
 * qla2x00_eh_wait_on_command
 *    Waits for the command to be returned by the Firmware for some
 *    max time.
 *
 * Input:
 *    cmd = Scsi Command to wait on.
 *
 * Return:
 *    Not Found : 0
 *    Found : 1
 */
static int
779
qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
L
Linus Torvalds 已提交
780
{
781 782
#define ABORT_POLLING_PERIOD	1000
#define ABORT_WAIT_ITER		((10 * 1000) / (ABORT_POLLING_PERIOD))
已提交
783
	unsigned long wait_iter = ABORT_WAIT_ITER;
784 785
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
	struct qla_hw_data *ha = vha->hw;
已提交
786
	int ret = QLA_SUCCESS;
L
Linus Torvalds 已提交
787

788
	if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
789 790
		ql_dbg(ql_dbg_taskm, vha, 0x8005,
		    "Return:eh_wait.\n");
791 792 793
		return ret;
	}

794
	while (CMD_SP(cmd) && wait_iter--) {
795
		msleep(ABORT_POLLING_PERIOD);
已提交
796 797 798
	}
	if (CMD_SP(cmd))
		ret = QLA_FUNCTION_FAILED;
L
Linus Torvalds 已提交
799

已提交
800
	return ret;
L
Linus Torvalds 已提交
801 802 803 804
}

/*
 * qla2x00_wait_for_hba_online
A
Andrew Vasquez 已提交
805
 *    Wait till the HBA is online after going through
L
Linus Torvalds 已提交
806 807 808 809 810
 *    <= MAX_RETRIES_OF_ISP_ABORT  or
 *    finally HBA is disabled ie marked offline
 *
 * Input:
 *     ha - pointer to host adapter structure
A
Andrew Vasquez 已提交
811 812
 *
 * Note:
L
Linus Torvalds 已提交
813 814 815 816 817 818 819
 *    Does context switching-Release SPIN_LOCK
 *    (if any) before calling this routine.
 *
 * Return:
 *    Success (Adapter is online) : 0
 *    Failed  (Adapter is offline/disabled) : 1
 */
820
int
821
qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
822
{
823 824
	int		return_status;
	unsigned long	wait_online;
825 826
	struct qla_hw_data *ha = vha->hw;
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
L
Linus Torvalds 已提交
827

A
Andrew Vasquez 已提交
828
	wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
829 830 831 832
	while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
	    test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
	    test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
	    ha->dpc_active) && time_before(jiffies, wait_online)) {
L
Linus Torvalds 已提交
833 834 835

		msleep(1000);
	}
836
	if (base_vha->flags.online)
A
Andrew Vasquez 已提交
837
		return_status = QLA_SUCCESS;
L
Linus Torvalds 已提交
838 839 840 841 842 843
	else
		return_status = QLA_FUNCTION_FAILED;

	return (return_status);
}

844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861
/*
 * qla2x00_wait_for_reset_ready
 *    Wait till the HBA is online after going through
 *    <= MAX_RETRIES_OF_ISP_ABORT  or
 *    finally HBA is disabled ie marked offline or flash
 *    operations are in progress.
 *
 * Input:
 *     ha - pointer to host adapter structure
 *
 * Note:
 *    Does context switching-Release SPIN_LOCK
 *    (if any) before calling this routine.
 *
 * Return:
 *    Success (Adapter is online/no flash ops) : 0
 *    Failed  (Adapter is offline/disabled/flash ops in progress) : 1
 */
862
static int
863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882
qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
{
	int		return_status;
	unsigned long	wait_online;
	struct qla_hw_data *ha = vha->hw;
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);

	wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
	while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
	    test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
	    test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
	    ha->optrom_state != QLA_SWAITING ||
	    ha->dpc_active) && time_before(jiffies, wait_online))
		msleep(1000);

	if (base_vha->flags.online &&  ha->optrom_state == QLA_SWAITING)
		return_status = QLA_SUCCESS;
	else
		return_status = QLA_FUNCTION_FAILED;

883 884
	ql_dbg(ql_dbg_taskm, vha, 0x8019,
	    "%s return status=%d.\n", __func__, return_status);
885 886 887 888

	return return_status;
}

889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916
int
qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
{
	int		return_status;
	unsigned long	wait_reset;
	struct qla_hw_data *ha = vha->hw;
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);

	wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
	while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
	    test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
	    test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
	    ha->dpc_active) && time_before(jiffies, wait_reset)) {

		msleep(1000);

		if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
		    ha->flags.chip_reset_done)
			break;
	}
	if (ha->flags.chip_reset_done)
		return_status = QLA_SUCCESS;
	else
		return_status = QLA_FUNCTION_FAILED;

	return return_status;
}

917 918 919 920 921 922
static void
sp_get(struct srb *sp)
{
	atomic_inc(&sp->ref_count);
}

L
Linus Torvalds 已提交
923 924 925 926 927 928 929 930 931 932 933 934 935
/**************************************************************************
* qla2xxx_eh_abort
*
* Description:
*    The abort function will abort the specified command.
*
* Input:
*    cmd = Linux SCSI command packet to be aborted.
*
* Returns:
*    Either SUCCESS or FAILED.
*
* Note:
936
*    Only return FAILED if command not returned by firmware.
L
Linus Torvalds 已提交
937
**************************************************************************/
938
static int
L
Linus Torvalds 已提交
939 940
qla2xxx_eh_abort(struct scsi_cmnd *cmd)
{
941
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
已提交
942
	srb_t *sp;
943
	int ret;
已提交
944
	unsigned int id, lun;
945
	unsigned long flags;
946
	int wait = 0;
947
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
948

已提交
949
	if (!CMD_SP(cmd))
950
		return SUCCESS;
L
Linus Torvalds 已提交
951

952 953 954 955 956
	ret = fc_block_scsi_eh(cmd);
	if (ret != 0)
		return ret;
	ret = SUCCESS;

已提交
957 958
	id = cmd->device->id;
	lun = cmd->device->lun;
L
Linus Torvalds 已提交
959

960
	spin_lock_irqsave(&ha->hardware_lock, flags);
961 962 963 964 965
	sp = (srb_t *) CMD_SP(cmd);
	if (!sp) {
		spin_unlock_irqrestore(&ha->hardware_lock, flags);
		return SUCCESS;
	}
L
Linus Torvalds 已提交
966

967
	ql_dbg(ql_dbg_taskm, vha, 0x8002,
968 969
	    "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
	    vha->host_no, id, lun, sp, cmd);
970

971 972
	/* Get a reference to the sp and drop the lock.*/
	sp_get(sp);
973

974
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
975
	if (ha->isp_ops->abort_command(sp)) {
976
		ret = FAILED;
977
		ql_dbg(ql_dbg_taskm, vha, 0x8003,
978
		    "Abort command mbx failed cmd=%p.\n", cmd);
979
	} else {
980
		ql_dbg(ql_dbg_taskm, vha, 0x8004,
981
		    "Abort command mbx success cmd=%p.\n", cmd);
982 983
		wait = 1;
	}
984 985

	spin_lock_irqsave(&ha->hardware_lock, flags);
986
	sp->done(ha, sp, 0);
987
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
L
Linus Torvalds 已提交
988

989 990 991 992
	/* Did the command return during mailbox execution? */
	if (ret == FAILED && !CMD_SP(cmd))
		ret = SUCCESS;

已提交
993
	/* Wait for the command to be returned. */
994
	if (wait) {
995
		if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
996
			ql_log(ql_log_warn, vha, 0x8006,
997
			    "Abort handler timed out cmd=%p.\n", cmd);
998
			ret = FAILED;
已提交
999
		}
L
Linus Torvalds 已提交
1000 1001
	}

1002
	ql_log(ql_log_info, vha, 0x801c,
1003 1004
	    "Abort command issued nexus=%ld:%d:%d --  %d %x.\n",
	    vha->host_no, id, lun, wait, ret);
L
Linus Torvalds 已提交
1005

已提交
1006 1007
	return ret;
}
L
Linus Torvalds 已提交
1008

1009
int
1010
qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1011
	unsigned int l, enum nexus_wait_type type)
已提交
1012
{
1013
	int cnt, match, status;
1014
	unsigned long flags;
1015
	struct qla_hw_data *ha = vha->hw;
1016
	struct req_que *req;
1017
	srb_t *sp;
1018
	struct scsi_cmnd *cmd;
L
Linus Torvalds 已提交
1019

1020
	status = QLA_SUCCESS;
1021

1022
	spin_lock_irqsave(&ha->hardware_lock, flags);
1023
	req = vha->req;
1024
	for (cnt = 1; status == QLA_SUCCESS &&
1025
		cnt < req->num_outstanding_cmds; cnt++) {
1026 1027
		sp = req->outstanding_cmds[cnt];
		if (!sp)
1028
			continue;
1029
		if (sp->type != SRB_SCSI_CMD)
1030
			continue;
1031 1032 1033
		if (vha->vp_idx != sp->fcport->vha->vp_idx)
			continue;
		match = 0;
1034
		cmd = GET_CMD_SP(sp);
1035 1036 1037 1038 1039
		switch (type) {
		case WAIT_HOST:
			match = 1;
			break;
		case WAIT_TARGET:
1040
			match = cmd->device->id == t;
1041 1042
			break;
		case WAIT_LUN:
1043 1044
			match = (cmd->device->id == t &&
				cmd->device->lun == l);
1045
			break;
1046
		}
1047 1048 1049 1050
		if (!match)
			continue;

		spin_unlock_irqrestore(&ha->hardware_lock, flags);
1051
		status = qla2x00_eh_wait_on_command(cmd);
1052
		spin_lock_irqsave(&ha->hardware_lock, flags);
L
Linus Torvalds 已提交
1053
	}
1054
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
1055 1056

	return status;
L
Linus Torvalds 已提交
1057 1058
}

1059 1060 1061 1062 1063 1064
static char *reset_errors[] = {
	"HBA not online",
	"HBA not ready",
	"Task management failed",
	"Waiting for command completions",
};
L
Linus Torvalds 已提交
1065

1066
static int
1067
__qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1068
    struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
L
Linus Torvalds 已提交
1069
{
1070
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1071
	fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1072
	int err;
L
Linus Torvalds 已提交
1073

1074
	if (!fcport) {
1075
		return FAILED;
1076
	}
L
Linus Torvalds 已提交
1077

1078 1079 1080 1081
	err = fc_block_scsi_eh(cmd);
	if (err != 0)
		return err;

1082
	ql_log(ql_log_info, vha, 0x8009,
1083
	    "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name, vha->host_no,
1084
	    cmd->device->id, cmd->device->lun, cmd);
L
Linus Torvalds 已提交
1085

1086
	err = 0;
1087 1088 1089
	if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
		ql_log(ql_log_warn, vha, 0x800a,
		    "Wait for hba online failed for cmd=%p.\n", cmd);
1090
		goto eh_reset_failed;
1091
	}
1092
	err = 2;
1093
	if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1094 1095 1096
		!= QLA_SUCCESS) {
		ql_log(ql_log_warn, vha, 0x800c,
		    "do_reset failed for cmd=%p.\n", cmd);
1097
		goto eh_reset_failed;
1098
	}
1099
	err = 3;
1100
	if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1101 1102
	    cmd->device->lun, type) != QLA_SUCCESS) {
		ql_log(ql_log_warn, vha, 0x800d,
1103
		    "wait for pending cmds failed for cmd=%p.\n", cmd);
1104
		goto eh_reset_failed;
1105
	}
1106

1107
	ql_log(ql_log_info, vha, 0x800e,
1108 1109
	    "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name,
	    vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1110 1111 1112

	return SUCCESS;

1113
eh_reset_failed:
1114
	ql_log(ql_log_info, vha, 0x800f,
1115 1116 1117
	    "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name,
	    reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
	    cmd);
1118 1119
	return FAILED;
}
L
Linus Torvalds 已提交
1120

1121 1122 1123
static int
qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
{
1124 1125
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
1126

1127 1128
	return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
	    ha->isp_ops->lun_reset);
L
Linus Torvalds 已提交
1129 1130 1131
}

static int
1132
qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
L
Linus Torvalds 已提交
1133
{
1134 1135
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
1136

1137 1138
	return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
	    ha->isp_ops->target_reset);
L
Linus Torvalds 已提交
1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155
}

/**************************************************************************
* qla2xxx_eh_bus_reset
*
* Description:
*    The bus reset function will reset the bus and abort any executing
*    commands.
*
* Input:
*    cmd = Linux SCSI command packet of the command that cause the
*          bus reset.
*
* Returns:
*    SUCCESS/FAILURE (defined as macro in scsi.h).
*
**************************************************************************/
1156
static int
L
Linus Torvalds 已提交
1157 1158
qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
{
1159
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1160
	fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1161
	int ret = FAILED;
已提交
1162 1163 1164 1165
	unsigned int id, lun;

	id = cmd->device->id;
	lun = cmd->device->lun;
L
Linus Torvalds 已提交
1166

1167
	if (!fcport) {
已提交
1168
		return ret;
1169
	}
L
Linus Torvalds 已提交
1170

1171 1172 1173 1174 1175
	ret = fc_block_scsi_eh(cmd);
	if (ret != 0)
		return ret;
	ret = FAILED;

1176
	ql_log(ql_log_info, vha, 0x8012,
1177
	    "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
L
Linus Torvalds 已提交
1178

1179
	if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1180 1181
		ql_log(ql_log_fatal, vha, 0x8013,
		    "Wait for hba online failed board disabled.\n");
已提交
1182
		goto eh_bus_reset_done;
L
Linus Torvalds 已提交
1183 1184
	}

1185 1186 1187
	if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
		ret = SUCCESS;

已提交
1188 1189
	if (ret == FAILED)
		goto eh_bus_reset_done;
L
Linus Torvalds 已提交
1190

1191
	/* Flush outstanding commands. */
1192
	if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1193 1194 1195
	    QLA_SUCCESS) {
		ql_log(ql_log_warn, vha, 0x8014,
		    "Wait for pending commands failed.\n");
1196
		ret = FAILED;
1197
	}
L
Linus Torvalds 已提交
1198

已提交
1199
eh_bus_reset_done:
1200
	ql_log(ql_log_warn, vha, 0x802b,
1201
	    "BUS RESET %s nexus=%ld:%d:%d.\n",
1202
	    (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
L
Linus Torvalds 已提交
1203

已提交
1204
	return ret;
L
Linus Torvalds 已提交
1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221
}

/**************************************************************************
* qla2xxx_eh_host_reset
*
* Description:
*    The reset function will reset the Adapter.
*
* Input:
*      cmd = Linux SCSI command packet of the command that cause the
*            adapter reset.
*
* Returns:
*      Either SUCCESS or FAILED.
*
* Note:
**************************************************************************/
1222
static int
L
Linus Torvalds 已提交
1223 1224
qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
{
1225 1226
	scsi_qla_host_t *vha = shost_priv(cmd->device->host);
	struct qla_hw_data *ha = vha->hw;
1227
	int ret = FAILED;
已提交
1228
	unsigned int id, lun;
1229
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
L
Linus Torvalds 已提交
1230

已提交
1231 1232 1233
	id = cmd->device->id;
	lun = cmd->device->lun;

1234
	ql_log(ql_log_info, vha, 0x8018,
1235
	    "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
L
Linus Torvalds 已提交
1236

1237
	if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
已提交
1238
		goto eh_host_reset_lock;
L
Linus Torvalds 已提交
1239

1240 1241
	if (vha != base_vha) {
		if (qla2x00_vp_abort_isp(vha))
已提交
1242
			goto eh_host_reset_lock;
1243
	} else {
1244
		if (IS_P3P_TYPE(vha->hw)) {
1245 1246 1247 1248 1249 1250 1251
			if (!qla82xx_fcoe_ctx_reset(vha)) {
				/* Ctx reset success */
				ret = SUCCESS;
				goto eh_host_reset_lock;
			}
			/* fall thru if ctx reset failed */
		}
1252 1253 1254
		if (ha->wq)
			flush_workqueue(ha->wq);

1255
		set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1256
		if (ha->isp_ops->abort_isp(base_vha)) {
1257 1258 1259 1260
			clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
			/* failed. schedule dpc to try */
			set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);

1261 1262 1263
			if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
				ql_log(ql_log_warn, vha, 0x802a,
				    "wait for hba online failed.\n");
1264
				goto eh_host_reset_lock;
1265
			}
1266 1267
		}
		clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
A
Andrew Vasquez 已提交
1268
	}
L
Linus Torvalds 已提交
1269

1270
	/* Waiting for command to be returned to OS.*/
1271
	if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1272
		QLA_SUCCESS)
已提交
1273
		ret = SUCCESS;
L
Linus Torvalds 已提交
1274

已提交
1275
eh_host_reset_lock:
1276 1277 1278
	ql_log(ql_log_info, vha, 0x8017,
	    "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
	    (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
L
Linus Torvalds 已提交
1279

已提交
1280 1281
	return ret;
}
L
Linus Torvalds 已提交
1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292

/*
* qla2x00_loop_reset
*      Issue loop reset.
*
* Input:
*      ha = adapter block pointer.
*
* Returns:
*      0 = success
*/
1293
int
1294
qla2x00_loop_reset(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
1295
{
1296
	int ret;
1297
	struct fc_port *fcport;
1298
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
1299

1300 1301 1302 1303
	if (IS_QLAFX00(ha)) {
		return qlafx00_loop_reset(vha);
	}

1304
	if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1305 1306 1307 1308 1309 1310
		list_for_each_entry(fcport, &vha->vp_fcports, list) {
			if (fcport->port_type != FCT_TARGET)
				continue;

			ret = ha->isp_ops->target_reset(fcport, 0, 0);
			if (ret != QLA_SUCCESS) {
1311
				ql_dbg(ql_dbg_taskm, vha, 0x802c,
1312
				    "Bus Reset failed: Reset=%d "
1313
				    "d_id=%x.\n", ret, fcport->d_id.b24);
1314 1315 1316 1317
			}
		}
	}

1318

1319
	if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1320 1321 1322
		atomic_set(&vha->loop_state, LOOP_DOWN);
		atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
		qla2x00_mark_all_devices_lost(vha, 0);
1323
		ret = qla2x00_full_login_lip(vha);
1324
		if (ret != QLA_SUCCESS) {
1325 1326
			ql_dbg(ql_dbg_taskm, vha, 0x802d,
			    "full_login_lip=%d.\n", ret);
1327
		}
1328 1329
	}

1330
	if (ha->flags.enable_lip_reset) {
1331
		ret = qla2x00_lip_reset(vha);
1332
		if (ret != QLA_SUCCESS)
1333 1334
			ql_dbg(ql_dbg_taskm, vha, 0x802e,
			    "lip_reset failed (%d).\n", ret);
L
Linus Torvalds 已提交
1335 1336 1337
	}

	/* Issue marker command only when we are going to start the I/O */
1338
	vha->marker_needed = 1;
L
Linus Torvalds 已提交
1339

1340
	return QLA_SUCCESS;
L
Linus Torvalds 已提交
1341 1342
}

1343
void
1344
qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1345
{
1346
	int que, cnt;
1347 1348
	unsigned long flags;
	srb_t *sp;
1349
	struct qla_hw_data *ha = vha->hw;
1350
	struct req_que *req;
1351 1352

	spin_lock_irqsave(&ha->hardware_lock, flags);
1353
	for (que = 0; que < ha->max_req_queues; que++) {
1354
		req = ha->req_q_map[que];
1355 1356
		if (!req)
			continue;
1357 1358 1359
		if (!req->outstanding_cmds)
			continue;
		for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1360
			sp = req->outstanding_cmds[cnt];
1361
			if (sp) {
1362
				req->outstanding_cmds[cnt] = NULL;
1363
				sp->done(vha, sp, res);
1364
			}
1365 1366 1367 1368 1369
		}
	}
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
}

已提交
1370 1371
static int
qla2xxx_slave_alloc(struct scsi_device *sdev)
L
Linus Torvalds 已提交
1372
{
1373
	struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
L
Linus Torvalds 已提交
1374

1375
	if (!rport || fc_remote_port_chkready(rport))
已提交
1376
		return -ENXIO;
1377

1378
	sdev->hostdata = *(fc_port_t **)rport->dd_data;
L
Linus Torvalds 已提交
1379

已提交
1380 1381
	return 0;
}
L
Linus Torvalds 已提交
1382

已提交
1383 1384 1385
static int
qla2xxx_slave_configure(struct scsi_device *sdev)
{
1386
	scsi_qla_host_t *vha = shost_priv(sdev->host);
1387
	struct req_que *req = vha->req;
已提交
1388

1389 1390 1391
	if (IS_T10_PI_CAPABLE(vha->hw))
		blk_queue_update_dma_alignment(sdev->request_queue, 0x7);

已提交
1392
	if (sdev->tagged_supported)
1393
		scsi_activate_tcq(sdev, req->max_q_depth);
已提交
1394
	else
1395
		scsi_deactivate_tcq(sdev, req->max_q_depth);
已提交
1396 1397
	return 0;
}
L
Linus Torvalds 已提交
1398

已提交
1399 1400 1401 1402
static void
qla2xxx_slave_destroy(struct scsi_device *sdev)
{
	sdev->hostdata = NULL;
L
Linus Torvalds 已提交
1403 1404
}

1405 1406 1407 1408 1409 1410 1411
static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
{
	fc_port_t *fcport = (struct fc_port *) sdev->hostdata;

	if (!scsi_track_queue_full(sdev, qdepth))
		return;

1412
	ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1413 1414
	    "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
	    sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434
}

static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
{
	fc_port_t *fcport = sdev->hostdata;
	struct scsi_qla_host *vha = fcport->vha;
	struct req_que *req = NULL;

	req = vha->req;
	if (!req)
		return;

	if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
		return;

	if (sdev->ordered_tags)
		scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
	else
		scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);

1435
	ql_dbg(ql_dbg_io, vha, 0x302a,
1436 1437
	    "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
	    sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1438 1439
}

1440
static int
1441
qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1442
{
1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453
	switch (reason) {
	case SCSI_QDEPTH_DEFAULT:
		scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
		break;
	case SCSI_QDEPTH_QFULL:
		qla2x00_handle_queue_full(sdev, qdepth);
		break;
	case SCSI_QDEPTH_RAMP_UP:
		qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
		break;
	default:
1454
		return -EOPNOTSUPP;
1455
	}
1456

1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474
	return sdev->queue_depth;
}

static int
qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
{
	if (sdev->tagged_supported) {
		scsi_set_tag_type(sdev, tag_type);
		if (tag_type)
			scsi_activate_tcq(sdev, sdev->queue_depth);
		else
			scsi_deactivate_tcq(sdev, sdev->queue_depth);
	} else
		tag_type = 0;

	return tag_type;
}

L
Linus Torvalds 已提交
1475 1476 1477 1478 1479 1480 1481 1482
/**
 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
 * @ha: HA context
 *
 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
 * supported addressing method.
 */
static void
1483
qla2x00_config_dma_addressing(struct qla_hw_data *ha)
L
Linus Torvalds 已提交
1484
{
1485
	/* Assume a 32bit DMA mask. */
L
Linus Torvalds 已提交
1486 1487
	ha->flags.enable_64bit_addressing = 0;

1488
	if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1489 1490
		/* Any upper-dword bits set? */
		if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1491
		    !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1492
			/* Ok, a 64bit DMA mask is applicable. */
L
Linus Torvalds 已提交
1493
			ha->flags.enable_64bit_addressing = 1;
1494 1495
			ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
			ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1496
			return;
L
Linus Torvalds 已提交
1497 1498
		}
	}
1499

1500 1501
	dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
	pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
L
Linus Torvalds 已提交
1502 1503
}

1504
static void
1505
qla2x00_enable_intrs(struct qla_hw_data *ha)
1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519
{
	unsigned long flags = 0;
	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;

	spin_lock_irqsave(&ha->hardware_lock, flags);
	ha->interrupts_on = 1;
	/* enable risc and host interrupts */
	WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
	RD_REG_WORD(&reg->ictrl);
	spin_unlock_irqrestore(&ha->hardware_lock, flags);

}

static void
1520
qla2x00_disable_intrs(struct qla_hw_data *ha)
1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533
{
	unsigned long flags = 0;
	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;

	spin_lock_irqsave(&ha->hardware_lock, flags);
	ha->interrupts_on = 0;
	/* disable risc and host interrupts */
	WRT_REG_WORD(&reg->ictrl, 0);
	RD_REG_WORD(&reg->ictrl);
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
}

static void
1534
qla24xx_enable_intrs(struct qla_hw_data *ha)
1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546
{
	unsigned long flags = 0;
	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;

	spin_lock_irqsave(&ha->hardware_lock, flags);
	ha->interrupts_on = 1;
	WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
	RD_REG_DWORD(&reg->ictrl);
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
}

static void
1547
qla24xx_disable_intrs(struct qla_hw_data *ha)
1548 1549 1550 1551
{
	unsigned long flags = 0;
	struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;

1552 1553
	if (IS_NOPOLLING_TYPE(ha))
		return;
1554 1555 1556 1557 1558 1559 1560
	spin_lock_irqsave(&ha->hardware_lock, flags);
	ha->interrupts_on = 0;
	WRT_REG_DWORD(&reg->ictrl, 0);
	RD_REG_DWORD(&reg->ictrl);
	spin_unlock_irqrestore(&ha->hardware_lock, flags);
}

1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669
static int
qla2x00_iospace_config(struct qla_hw_data *ha)
{
	resource_size_t pio;
	uint16_t msix;
	int cpus;

	if (pci_request_selected_regions(ha->pdev, ha->bars,
	    QLA2XXX_DRIVER_NAME)) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
		    "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}
	if (!(ha->bars & 1))
		goto skip_pio;

	/* We only need PIO for Flash operations on ISP2312 v2 chips. */
	pio = pci_resource_start(ha->pdev, 0);
	if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
		if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
			ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
			    "Invalid pci I/O region size (%s).\n",
			    pci_name(ha->pdev));
			pio = 0;
		}
	} else {
		ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
		    "Region #0 no a PIO resource (%s).\n",
		    pci_name(ha->pdev));
		pio = 0;
	}
	ha->pio_address = pio;
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
	    "PIO address=%llu.\n",
	    (unsigned long long)ha->pio_address);

skip_pio:
	/* Use MMIO operations for all accesses. */
	if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
		    "Region #1 not an MMIO resource (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}
	if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
		    "Invalid PCI mem region size (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}

	ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
	if (!ha->iobase) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
		    "Cannot remap MMIO (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}

	/* Determine queue resources */
	ha->max_req_queues = ha->max_rsp_queues = 1;
	if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
		(ql2xmaxqueues > 1 && ql2xmultique_tag) ||
		(!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
		goto mqiobase_exit;

	ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
			pci_resource_len(ha->pdev, 3));
	if (ha->mqiobase) {
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
		    "MQIO Base=%p.\n", ha->mqiobase);
		/* Read MSIX vector size of the board */
		pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
		ha->msix_count = msix;
		/* Max queues are bounded by available msix vectors */
		/* queue 0 uses two msix vectors */
		if (ql2xmultique_tag) {
			cpus = num_online_cpus();
			ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
				(cpus + 1) : (ha->msix_count - 1);
			ha->max_req_queues = 2;
		} else if (ql2xmaxqueues > 1) {
			ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
			    QLA_MQ_SIZE : ql2xmaxqueues;
			ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
			    "QoS mode set, max no of request queues:%d.\n",
			    ha->max_req_queues);
			ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
			    "QoS mode set, max no of request queues:%d.\n",
			    ha->max_req_queues);
		}
		ql_log_pci(ql_log_info, ha->pdev, 0x001a,
		    "MSI-X vector count: %d.\n", msix);
	} else
		ql_log_pci(ql_log_info, ha->pdev, 0x001b,
		    "BAR 3 not enabled.\n");

mqiobase_exit:
	ha->msix_count = ha->max_rsp_queues + 1;
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
	    "MSIX Count:%d.\n", ha->msix_count);
	return (0);

iospace_error_exit:
	return (-ENOMEM);
}


1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751
static int
qla83xx_iospace_config(struct qla_hw_data *ha)
{
	uint16_t msix;
	int cpus;

	if (pci_request_selected_regions(ha->pdev, ha->bars,
	    QLA2XXX_DRIVER_NAME)) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
		    "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
		    pci_name(ha->pdev));

		goto iospace_error_exit;
	}

	/* Use MMIO operations for all accesses. */
	if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
		ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
		    "Invalid pci I/O region size (%s).\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}
	if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
		ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
		    "Invalid PCI mem region size (%s), aborting\n",
			pci_name(ha->pdev));
		goto iospace_error_exit;
	}

	ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
	if (!ha->iobase) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
		    "Cannot remap MMIO (%s), aborting.\n",
		    pci_name(ha->pdev));
		goto iospace_error_exit;
	}

	/* 64bit PCI BAR - BAR2 will correspoond to region 4 */
	/* 83XX 26XX always use MQ type access for queues
	 * - mbar 2, a.k.a region 4 */
	ha->max_req_queues = ha->max_rsp_queues = 1;
	ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
			pci_resource_len(ha->pdev, 4));

	if (!ha->mqiobase) {
		ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
		    "BAR2/region4 not enabled\n");
		goto mqiobase_exit;
	}

	ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
			pci_resource_len(ha->pdev, 2));
	if (ha->msixbase) {
		/* Read MSIX vector size of the board */
		pci_read_config_word(ha->pdev,
		    QLA_83XX_PCI_MSIX_CONTROL, &msix);
		ha->msix_count = msix;
		/* Max queues are bounded by available msix vectors */
		/* queue 0 uses two msix vectors */
		if (ql2xmultique_tag) {
			cpus = num_online_cpus();
			ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
				(cpus + 1) : (ha->msix_count - 1);
			ha->max_req_queues = 2;
		} else if (ql2xmaxqueues > 1) {
			ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
						QLA_MQ_SIZE : ql2xmaxqueues;
			ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
			    "QoS mode set, max no of request queues:%d.\n",
			    ha->max_req_queues);
			ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
			    "QoS mode set, max no of request queues:%d.\n",
			    ha->max_req_queues);
		}
		ql_log_pci(ql_log_info, ha->pdev, 0x011c,
		    "MSI-X vector count: %d.\n", msix);
	} else
		ql_log_pci(ql_log_info, ha->pdev, 0x011e,
		    "BAR 1 not enabled.\n");

mqiobase_exit:
	ha->msix_count = ha->max_rsp_queues + 1;
1752 1753 1754

	qlt_83xx_iospace_config(ha);

1755 1756 1757 1758 1759 1760 1761 1762
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
	    "MSIX Count:%d.\n", ha->msix_count);
	return 0;

iospace_error_exit:
	return -ENOMEM;
}

1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777
static struct isp_operations qla2100_isp_ops = {
	.pci_config		= qla2100_pci_config,
	.reset_chip		= qla2x00_reset_chip,
	.chip_diag		= qla2x00_chip_diag,
	.config_rings		= qla2x00_config_rings,
	.reset_adapter		= qla2x00_reset_adapter,
	.nvram_config		= qla2x00_nvram_config,
	.update_fw_options	= qla2x00_update_fw_options,
	.load_risc		= qla2x00_load_risc,
	.pci_info_str		= qla2x00_pci_info_str,
	.fw_version_str		= qla2x00_fw_version_str,
	.intr_handler		= qla2100_intr_handler,
	.enable_intrs		= qla2x00_enable_intrs,
	.disable_intrs		= qla2x00_disable_intrs,
	.abort_command		= qla2x00_abort_command,
1778 1779
	.target_reset		= qla2x00_abort_target,
	.lun_reset		= qla2x00_lun_reset,
1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794
	.fabric_login		= qla2x00_login_fabric,
	.fabric_logout		= qla2x00_fabric_logout,
	.calc_req_entries	= qla2x00_calc_iocbs_32,
	.build_iocbs		= qla2x00_build_scsi_iocbs_32,
	.prep_ms_iocb		= qla2x00_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla2x00_prep_ms_fdmi_iocb,
	.read_nvram		= qla2x00_read_nvram_data,
	.write_nvram		= qla2x00_write_nvram_data,
	.fw_dump		= qla2100_fw_dump,
	.beacon_on		= NULL,
	.beacon_off		= NULL,
	.beacon_blink		= NULL,
	.read_optrom		= qla2x00_read_optrom_data,
	.write_optrom		= qla2x00_write_optrom_data,
	.get_flash_version	= qla2x00_get_flash_version,
1795
	.start_scsi		= qla2x00_start_scsi,
1796
	.abort_isp		= qla2x00_abort_isp,
1797
	.iospace_config     	= qla2x00_iospace_config,
1798
	.initialize_adapter	= qla2x00_initialize_adapter,
1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815
};

static struct isp_operations qla2300_isp_ops = {
	.pci_config		= qla2300_pci_config,
	.reset_chip		= qla2x00_reset_chip,
	.chip_diag		= qla2x00_chip_diag,
	.config_rings		= qla2x00_config_rings,
	.reset_adapter		= qla2x00_reset_adapter,
	.nvram_config		= qla2x00_nvram_config,
	.update_fw_options	= qla2x00_update_fw_options,
	.load_risc		= qla2x00_load_risc,
	.pci_info_str		= qla2x00_pci_info_str,
	.fw_version_str		= qla2x00_fw_version_str,
	.intr_handler		= qla2300_intr_handler,
	.enable_intrs		= qla2x00_enable_intrs,
	.disable_intrs		= qla2x00_disable_intrs,
	.abort_command		= qla2x00_abort_command,
1816 1817
	.target_reset		= qla2x00_abort_target,
	.lun_reset		= qla2x00_lun_reset,
1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832
	.fabric_login		= qla2x00_login_fabric,
	.fabric_logout		= qla2x00_fabric_logout,
	.calc_req_entries	= qla2x00_calc_iocbs_32,
	.build_iocbs		= qla2x00_build_scsi_iocbs_32,
	.prep_ms_iocb		= qla2x00_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla2x00_prep_ms_fdmi_iocb,
	.read_nvram		= qla2x00_read_nvram_data,
	.write_nvram		= qla2x00_write_nvram_data,
	.fw_dump		= qla2300_fw_dump,
	.beacon_on		= qla2x00_beacon_on,
	.beacon_off		= qla2x00_beacon_off,
	.beacon_blink		= qla2x00_beacon_blink,
	.read_optrom		= qla2x00_read_optrom_data,
	.write_optrom		= qla2x00_write_optrom_data,
	.get_flash_version	= qla2x00_get_flash_version,
1833
	.start_scsi		= qla2x00_start_scsi,
1834
	.abort_isp		= qla2x00_abort_isp,
1835
	.iospace_config		= qla2x00_iospace_config,
1836
	.initialize_adapter	= qla2x00_initialize_adapter,
1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853
};

static struct isp_operations qla24xx_isp_ops = {
	.pci_config		= qla24xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla24xx_nvram_config,
	.update_fw_options	= qla24xx_update_fw_options,
	.load_risc		= qla24xx_load_risc,
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
1854 1855
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= qla24xx_read_nvram_data,
	.write_nvram		= qla24xx_write_nvram_data,
	.fw_dump		= qla24xx_fw_dump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= qla24xx_beacon_blink,
	.read_optrom		= qla24xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
1871
	.start_scsi		= qla24xx_start_scsi,
1872
	.abort_isp		= qla2x00_abort_isp,
1873
	.iospace_config		= qla2x00_iospace_config,
1874
	.initialize_adapter	= qla2x00_initialize_adapter,
1875 1876
};

1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891
static struct isp_operations qla25xx_isp_ops = {
	.pci_config		= qla25xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla24xx_nvram_config,
	.update_fw_options	= qla24xx_update_fw_options,
	.load_risc		= qla24xx_load_risc,
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
1892 1893
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= qla25xx_read_nvram_data,
	.write_nvram		= qla25xx_write_nvram_data,
	.fw_dump		= qla25xx_fw_dump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= qla24xx_beacon_blink,
1906
	.read_optrom		= qla25xx_read_optrom_data,
1907 1908
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
1909
	.start_scsi		= qla24xx_dif_start_scsi,
1910
	.abort_isp		= qla2x00_abort_isp,
1911
	.iospace_config		= qla2x00_iospace_config,
1912
	.initialize_adapter	= qla2x00_initialize_adapter,
1913 1914
};

1915 1916 1917 1918 1919 1920 1921 1922
static struct isp_operations qla81xx_isp_ops = {
	.pci_config		= qla25xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla81xx_nvram_config,
	.update_fw_options	= qla81xx_update_fw_options,
1923
	.load_risc		= qla81xx_load_risc,
1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
1938 1939
	.read_nvram		= NULL,
	.write_nvram		= NULL,
1940 1941 1942
	.fw_dump		= qla81xx_fw_dump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
1943
	.beacon_blink		= qla83xx_beacon_blink,
1944 1945 1946
	.read_optrom		= qla25xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
1947
	.start_scsi		= qla24xx_dif_start_scsi,
1948
	.abort_isp		= qla2x00_abort_isp,
1949
	.iospace_config		= qla2x00_iospace_config,
1950
	.initialize_adapter	= qla2x00_initialize_adapter,
1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961
};

static struct isp_operations qla82xx_isp_ops = {
	.pci_config		= qla82xx_pci_config,
	.reset_chip		= qla82xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla82xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla81xx_nvram_config,
	.update_fw_options	= qla24xx_update_fw_options,
	.load_risc		= qla82xx_load_risc,
1962
	.pci_info_str		= qla24xx_pci_info_str,
1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla82xx_intr_handler,
	.enable_intrs		= qla82xx_enable_intrs,
	.disable_intrs		= qla82xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= qla24xx_read_nvram_data,
	.write_nvram		= qla24xx_write_nvram_data,
	.fw_dump		= qla24xx_fw_dump,
1979 1980 1981
	.beacon_on		= qla82xx_beacon_on,
	.beacon_off		= qla82xx_beacon_off,
	.beacon_blink		= NULL,
1982 1983
	.read_optrom		= qla82xx_read_optrom_data,
	.write_optrom		= qla82xx_write_optrom_data,
1984
	.get_flash_version	= qla82xx_get_flash_version,
1985 1986
	.start_scsi             = qla82xx_start_scsi,
	.abort_isp		= qla82xx_abort_isp,
1987
	.iospace_config     	= qla82xx_iospace_config,
1988
	.initialize_adapter	= qla2x00_initialize_adapter,
1989 1990
};

1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028
static struct isp_operations qla8044_isp_ops = {
	.pci_config		= qla82xx_pci_config,
	.reset_chip		= qla82xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla82xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla81xx_nvram_config,
	.update_fw_options	= qla24xx_update_fw_options,
	.load_risc		= qla82xx_load_risc,
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla8044_intr_handler,
	.enable_intrs		= qla82xx_enable_intrs,
	.disable_intrs		= qla82xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= NULL,
	.write_nvram		= NULL,
	.fw_dump		= qla24xx_fw_dump,
	.beacon_on		= qla82xx_beacon_on,
	.beacon_off		= qla82xx_beacon_off,
	.beacon_blink		= NULL,
	.read_optrom		= qla82xx_read_optrom_data,
	.write_optrom		= qla8044_write_optrom_data,
	.get_flash_version	= qla82xx_get_flash_version,
	.start_scsi             = qla82xx_start_scsi,
	.abort_isp		= qla8044_abort_isp,
	.iospace_config		= qla82xx_iospace_config,
	.initialize_adapter	= qla2x00_initialize_adapter,
};

2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063
static struct isp_operations qla83xx_isp_ops = {
	.pci_config		= qla25xx_pci_config,
	.reset_chip		= qla24xx_reset_chip,
	.chip_diag		= qla24xx_chip_diag,
	.config_rings		= qla24xx_config_rings,
	.reset_adapter		= qla24xx_reset_adapter,
	.nvram_config		= qla81xx_nvram_config,
	.update_fw_options	= qla81xx_update_fw_options,
	.load_risc		= qla81xx_load_risc,
	.pci_info_str		= qla24xx_pci_info_str,
	.fw_version_str		= qla24xx_fw_version_str,
	.intr_handler		= qla24xx_intr_handler,
	.enable_intrs		= qla24xx_enable_intrs,
	.disable_intrs		= qla24xx_disable_intrs,
	.abort_command		= qla24xx_abort_command,
	.target_reset		= qla24xx_abort_target,
	.lun_reset		= qla24xx_lun_reset,
	.fabric_login		= qla24xx_login_fabric,
	.fabric_logout		= qla24xx_fabric_logout,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= NULL,
	.write_nvram		= NULL,
	.fw_dump		= qla83xx_fw_dump,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= qla83xx_beacon_blink,
	.read_optrom		= qla25xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
	.start_scsi		= qla24xx_dif_start_scsi,
	.abort_isp		= qla2x00_abort_isp,
	.iospace_config		= qla83xx_iospace_config,
2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097 2098 2099 2100 2101 2102
	.initialize_adapter	= qla2x00_initialize_adapter,
};

static struct isp_operations qlafx00_isp_ops = {
	.pci_config		= qlafx00_pci_config,
	.reset_chip		= qlafx00_soft_reset,
	.chip_diag		= qlafx00_chip_diag,
	.config_rings		= qlafx00_config_rings,
	.reset_adapter		= qlafx00_soft_reset,
	.nvram_config		= NULL,
	.update_fw_options	= NULL,
	.load_risc		= NULL,
	.pci_info_str		= qlafx00_pci_info_str,
	.fw_version_str		= qlafx00_fw_version_str,
	.intr_handler		= qlafx00_intr_handler,
	.enable_intrs		= qlafx00_enable_intrs,
	.disable_intrs		= qlafx00_disable_intrs,
	.abort_command		= qlafx00_abort_command,
	.target_reset		= qlafx00_abort_target,
	.lun_reset		= qlafx00_lun_reset,
	.fabric_login		= NULL,
	.fabric_logout		= NULL,
	.calc_req_entries	= NULL,
	.build_iocbs		= NULL,
	.prep_ms_iocb		= qla24xx_prep_ms_iocb,
	.prep_ms_fdmi_iocb	= qla24xx_prep_ms_fdmi_iocb,
	.read_nvram		= qla24xx_read_nvram_data,
	.write_nvram		= qla24xx_write_nvram_data,
	.fw_dump		= NULL,
	.beacon_on		= qla24xx_beacon_on,
	.beacon_off		= qla24xx_beacon_off,
	.beacon_blink		= NULL,
	.read_optrom		= qla24xx_read_optrom_data,
	.write_optrom		= qla24xx_write_optrom_data,
	.get_flash_version	= qla24xx_get_flash_version,
	.start_scsi		= qlafx00_start_scsi,
	.abort_isp		= qlafx00_abort_isp,
	.iospace_config		= qlafx00_iospace_config,
	.initialize_adapter	= qlafx00_initialize_adapter,
2103 2104
};

2105
static inline void
2106
qla2x00_set_isp_flags(struct qla_hw_data *ha)
2107 2108 2109 2110 2111 2112
{
	ha->device_type = DT_EXTENDED_IDS;
	switch (ha->pdev->device) {
	case PCI_DEVICE_ID_QLOGIC_ISP2100:
		ha->device_type |= DT_ISP2100;
		ha->device_type &= ~DT_EXTENDED_IDS;
2113
		ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2114 2115 2116 2117
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2200:
		ha->device_type |= DT_ISP2200;
		ha->device_type &= ~DT_EXTENDED_IDS;
2118
		ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2119 2120 2121
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2300:
		ha->device_type |= DT_ISP2300;
2122
		ha->device_type |= DT_ZIO_SUPPORTED;
2123
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2124 2125 2126
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2312:
		ha->device_type |= DT_ISP2312;
2127
		ha->device_type |= DT_ZIO_SUPPORTED;
2128
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2129 2130 2131
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2322:
		ha->device_type |= DT_ISP2322;
2132
		ha->device_type |= DT_ZIO_SUPPORTED;
2133 2134 2135
		if (ha->pdev->subsystem_vendor == 0x1028 &&
		    ha->pdev->subsystem_device == 0x0170)
			ha->device_type |= DT_OEM_001;
2136
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2137 2138 2139
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP6312:
		ha->device_type |= DT_ISP6312;
2140
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2141 2142 2143
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP6322:
		ha->device_type |= DT_ISP6322;
2144
		ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2145 2146 2147
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2422:
		ha->device_type |= DT_ISP2422;
2148
		ha->device_type |= DT_ZIO_SUPPORTED;
2149
		ha->device_type |= DT_FWI2;
2150
		ha->device_type |= DT_IIDMA;
2151
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2152 2153 2154
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP2432:
		ha->device_type |= DT_ISP2432;
2155
		ha->device_type |= DT_ZIO_SUPPORTED;
2156
		ha->device_type |= DT_FWI2;
2157
		ha->device_type |= DT_IIDMA;
2158
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2159
		break;
2160 2161 2162 2163 2164 2165 2166
	case PCI_DEVICE_ID_QLOGIC_ISP8432:
		ha->device_type |= DT_ISP8432;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2167 2168
	case PCI_DEVICE_ID_QLOGIC_ISP5422:
		ha->device_type |= DT_ISP5422;
2169
		ha->device_type |= DT_FWI2;
2170
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2171
		break;
2172 2173
	case PCI_DEVICE_ID_QLOGIC_ISP5432:
		ha->device_type |= DT_ISP5432;
2174
		ha->device_type |= DT_FWI2;
2175
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2176
		break;
2177 2178 2179 2180 2181
	case PCI_DEVICE_ID_QLOGIC_ISP2532:
		ha->device_type |= DT_ISP2532;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
2182
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2183
		break;
2184 2185 2186 2187 2188 2189 2190
	case PCI_DEVICE_ID_QLOGIC_ISP8001:
		ha->device_type |= DT_ISP8001;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2191 2192 2193 2194 2195 2196 2197 2198
	case PCI_DEVICE_ID_QLOGIC_ISP8021:
		ha->device_type |= DT_ISP8021;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		/* Initialize 82XX ISP flags */
		qla82xx_init_flags(ha);
		break;
2199 2200 2201 2202 2203 2204 2205 2206
	 case PCI_DEVICE_ID_QLOGIC_ISP8044:
		ha->device_type |= DT_ISP8044;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		/* Initialize 82XX ISP flags */
		qla82xx_init_flags(ha);
		break;
2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222
	case PCI_DEVICE_ID_QLOGIC_ISP2031:
		ha->device_type |= DT_ISP2031;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->device_type |= DT_T10_PI;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
	case PCI_DEVICE_ID_QLOGIC_ISP8031:
		ha->device_type |= DT_ISP8031;
		ha->device_type |= DT_ZIO_SUPPORTED;
		ha->device_type |= DT_FWI2;
		ha->device_type |= DT_IIDMA;
		ha->device_type |= DT_T10_PI;
		ha->fw_srisc_address = RISC_START_ADDRESS_2400;
		break;
2223 2224 2225
	case PCI_DEVICE_ID_QLOGIC_ISPF001:
		ha->device_type |= DT_ISPFX00;
		break;
2226
	}
2227

2228 2229 2230 2231 2232 2233
	if (IS_QLA82XX(ha))
		ha->port_no = !(ha->portnum & 1);
	else
		/* Get adapter physical port no from interrupt pin register. */
		pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);

2234 2235 2236 2237
	if (ha->port_no & 1)
		ha->flags.port0 = 1;
	else
		ha->flags.port0 = 0;
2238
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2239
	    "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2240
	    ha->device_type, ha->flags.port0, ha->fw_srisc_address);
2241 2242
}

2243 2244 2245
static void
qla2xxx_scan_start(struct Scsi_Host *shost)
{
2246
	scsi_qla_host_t *vha = shost_priv(shost);
2247

2248 2249 2250
	if (vha->hw->flags.running_gold_fw)
		return;

2251 2252 2253 2254
	set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
	set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
	set_bit(RSCN_UPDATE, &vha->dpc_flags);
	set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2255 2256 2257 2258 2259
}

static int
qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
{
2260
	scsi_qla_host_t *vha = shost_priv(shost);
2261

2262
	if (!vha->host)
2263
		return 1;
2264
	if (time > vha->hw->loop_reset_delay * HZ)
2265 2266
		return 1;

2267
	return atomic_read(&vha->loop_state) == LOOP_READY;
2268 2269
}

L
Linus Torvalds 已提交
2270 2271 2272
/*
 * PCI driver interface
 */
2273
static int
2274
qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
L
Linus Torvalds 已提交
2275
{
2276
	int	ret = -ENODEV;
L
Linus Torvalds 已提交
2277
	struct Scsi_Host *host;
2278 2279
	scsi_qla_host_t *base_vha = NULL;
	struct qla_hw_data *ha;
2280
	char pci_info[30];
2281
	char fw_str[30], wq_name[30];
2282
	struct scsi_host_template *sht;
2283
	int bars, mem_only = 0;
2284
	uint16_t req_length = 0, rsp_length = 0;
2285 2286
	struct req_que *req = NULL;
	struct rsp_que *rsp = NULL;
2287
	bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2288
	sht = &qla2xxx_driver_template;
2289
	if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2290
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2291
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2292
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2293
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2294
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2295
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2296 2297
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2298
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2299 2300
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
	    pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044) {
2301
		bars = pci_select_bars(pdev, IORESOURCE_MEM);
2302
		mem_only = 1;
2303 2304
		ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
		    "Mem only adapter.\n");
2305
	}
2306 2307
	ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
	    "Bars=%d.\n", bars);
2308

2309 2310 2311 2312 2313 2314 2315
	if (mem_only) {
		if (pci_enable_device_mem(pdev))
			goto probe_out;
	} else {
		if (pci_enable_device(pdev))
			goto probe_out;
	}
2316

2317 2318
	/* This may fail but that's ok */
	pci_enable_pcie_error_reporting(pdev);
2319

2320 2321
	ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
	if (!ha) {
2322 2323
		ql_log_pci(ql_log_fatal, pdev, 0x0009,
		    "Unable to allocate memory for ha.\n");
2324
		goto probe_out;
L
Linus Torvalds 已提交
2325
	}
2326 2327
	ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
	    "Memory allocated for ha=%p.\n", ha);
2328
	ha->pdev = pdev;
2329
	ha->tgt.enable_class_2 = ql2xenableclass2;
L
Linus Torvalds 已提交
2330 2331

	/* Clear our data area */
2332
	ha->bars = bars;
2333
	ha->mem_only = mem_only;
2334
	spin_lock_init(&ha->hardware_lock);
2335
	spin_lock_init(&ha->vport_slock);
2336
	mutex_init(&ha->selflogin_lock);
L
Linus Torvalds 已提交
2337

2338 2339
	/* Set ISP-type information. */
	qla2x00_set_isp_flags(ha);
2340 2341

	/* Set EEH reset type to fundamental if required by hba */
2342 2343
	if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
	    IS_QLA83XX(ha))
2344 2345
		pdev->needs_freset = 1;

2346 2347 2348 2349 2350
	ha->prev_topology = 0;
	ha->init_cb_size = sizeof(init_cb_t);
	ha->link_data_rate = PORT_SPEED_UNKNOWN;
	ha->optrom_size = OPTROM_SIZE_2300;

2351
	/* Assign ISP specific operations. */
L
Linus Torvalds 已提交
2352
	if (IS_QLA2100(ha)) {
2353
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
L
Linus Torvalds 已提交
2354
		ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2355 2356 2357
		req_length = REQUEST_ENTRY_CNT_2100;
		rsp_length = RESPONSE_ENTRY_CNT_2100;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2358
		ha->gid_list_info_size = 4;
2359 2360 2361 2362
		ha->flash_conf_off = ~0;
		ha->flash_data_off = ~0;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2363
		ha->isp_ops = &qla2100_isp_ops;
L
Linus Torvalds 已提交
2364
	} else if (IS_QLA2200(ha)) {
2365
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2366
		ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2367 2368 2369
		req_length = REQUEST_ENTRY_CNT_2200;
		rsp_length = RESPONSE_ENTRY_CNT_2100;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2370
		ha->gid_list_info_size = 4;
2371 2372 2373 2374
		ha->flash_conf_off = ~0;
		ha->flash_data_off = ~0;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2375
		ha->isp_ops = &qla2100_isp_ops;
2376
	} else if (IS_QLA23XX(ha)) {
2377
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
L
Linus Torvalds 已提交
2378
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
2379 2380 2381
		req_length = REQUEST_ENTRY_CNT_2200;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2382
		ha->gid_list_info_size = 6;
2383 2384
		if (IS_QLA2322(ha) || IS_QLA6322(ha))
			ha->optrom_size = OPTROM_SIZE_2322;
2385 2386 2387 2388
		ha->flash_conf_off = ~0;
		ha->flash_data_off = ~0;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2389
		ha->isp_ops = &qla2300_isp_ops;
2390
	} else if (IS_QLA24XX_TYPE(ha)) {
2391
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2392
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
2393 2394
		req_length = REQUEST_ENTRY_CNT_24XX;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
2395
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2396
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2397
		ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2398
		ha->gid_list_info_size = 8;
2399
		ha->optrom_size = OPTROM_SIZE_24XX;
2400
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2401
		ha->isp_ops = &qla24xx_isp_ops;
2402 2403 2404 2405
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
		ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
		ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2406
	} else if (IS_QLA25XX(ha)) {
2407
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2408
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
2409 2410
		req_length = REQUEST_ENTRY_CNT_24XX;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
2411
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2412
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2413 2414 2415
		ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_25XX;
2416
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2417
		ha->isp_ops = &qla25xx_isp_ops;
2418 2419 2420 2421 2422
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
		ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
		ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
	} else if (IS_QLA81XX(ha)) {
2423
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2424 2425 2426
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
		req_length = REQUEST_ENTRY_CNT_24XX;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
2427
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2428 2429 2430 2431
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_81XX;
2432
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2433 2434 2435 2436 2437
		ha->isp_ops = &qla81xx_isp_ops;
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2438
	} else if (IS_QLA82XX(ha)) {
2439
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2440 2441 2442 2443 2444 2445 2446
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
		req_length = REQUEST_ENTRY_CNT_82XX;
		rsp_length = RESPONSE_ENTRY_CNT_82XX;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_82XX;
2447
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2448 2449 2450 2451 2452
		ha->isp_ops = &qla82xx_isp_ops;
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
		ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
		ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466 2467
	} else if (IS_QLA8044(ha)) {
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
		req_length = REQUEST_ENTRY_CNT_82XX;
		rsp_length = RESPONSE_ENTRY_CNT_82XX;
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_83XX;
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
		ha->isp_ops = &qla8044_isp_ops;
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
		ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
		ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2468
	} else if (IS_QLA83XX(ha)) {
2469
		ha->portnum = PCI_FUNC(ha->pdev->devfn);
2470
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2471 2472 2473
		ha->mbx_count = MAILBOX_REGISTER_COUNT;
		req_length = REQUEST_ENTRY_CNT_24XX;
		rsp_length = RESPONSE_ENTRY_CNT_2300;
2474
		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2475 2476 2477 2478 2479 2480 2481 2482 2483 2484
		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
		ha->gid_list_info_size = 8;
		ha->optrom_size = OPTROM_SIZE_83XX;
		ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
		ha->isp_ops = &qla83xx_isp_ops;
		ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
		ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
		ha->nvram_conf_off = ~0;
		ha->nvram_data_off = ~0;
2485 2486 2487 2488 2489 2490 2491 2492 2493 2494 2495
	}  else if (IS_QLAFX00(ha)) {
		ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
		ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
		ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
		req_length = REQUEST_ENTRY_CNT_FX00;
		rsp_length = RESPONSE_ENTRY_CNT_FX00;
		ha->init_cb_size = sizeof(struct init_cb_fx);
		ha->isp_ops = &qlafx00_isp_ops;
		ha->port_down_retry_count = 30; /* default value */
		ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
		ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2496
		ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2497
		ha->mr.fw_hbt_en = 1;
L
Linus Torvalds 已提交
2498
	}
2499

2500 2501 2502
	ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
	    "mbx_count=%d, req_length=%d, "
	    "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2503 2504
	    "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
	    "max_fibre_devices=%d.\n",
2505 2506
	    ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
	    ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2507
	    ha->nvram_npiv_size, ha->max_fibre_devices);
2508 2509 2510 2511 2512
	ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
	    "isp_ops=%p, flash_conf_off=%d, "
	    "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
	    ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
	    ha->nvram_conf_off, ha->nvram_data_off);
2513 2514 2515 2516

	/* Configure PCI I/O space */
	ret = ha->isp_ops->iospace_config(ha);
	if (ret)
2517
		goto iospace_config_failed;
2518 2519 2520 2521

	ql_log_pci(ql_log_info, pdev, 0x001d,
	    "Found an ISP%04X irq %d iobase 0x%p.\n",
	    pdev->device, pdev->irq, ha->iobase);
2522
	mutex_init(&ha->vport_lock);
2523 2524 2525
	init_completion(&ha->mbx_cmd_comp);
	complete(&ha->mbx_cmd_comp);
	init_completion(&ha->mbx_intr_comp);
2526
	init_completion(&ha->dcbx_comp);
2527
	init_completion(&ha->lb_portup_comp);
L
Linus Torvalds 已提交
2528

2529
	set_bit(0, (unsigned long *) ha->vp_idx_map);
L
Linus Torvalds 已提交
2530

2531
	qla2x00_config_dma_addressing(ha);
2532 2533 2534 2535
	ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
	    "64 Bit addressing is %s.\n",
	    ha->flags.enable_64bit_addressing ? "enable" :
	    "disable");
2536
	ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2537
	if (!ret) {
2538 2539
		ql_log_pci(ql_log_fatal, pdev, 0x0031,
		    "Failed to allocate memory for adapter, aborting.\n");
L
Linus Torvalds 已提交
2540

2541 2542 2543
		goto probe_hw_failed;
	}

2544
	req->max_q_depth = MAX_Q_DEPTH;
2545
	if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2546 2547
		req->max_q_depth = ql2xmaxqdepth;

2548 2549 2550

	base_vha = qla2x00_create_host(sht, ha);
	if (!base_vha) {
2551
		ret = -ENOMEM;
2552
		qla2x00_mem_free(ha);
2553 2554
		qla2x00_free_req_que(ha, req);
		qla2x00_free_rsp_que(ha, rsp);
2555
		goto probe_hw_failed;
L
Linus Torvalds 已提交
2556 2557
	}

2558 2559 2560
	pci_set_drvdata(pdev, base_vha);

	host = base_vha->host;
2561
	base_vha->req = req;
2562 2563 2564 2565
	if (IS_QLAFX00(ha))
		host->can_queue = 1024;
	else
		host->can_queue = req->length + 128;
2566
	if (IS_QLA2XXX_MIDTYPE(ha))
2567
		base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2568
	else
2569 2570
		base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
						base_vha->vp_idx;
2571

2572 2573 2574 2575 2576 2577 2578 2579
	/* Setup fcport template structure. */
	ha->mr.fcport.vha = base_vha;
	ha->mr.fcport.port_type = FCT_UNKNOWN;
	ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
	qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
	ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
	ha->mr.fcport.scan_state = 1;

2580 2581 2582 2583 2584 2585 2586 2587
	/* Set the SG table size based on ISP type */
	if (!IS_FWI2_CAPABLE(ha)) {
		if (IS_QLA2100(ha))
			host->sg_tablesize = 32;
	} else {
		if (!IS_QLA82XX(ha))
			host->sg_tablesize = QLA_SG_ALL;
	}
2588 2589 2590 2591 2592
	ql_dbg(ql_dbg_init, base_vha, 0x0032,
	    "can_queue=%d, req=%p, "
	    "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
	    host->can_queue, base_vha->req,
	    base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2593
	host->max_id = ha->max_fibre_devices;
2594 2595
	host->cmd_per_lun = 3;
	host->unique_id = host->host_no;
2596
	if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2597 2598 2599
		host->max_cmd_len = 32;
	else
		host->max_cmd_len = MAX_CMDSZ;
2600
	host->max_channel = MAX_BUSES - 1;
2601
	host->max_lun = ql2xmaxlun;
2602
	host->transportt = qla2xxx_transport_template;
2603
	sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2604

2605 2606 2607
	ql_dbg(ql_dbg_init, base_vha, 0x0033,
	    "max_id=%d this_id=%d "
	    "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2608
	    "max_lun=%d transportt=%p, vendor_id=%llu.\n", host->max_id,
2609 2610 2611 2612
	    host->this_id, host->cmd_per_lun, host->unique_id,
	    host->max_cmd_len, host->max_channel, host->max_lun,
	    host->transportt, sht->vendor_id);

2613 2614 2615 2616 2617 2618 2619 2620 2621
que_init:
	/* Alloc arrays of request and response ring ptrs */
	if (!qla2x00_alloc_queues(ha, req, rsp)) {
		ql_log(ql_log_fatal, base_vha, 0x003d,
		    "Failed to allocate memory for queue pointers..."
		    "aborting.\n");
		goto probe_init_failed;
	}

2622
	qlt_probe_one_stage1(base_vha, ha);
2623

2624 2625 2626
	/* Set up the irqs */
	ret = qla2x00_request_irqs(ha, rsp);
	if (ret)
2627
		goto probe_init_failed;
2628 2629 2630

	pci_save_state(pdev);

2631
	/* Assign back pointers */
2632 2633
	rsp->req = req;
	req->rsp = rsp;
2634

2635 2636 2637 2638 2639 2640 2641
	if (IS_QLAFX00(ha)) {
		ha->rsp_q_map[0] = rsp;
		ha->req_q_map[0] = req;
		set_bit(0, ha->req_qid_map);
		set_bit(0, ha->rsp_qid_map);
	}

2642 2643 2644 2645 2646
	/* FWI2-capable only. */
	req->req_q_in = &ha->iobase->isp24.req_q_in;
	req->req_q_out = &ha->iobase->isp24.req_q_out;
	rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
	rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2647
	if (ha->mqenable || IS_QLA83XX(ha)) {
2648 2649 2650 2651
		req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
		req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
		rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
		rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2652 2653
	}

2654 2655 2656 2657 2658 2659 2660
	if (IS_QLAFX00(ha)) {
		req->req_q_in = &ha->iobase->ispfx00.req_q_in;
		req->req_q_out = &ha->iobase->ispfx00.req_q_out;
		rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
		rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
	}

2661
	if (IS_P3P_TYPE(ha)) {
2662 2663 2664 2665 2666
		req->req_q_out = &ha->iobase->isp82.req_q_out[0];
		rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
		rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
	}

2667 2668 2669 2670 2671 2672 2673 2674 2675 2676 2677 2678 2679 2680
	ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
	    "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
	    ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
	ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
	    "req->req_q_in=%p req->req_q_out=%p "
	    "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
	    req->req_q_in, req->req_q_out,
	    rsp->rsp_q_in, rsp->rsp_q_out);
	ql_dbg(ql_dbg_init, base_vha, 0x003e,
	    "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
	    ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
	ql_dbg(ql_dbg_init, base_vha, 0x003f,
	    "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
	    req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
L
Linus Torvalds 已提交
2681

2682
	if (ha->isp_ops->initialize_adapter(base_vha)) {
2683 2684 2685
		ql_log(ql_log_fatal, base_vha, 0x00d6,
		    "Failed to initialize adapter - Adapter flags %x.\n",
		    base_vha->device_flags);
L
Linus Torvalds 已提交
2686

2687 2688 2689
		if (IS_QLA82XX(ha)) {
			qla82xx_idc_lock(ha);
			qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2690
				QLA8XXX_DEV_FAILED);
2691
			qla82xx_idc_unlock(ha);
2692 2693
			ql_log(ql_log_fatal, base_vha, 0x00d7,
			    "HW State: FAILED.\n");
2694 2695 2696 2697 2698 2699 2700 2701
		} else if (IS_QLA8044(ha)) {
			qla8044_idc_lock(ha);
			qla8044_wr_direct(base_vha,
				QLA8044_CRB_DEV_STATE_INDEX,
				QLA8XXX_DEV_FAILED);
			qla8044_idc_unlock(ha);
			ql_log(ql_log_fatal, base_vha, 0x0150,
			    "HW State: FAILED.\n");
2702 2703
		}

2704
		ret = -ENODEV;
L
Linus Torvalds 已提交
2705 2706 2707
		goto probe_failed;
	}

2708 2709
	if (ha->mqenable) {
		if (qla25xx_setup_mode(base_vha)) {
2710 2711
			ql_log(ql_log_warn, base_vha, 0x00ec,
			    "Failed to create queues, falling back to single queue mode.\n");
2712 2713 2714
			goto que_init;
		}
	}
2715

2716 2717 2718
	if (ha->flags.running_gold_fw)
		goto skip_dpc;

L
Linus Torvalds 已提交
2719 2720 2721
	/*
	 * Startup the kernel thread for this host adapter
	 */
2722
	ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2723
	    "%s_dpc", base_vha->host_str);
2724
	if (IS_ERR(ha->dpc_thread)) {
2725 2726
		ql_log(ql_log_fatal, base_vha, 0x00ed,
		    "Failed to start DPC thread.\n");
2727
		ret = PTR_ERR(ha->dpc_thread);
L
Linus Torvalds 已提交
2728 2729
		goto probe_failed;
	}
2730 2731
	ql_dbg(ql_dbg_init, base_vha, 0x00ee,
	    "DPC thread started successfully.\n");
L
Linus Torvalds 已提交
2732

2733 2734 2735 2736 2737 2738 2739 2740
	/*
	 * If we're not coming up in initiator mode, we might sit for
	 * a while without waking up the dpc thread, which leads to a
	 * stuck process warning.  So just kick the dpc once here and
	 * let the kthread start (and go back to sleep in qla2x00_do_dpc).
	 */
	qla2xxx_wake_dpc(base_vha);

2741 2742 2743 2744 2745 2746 2747 2748 2749 2750 2751 2752 2753 2754
	if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
		sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
		ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
		INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);

		sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
		ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
		INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
		INIT_WORK(&ha->idc_state_handler,
		    qla83xx_idc_state_handler_work);
		INIT_WORK(&ha->nic_core_unrecoverable,
		    qla83xx_nic_core_unrecoverable_work);
	}

2755
skip_dpc:
2756 2757
	list_add_tail(&base_vha->list, &ha->vp_list);
	base_vha->host->irq = ha->pdev->irq;
L
Linus Torvalds 已提交
2758 2759

	/* Initialized the timer */
2760
	qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2761 2762 2763 2764 2765 2766
	ql_dbg(ql_dbg_init, base_vha, 0x00ef,
	    "Started qla2x00_timer with "
	    "interval=%d.\n", WATCH_INTERVAL);
	ql_dbg(ql_dbg_init, base_vha, 0x00f0,
	    "Detected hba at address=%p.\n",
	    ha);
2767

2768
	if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2769
		if (ha->fw_attributes & BIT_4) {
2770
			int prot = 0, guard;
2771
			base_vha->flags.difdix_supported = 1;
2772 2773
			ql_dbg(ql_dbg_init, base_vha, 0x00f1,
			    "Registering for DIF/DIX type 1 and 3 protection.\n");
2774 2775
			if (ql2xenabledif == 1)
				prot = SHOST_DIX_TYPE0_PROTECTION;
2776
			scsi_host_set_prot(host,
2777
			    prot | SHOST_DIF_TYPE1_PROTECTION
2778
			    | SHOST_DIF_TYPE2_PROTECTION
2779 2780
			    | SHOST_DIF_TYPE3_PROTECTION
			    | SHOST_DIX_TYPE1_PROTECTION
2781
			    | SHOST_DIX_TYPE2_PROTECTION
2782
			    | SHOST_DIX_TYPE3_PROTECTION);
2783 2784 2785 2786 2787 2788 2789 2790

			guard = SHOST_DIX_GUARD_CRC;

			if (IS_PI_IPGUARD_CAPABLE(ha) &&
			    (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
				guard |= SHOST_DIX_GUARD_IP;

			scsi_host_set_guard(host, guard);
2791 2792 2793 2794
		} else
			base_vha->flags.difdix_supported = 0;
	}

2795 2796
	ha->isp_ops->enable_intrs(ha);

2797 2798 2799 2800 2801 2802 2803
	if (IS_QLAFX00(ha)) {
		ret = qlafx00_fx_disc(base_vha,
			&base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
		host->sg_tablesize = (ha->mr.extended_io_enabled) ?
		    QLA_SG_ALL : 128;
	}

2804 2805 2806 2807
	ret = scsi_add_host(host, &pdev->dev);
	if (ret)
		goto probe_failed;

2808 2809 2810
	base_vha->flags.init_done = 1;
	base_vha->flags.online = 1;

2811 2812 2813
	ql_dbg(ql_dbg_init, base_vha, 0x00f2,
	    "Init done and hba is online.\n");

2814 2815 2816 2817 2818
	if (qla_ini_mode_enabled(base_vha))
		scsi_scan_host(host);
	else
		ql_dbg(ql_dbg_init, base_vha, 0x0122,
			"skipping scsi_scan_host() for non-initiator port\n");
2819

2820
	qla2x00_alloc_sysfs_attr(base_vha);
2821

2822 2823 2824 2825 2826 2827 2828 2829 2830
	if (IS_QLAFX00(ha)) {
		ret = qlafx00_fx_disc(base_vha,
			&base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);

		/* Register system information */
		ret =  qlafx00_fx_disc(base_vha,
			&base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
	}

2831
	qla2x00_init_host_attr(base_vha);
2832

2833
	qla2x00_dfs_setup(base_vha);
2834

2835 2836 2837 2838 2839 2840
	if (IS_QLAFX00(ha))
		ql_log(ql_log_info, base_vha, 0x015a,
		    "QLogic %s.\n", ha->mr.product_name);
	else
		ql_log(ql_log_info, base_vha, 0x00fb,
		    "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
2841 2842 2843 2844 2845
	ql_log(ql_log_info, base_vha, 0x00fc,
	    "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
	    pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
	    pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
	    base_vha->host_no,
2846
	    ha->isp_ops->fw_version_str(base_vha, fw_str));
L
Linus Torvalds 已提交
2847

2848 2849
	qlt_add_target(ha, base_vha);

L
Linus Torvalds 已提交
2850 2851
	return 0;

2852
probe_init_failed:
2853
	qla2x00_free_req_que(ha, req);
2854 2855
	ha->req_q_map[0] = NULL;
	clear_bit(0, ha->req_qid_map);
2856
	qla2x00_free_rsp_que(ha, rsp);
2857 2858
	ha->rsp_q_map[0] = NULL;
	clear_bit(0, ha->rsp_qid_map);
2859
	ha->max_req_queues = ha->max_rsp_queues = 0;
2860

L
Linus Torvalds 已提交
2861
probe_failed:
2862 2863 2864 2865 2866 2867 2868 2869 2870 2871
	if (base_vha->timer_active)
		qla2x00_stop_timer(base_vha);
	base_vha->flags.online = 0;
	if (ha->dpc_thread) {
		struct task_struct *t = ha->dpc_thread;

		ha->dpc_thread = NULL;
		kthread_stop(t);
	}

2872
	qla2x00_free_device(base_vha);
L
Linus Torvalds 已提交
2873

2874
	scsi_host_put(base_vha->host);
L
Linus Torvalds 已提交
2875

2876
probe_hw_failed:
2877 2878 2879 2880
	if (IS_QLA82XX(ha)) {
		qla82xx_idc_lock(ha);
		qla82xx_clear_drv_active(ha);
		qla82xx_idc_unlock(ha);
2881
	}
2882 2883 2884 2885 2886
	if (IS_QLA8044(ha)) {
		qla8044_idc_lock(ha);
		qla8044_clear_drv_active(base_vha);
		qla8044_idc_unlock(ha);
	}
2887
iospace_config_failed:
2888
	if (IS_P3P_TYPE(ha)) {
2889 2890
		if (!ha->nx_pcibase)
			iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2891 2892 2893 2894 2895
		if (!ql2xdbwr)
			iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
	} else {
		if (ha->iobase)
			iounmap(ha->iobase);
2896 2897
		if (ha->cregbase)
			iounmap(ha->cregbase);
2898
	}
2899 2900 2901
	pci_release_selected_regions(ha->pdev, ha->bars);
	kfree(ha);
	ha = NULL;
L
Linus Torvalds 已提交
2902

2903
probe_out:
2904
	pci_disable_device(pdev);
2905
	return ret;
L
Linus Torvalds 已提交
2906 2907
}

2908 2909 2910 2911 2912 2913 2914 2915 2916 2917 2918 2919 2920 2921 2922 2923
static void
qla2x00_stop_dpc_thread(scsi_qla_host_t *vha)
{
	struct qla_hw_data *ha = vha->hw;
	struct task_struct *t = ha->dpc_thread;

	if (ha->dpc_thread == NULL)
		return;
	/*
	 * qla2xxx_wake_dpc checks for ->dpc_thread
	 * so we need to zero it out.
	 */
	ha->dpc_thread = NULL;
	kthread_stop(t);
}

2924 2925 2926 2927 2928 2929
static void
qla2x00_shutdown(struct pci_dev *pdev)
{
	scsi_qla_host_t *vha;
	struct qla_hw_data  *ha;

2930 2931 2932
	if (!atomic_read(&pdev->enable_cnt))
		return;

2933 2934 2935
	vha = pci_get_drvdata(pdev);
	ha = vha->hw;

2936 2937 2938 2939
	/* Notify ISPFX00 firmware */
	if (IS_QLAFX00(ha))
		qlafx00_driver_shutdown(vha, 20);

2940 2941 2942 2943 2944 2945 2946 2947 2948 2949 2950 2951 2952 2953 2954 2955 2956 2957 2958 2959 2960 2961 2962 2963 2964 2965 2966
	/* Turn-off FCE trace */
	if (ha->flags.fce_enabled) {
		qla2x00_disable_fce_trace(vha, NULL, NULL);
		ha->flags.fce_enabled = 0;
	}

	/* Turn-off EFT trace */
	if (ha->eft)
		qla2x00_disable_eft_trace(vha);

	/* Stop currently executing firmware. */
	qla2x00_try_to_stop_firmware(vha);

	/* Turn adapter off line */
	vha->flags.online = 0;

	/* turn-off interrupts on the card */
	if (ha->interrupts_on) {
		vha->flags.init_done = 0;
		ha->isp_ops->disable_intrs(ha);
	}

	qla2x00_free_irqs(vha);

	qla2x00_free_fw_dump(ha);
}

A
Adrian Bunk 已提交
2967
static void
2968
qla2x00_remove_one(struct pci_dev *pdev)
L
Linus Torvalds 已提交
2969
{
2970
	scsi_qla_host_t *base_vha, *vha;
2971
	struct qla_hw_data  *ha;
2972
	unsigned long flags;
2973

2974 2975 2976 2977 2978 2979 2980
	/*
	 * If the PCI device is disabled that means that probe failed and any
	 * resources should be have cleaned up on probe exit.
	 */
	if (!atomic_read(&pdev->enable_cnt))
		return;

2981 2982 2983
	base_vha = pci_get_drvdata(pdev);
	ha = base_vha->hw;

2984 2985
	ha->flags.host_shutting_down = 1;

2986
	set_bit(UNLOADING, &base_vha->dpc_flags);
2987 2988 2989
	if (IS_QLAFX00(ha))
		qlafx00_driver_shutdown(base_vha, 20);

2990 2991 2992
	mutex_lock(&ha->vport_lock);
	while (ha->cur_vport_count) {
		spin_lock_irqsave(&ha->vport_slock, flags);
2993

2994 2995 2996
		BUG_ON(base_vha->list.next == &ha->vp_list);
		/* This assumes first entry in ha->vp_list is always base vha */
		vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2997
		scsi_host_get(vha->host);
2998

2999 3000 3001 3002 3003
		spin_unlock_irqrestore(&ha->vport_slock, flags);
		mutex_unlock(&ha->vport_lock);

		fc_vport_terminate(vha->fc_vport);
		scsi_host_put(vha->host);
3004

3005
		mutex_lock(&ha->vport_lock);
3006
	}
3007
	mutex_unlock(&ha->vport_lock);
L
Linus Torvalds 已提交
3008

3009 3010 3011 3012 3013 3014 3015 3016
	if (IS_QLA8031(ha)) {
		ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
		    "Clearing fcoe driver presence.\n");
		if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
			ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
			    "Error while clearing DRV-Presence.\n");
	}

3017 3018
	qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);

3019
	qla2x00_dfs_remove(base_vha);
3020

3021
	qla84xx_put_chip(base_vha);
3022

3023 3024 3025 3026 3027 3028
	/* Disable timer */
	if (base_vha->timer_active)
		qla2x00_stop_timer(base_vha);

	base_vha->flags.online = 0;

3029 3030 3031 3032 3033 3034 3035
	/* Flush the work queue and remove it */
	if (ha->wq) {
		flush_workqueue(ha->wq);
		destroy_workqueue(ha->wq);
		ha->wq = NULL;
	}

3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050
	/* Cancel all work and destroy DPC workqueues */
	if (ha->dpc_lp_wq) {
		cancel_work_sync(&ha->idc_aen);
		destroy_workqueue(ha->dpc_lp_wq);
		ha->dpc_lp_wq = NULL;
	}

	if (ha->dpc_hp_wq) {
		cancel_work_sync(&ha->nic_core_reset);
		cancel_work_sync(&ha->idc_state_handler);
		cancel_work_sync(&ha->nic_core_unrecoverable);
		destroy_workqueue(ha->dpc_hp_wq);
		ha->dpc_hp_wq = NULL;
	}

3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061
	/* Kill the kernel thread for this host */
	if (ha->dpc_thread) {
		struct task_struct *t = ha->dpc_thread;

		/*
		 * qla2xxx_wake_dpc checks for ->dpc_thread
		 * so we need to zero it out.
		 */
		ha->dpc_thread = NULL;
		kthread_stop(t);
	}
3062
	qlt_remove_target(ha, base_vha);
3063

3064
	qla2x00_free_sysfs_attr(base_vha);
3065

3066
	fc_remove_host(base_vha->host);
3067

3068
	scsi_remove_host(base_vha->host);
L
Linus Torvalds 已提交
3069

3070
	qla2x00_free_device(base_vha);
3071

3072
	scsi_host_put(base_vha->host);
L
Linus Torvalds 已提交
3073

3074 3075 3076 3077 3078
	if (IS_QLA8044(ha)) {
		qla8044_idc_lock(ha);
		qla8044_clear_drv_active(base_vha);
		qla8044_idc_unlock(ha);
	}
3079
	if (IS_QLA82XX(ha)) {
3080 3081 3082 3083
		qla82xx_idc_lock(ha);
		qla82xx_clear_drv_active(ha);
		qla82xx_idc_unlock(ha);

3084 3085 3086 3087 3088 3089
		iounmap((device_reg_t __iomem *)ha->nx_pcibase);
		if (!ql2xdbwr)
			iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
	} else {
		if (ha->iobase)
			iounmap(ha->iobase);
L
Linus Torvalds 已提交
3090

3091 3092 3093
		if (ha->cregbase)
			iounmap(ha->cregbase);

3094 3095
		if (ha->mqiobase)
			iounmap(ha->mqiobase);
3096 3097 3098

		if (IS_QLA83XX(ha) && ha->msixbase)
			iounmap(ha->msixbase);
3099
	}
3100

3101 3102 3103
	pci_release_selected_regions(ha->pdev, ha->bars);
	kfree(ha);
	ha = NULL;
L
Linus Torvalds 已提交
3104

3105 3106
	pci_disable_pcie_error_reporting(pdev);

3107
	pci_disable_device(pdev);
L
Linus Torvalds 已提交
3108 3109 3110
}

static void
3111
qla2x00_free_device(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
3112
{
3113
	struct qla_hw_data *ha = vha->hw;
L
Linus Torvalds 已提交
3114

3115 3116 3117 3118 3119 3120
	qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);

	/* Disable timer */
	if (vha->timer_active)
		qla2x00_stop_timer(vha);

3121
	qla2x00_stop_dpc_thread(vha);
3122

3123
	qla25xx_delete_queues(vha);
3124
	if (ha->flags.fce_enabled)
3125
		qla2x00_disable_fce_trace(vha, NULL, NULL);
3126

3127
	if (ha->eft)
3128
		qla2x00_disable_eft_trace(vha);
3129

3130
	/* Stop currently executing firmware. */
3131
	qla2x00_try_to_stop_firmware(vha);
L
Linus Torvalds 已提交
3132

3133 3134
	vha->flags.online = 0;

3135
	/* turn-off interrupts on the card */
3136 3137
	if (ha->interrupts_on) {
		vha->flags.init_done = 0;
3138
		ha->isp_ops->disable_intrs(ha);
3139
	}
3140

3141
	qla2x00_free_irqs(vha);
L
Linus Torvalds 已提交
3142

3143 3144
	qla2x00_free_fcports(vha);

3145
	qla2x00_mem_free(ha);
3146

3147 3148
	qla82xx_md_free(vha);

3149
	qla2x00_free_queues(ha);
L
Linus Torvalds 已提交
3150 3151
}

3152 3153 3154 3155 3156 3157
void qla2x00_free_fcports(struct scsi_qla_host *vha)
{
	fc_port_t *fcport, *tfcport;

	list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
		list_del(&fcport->list);
3158
		qla2x00_clear_loop_id(fcport);
3159 3160 3161 3162 3163
		kfree(fcport);
		fcport = NULL;
	}
}

3164
static inline void
3165
qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3166 3167 3168
    int defer)
{
	struct fc_rport *rport;
3169
	scsi_qla_host_t *base_vha;
3170
	unsigned long flags;
3171 3172 3173 3174 3175 3176

	if (!fcport->rport)
		return;

	rport = fcport->rport;
	if (defer) {
3177
		base_vha = pci_get_drvdata(vha->hw->pdev);
3178
		spin_lock_irqsave(vha->host->host_lock, flags);
3179
		fcport->drport = rport;
3180
		spin_unlock_irqrestore(vha->host->host_lock, flags);
3181 3182
		set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
		qla2xxx_wake_dpc(base_vha);
3183
	} else {
3184
		fc_remote_port_delete(rport);
3185 3186
		qlt_fc_port_deleted(vha, fcport);
	}
3187 3188
}

L
Linus Torvalds 已提交
3189 3190 3191 3192 3193 3194 3195 3196 3197
/*
 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
 *
 * Input: ha = adapter block pointer.  fcport = port structure pointer.
 *
 * Return: None.
 *
 * Context:
 */
3198
void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3199
    int do_login, int defer)
L
Linus Torvalds 已提交
3200
{
3201 3202 3203 3204 3205 3206
	if (IS_QLAFX00(vha->hw)) {
		qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
		qla2x00_schedule_rport_del(vha, fcport, defer);
		return;
	}

3207
	if (atomic_read(&fcport->state) == FCS_ONLINE &&
3208
	    vha->vp_idx == fcport->vha->vp_idx) {
3209
		qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3210 3211
		qla2x00_schedule_rport_del(vha, fcport, defer);
	}
A
Andrew Vasquez 已提交
3212
	/*
L
Linus Torvalds 已提交
3213 3214 3215 3216
	 * We may need to retry the login, so don't change the state of the
	 * port but do the retries.
	 */
	if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3217
		qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
L
Linus Torvalds 已提交
3218 3219 3220 3221 3222

	if (!do_login)
		return;

	if (fcport->login_retry == 0) {
3223 3224
		fcport->login_retry = vha->hw->login_retry_count;
		set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
L
Linus Torvalds 已提交
3225

3226
		ql_dbg(ql_dbg_disc, vha, 0x2067,
3227 3228
		    "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
		    fcport->port_name, fcport->loop_id, fcport->login_retry);
L
Linus Torvalds 已提交
3229 3230 3231 3232 3233 3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245
	}
}

/*
 * qla2x00_mark_all_devices_lost
 *	Updates fcport state when device goes offline.
 *
 * Input:
 *	ha = adapter block pointer.
 *	fcport = port structure pointer.
 *
 * Return:
 *	None.
 *
 * Context:
 */
void
3246
qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
L
Linus Torvalds 已提交
3247 3248 3249
{
	fc_port_t *fcport;

3250
	list_for_each_entry(fcport, &vha->vp_fcports, list) {
3251
		if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
L
Linus Torvalds 已提交
3252
			continue;
3253

L
Linus Torvalds 已提交
3254 3255 3256 3257 3258 3259
		/*
		 * No point in marking the device as lost, if the device is
		 * already DEAD.
		 */
		if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
			continue;
3260
		if (atomic_read(&fcport->state) == FCS_ONLINE) {
3261
			qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3262 3263
			if (defer)
				qla2x00_schedule_rport_del(vha, fcport, defer);
3264
			else if (vha->vp_idx == fcport->vha->vp_idx)
3265 3266
				qla2x00_schedule_rport_del(vha, fcport, defer);
		}
L
Linus Torvalds 已提交
3267 3268 3269 3270 3271 3272 3273 3274 3275
	}
}

/*
* qla2x00_mem_alloc
*      Allocates adapter memory.
*
* Returns:
*      0  = success.
3276
*      !0  = failure.
L
Linus Torvalds 已提交
3277
*/
3278
static int
3279 3280
qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
	struct req_que **req, struct rsp_que **rsp)
L
Linus Torvalds 已提交
3281 3282 3283
{
	char	name[16];

3284
	ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3285
		&ha->init_cb_dma, GFP_KERNEL);
3286
	if (!ha->init_cb)
3287
		goto fail;
3288

3289 3290 3291
	if (qlt_mem_alloc(ha) < 0)
		goto fail_free_init_cb;

3292 3293
	ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
		qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3294
	if (!ha->gid_list)
3295
		goto fail_free_tgt_mem;
L
Linus Torvalds 已提交
3296

3297 3298
	ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
	if (!ha->srb_mempool)
3299
		goto fail_free_gid_list;
3300

3301
	if (IS_P3P_TYPE(ha)) {
3302 3303 3304 3305 3306 3307 3308 3309 3310 3311 3312 3313
		/* Allocate cache for CT6 Ctx. */
		if (!ctx_cachep) {
			ctx_cachep = kmem_cache_create("qla2xxx_ctx",
				sizeof(struct ct6_dsd), 0,
				SLAB_HWCACHE_ALIGN, NULL);
			if (!ctx_cachep)
				goto fail_free_gid_list;
		}
		ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
			ctx_cachep);
		if (!ha->ctx_mempool)
			goto fail_free_srb_mempool;
3314 3315 3316
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
		    "ctx_cachep=%p ctx_mempool=%p.\n",
		    ctx_cachep, ha->ctx_mempool);
3317 3318
	}

3319 3320 3321
	/* Get memory for cached NVRAM */
	ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
	if (!ha->nvram)
3322
		goto fail_free_ctx_mempool;
3323

3324 3325 3326 3327 3328 3329 3330
	snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
		ha->pdev->device);
	ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
		DMA_POOL_SIZE, 8, 0);
	if (!ha->s_dma_pool)
		goto fail_free_nvram;

3331 3332 3333 3334
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
	    "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
	    ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);

3335
	if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3336 3337 3338
		ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
			DSD_LIST_DMA_POOL_SIZE, 8, 0);
		if (!ha->dl_dma_pool) {
3339 3340
			ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
			    "Failed to allocate memory for dl_dma_pool.\n");
3341 3342 3343 3344 3345 3346
			goto fail_s_dma_pool;
		}

		ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
			FCP_CMND_DMA_POOL_SIZE, 8, 0);
		if (!ha->fcp_cmnd_dma_pool) {
3347 3348
			ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
			    "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3349 3350
			goto fail_dl_dma_pool;
		}
3351 3352 3353
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
		    "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
		    ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3354 3355
	}

3356 3357
	/* Allocate memory for SNS commands */
	if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3358
	/* Get consistent memory allocated for SNS commands */
3359
		ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3360
		sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3361
		if (!ha->sns_cmd)
3362
			goto fail_dma_pool;
3363
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3364
		    "sns_cmd: %p.\n", ha->sns_cmd);
3365
	} else {
3366
	/* Get consistent memory allocated for MS IOCB */
3367
		ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3368
			&ha->ms_iocb_dma);
3369
		if (!ha->ms_iocb)
3370 3371
			goto fail_dma_pool;
	/* Get consistent memory allocated for CT SNS commands */
3372
		ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3373
			sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3374 3375
		if (!ha->ct_sns)
			goto fail_free_ms_iocb;
3376 3377 3378
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
		    "ms_iocb=%p ct_sns=%p.\n",
		    ha->ms_iocb, ha->ct_sns);
L
Linus Torvalds 已提交
3379 3380
	}

3381
	/* Allocate memory for request ring */
3382 3383
	*req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
	if (!*req) {
3384 3385
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
		    "Failed to allocate memory for req.\n");
3386 3387
		goto fail_req;
	}
3388 3389 3390 3391 3392
	(*req)->length = req_len;
	(*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
		((*req)->length + 1) * sizeof(request_t),
		&(*req)->dma, GFP_KERNEL);
	if (!(*req)->ring) {
3393 3394
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
		    "Failed to allocate memory for req_ring.\n");
3395 3396 3397
		goto fail_req_ring;
	}
	/* Allocate memory for response ring */
3398 3399
	*rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
	if (!*rsp) {
3400 3401
		ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
		    "Failed to allocate memory for rsp.\n");
3402 3403
		goto fail_rsp;
	}
3404 3405 3406 3407 3408 3409
	(*rsp)->hw = ha;
	(*rsp)->length = rsp_len;
	(*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
		((*rsp)->length + 1) * sizeof(response_t),
		&(*rsp)->dma, GFP_KERNEL);
	if (!(*rsp)->ring) {
3410 3411
		ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
		    "Failed to allocate memory for rsp_ring.\n");
3412 3413
		goto fail_rsp_ring;
	}
3414 3415
	(*req)->rsp = *rsp;
	(*rsp)->req = *req;
3416 3417 3418 3419 3420
	ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
	    "req=%p req->length=%d req->ring=%p rsp=%p "
	    "rsp->length=%d rsp->ring=%p.\n",
	    *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
	    (*rsp)->ring);
3421 3422 3423
	/* Allocate memory for NVRAM data for vports */
	if (ha->nvram_npiv_size) {
		ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3424
		    ha->nvram_npiv_size, GFP_KERNEL);
3425
		if (!ha->npiv_info) {
3426 3427
			ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
			    "Failed to allocate memory for npiv_info.\n");
3428 3429 3430 3431
			goto fail_npiv_info;
		}
	} else
		ha->npiv_info = NULL;
3432

3433
	/* Get consistent memory allocated for EX-INIT-CB. */
3434
	if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) {
3435 3436 3437 3438
		ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
		    &ha->ex_init_cb_dma);
		if (!ha->ex_init_cb)
			goto fail_ex_init_cb;
3439 3440
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
		    "ex_init_cb=%p.\n", ha->ex_init_cb);
3441 3442
	}

3443 3444
	INIT_LIST_HEAD(&ha->gbl_dsd_list);

3445 3446 3447 3448 3449 3450
	/* Get consistent memory allocated for Async Port-Database. */
	if (!IS_FWI2_CAPABLE(ha)) {
		ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
			&ha->async_pd_dma);
		if (!ha->async_pd)
			goto fail_async_pd;
3451 3452
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
		    "async_pd=%p.\n", ha->async_pd);
3453 3454
	}

3455
	INIT_LIST_HEAD(&ha->vp_list);
3456 3457 3458 3459 3460 3461 3462 3463 3464 3465 3466 3467

	/* Allocate memory for our loop_id bitmap */
	ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
	    GFP_KERNEL);
	if (!ha->loop_id_map)
		goto fail_async_pd;
	else {
		qla2x00_set_reserved_loop_ids(ha);
		ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
		    "loop_id_map=%p. \n", ha->loop_id_map);
	}

3468 3469
	return 1;

3470 3471
fail_async_pd:
	dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3472 3473
fail_ex_init_cb:
	kfree(ha->npiv_info);
3474 3475 3476 3477 3478
fail_npiv_info:
	dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
		sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
	(*rsp)->ring = NULL;
	(*rsp)->dma = 0;
3479
fail_rsp_ring:
3480
	kfree(*rsp);
3481
fail_rsp:
3482 3483 3484 3485
	dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
		sizeof(request_t), (*req)->ring, (*req)->dma);
	(*req)->ring = NULL;
	(*req)->dma = 0;
3486
fail_req_ring:
3487
	kfree(*req);
3488 3489 3490 3491 3492
fail_req:
	dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
		ha->ct_sns, ha->ct_sns_dma);
	ha->ct_sns = NULL;
	ha->ct_sns_dma = 0;
3493 3494 3495 3496
fail_free_ms_iocb:
	dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
	ha->ms_iocb = NULL;
	ha->ms_iocb_dma = 0;
3497
fail_dma_pool:
3498
	if (IS_QLA82XX(ha) || ql2xenabledif) {
3499 3500 3501 3502
		dma_pool_destroy(ha->fcp_cmnd_dma_pool);
		ha->fcp_cmnd_dma_pool = NULL;
	}
fail_dl_dma_pool:
3503
	if (IS_QLA82XX(ha) || ql2xenabledif) {
3504 3505 3506 3507
		dma_pool_destroy(ha->dl_dma_pool);
		ha->dl_dma_pool = NULL;
	}
fail_s_dma_pool:
3508 3509
	dma_pool_destroy(ha->s_dma_pool);
	ha->s_dma_pool = NULL;
3510 3511 3512
fail_free_nvram:
	kfree(ha->nvram);
	ha->nvram = NULL;
3513 3514 3515
fail_free_ctx_mempool:
	mempool_destroy(ha->ctx_mempool);
	ha->ctx_mempool = NULL;
3516 3517 3518 3519
fail_free_srb_mempool:
	mempool_destroy(ha->srb_mempool);
	ha->srb_mempool = NULL;
fail_free_gid_list:
3520 3521
	dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
	ha->gid_list,
3522
	ha->gid_list_dma);
3523 3524
	ha->gid_list = NULL;
	ha->gid_list_dma = 0;
3525 3526
fail_free_tgt_mem:
	qlt_mem_free(ha);
3527 3528 3529 3530 3531
fail_free_init_cb:
	dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
	ha->init_cb_dma);
	ha->init_cb = NULL;
	ha->init_cb_dma = 0;
3532
fail:
3533 3534
	ql_log(ql_log_fatal, NULL, 0x0030,
	    "Memory allocation failure.\n");
3535
	return -ENOMEM;
L
Linus Torvalds 已提交
3536 3537 3538
}

/*
3539 3540
* qla2x00_free_fw_dump
*	Frees fw dump stuff.
L
Linus Torvalds 已提交
3541 3542
*
* Input:
3543
*	ha = adapter block pointer
L
Linus Torvalds 已提交
3544
*/
A
Adrian Bunk 已提交
3545
static void
3546
qla2x00_free_fw_dump(struct qla_hw_data *ha)
L
Linus Torvalds 已提交
3547
{
3548 3549
	if (ha->fce)
		dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
3550
		    ha->fce_dma);
3551

3552 3553 3554
	if (ha->fw_dump) {
		if (ha->eft)
			dma_free_coherent(&ha->pdev->dev,
3555
			    ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
3556 3557
		vfree(ha->fw_dump);
	}
3558 3559 3560 3561 3562 3563 3564 3565 3566 3567 3568 3569 3570 3571 3572 3573 3574 3575 3576 3577 3578
	ha->fce = NULL;
	ha->fce_dma = 0;
	ha->eft = NULL;
	ha->eft_dma = 0;
	ha->fw_dump = NULL;
	ha->fw_dumped = 0;
	ha->fw_dump_reading = 0;
}

/*
* qla2x00_mem_free
*      Frees all adapter allocated memory.
*
* Input:
*      ha = adapter block pointer.
*/
static void
qla2x00_mem_free(struct qla_hw_data *ha)
{
	qla2x00_free_fw_dump(ha);

3579 3580 3581 3582
	if (ha->mctp_dump)
		dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
		    ha->mctp_dump_dma);

3583 3584
	if (ha->srb_mempool)
		mempool_destroy(ha->srb_mempool);
3585

3586 3587 3588 3589
	if (ha->dcbx_tlv)
		dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
		    ha->dcbx_tlv, ha->dcbx_tlv_dma);

3590 3591 3592 3593
	if (ha->xgmac_data)
		dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
		    ha->xgmac_data, ha->xgmac_data_dma);

L
Linus Torvalds 已提交
3594 3595
	if (ha->sns_cmd)
		dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3596
		ha->sns_cmd, ha->sns_cmd_dma);
L
Linus Torvalds 已提交
3597 3598 3599

	if (ha->ct_sns)
		dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3600
		ha->ct_sns, ha->ct_sns_dma);
L
Linus Torvalds 已提交
3601

3602 3603 3604
	if (ha->sfp_data)
		dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);

L
Linus Torvalds 已提交
3605 3606 3607
	if (ha->ms_iocb)
		dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);

3608
	if (ha->ex_init_cb)
3609 3610
		dma_pool_free(ha->s_dma_pool,
			ha->ex_init_cb, ha->ex_init_cb_dma);
3611

3612 3613 3614
	if (ha->async_pd)
		dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);

L
Linus Torvalds 已提交
3615 3616 3617 3618
	if (ha->s_dma_pool)
		dma_pool_destroy(ha->s_dma_pool);

	if (ha->gid_list)
3619 3620
		dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
		ha->gid_list, ha->gid_list_dma);
L
Linus Torvalds 已提交
3621

3622 3623 3624 3625 3626 3627 3628 3629 3630 3631 3632 3633 3634 3635 3636 3637 3638 3639 3640 3641 3642 3643 3644 3645
	if (IS_QLA82XX(ha)) {
		if (!list_empty(&ha->gbl_dsd_list)) {
			struct dsd_dma *dsd_ptr, *tdsd_ptr;

			/* clean up allocated prev pool */
			list_for_each_entry_safe(dsd_ptr,
				tdsd_ptr, &ha->gbl_dsd_list, list) {
				dma_pool_free(ha->dl_dma_pool,
				dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
				list_del(&dsd_ptr->list);
				kfree(dsd_ptr);
			}
		}
	}

	if (ha->dl_dma_pool)
		dma_pool_destroy(ha->dl_dma_pool);

	if (ha->fcp_cmnd_dma_pool)
		dma_pool_destroy(ha->fcp_cmnd_dma_pool);

	if (ha->ctx_mempool)
		mempool_destroy(ha->ctx_mempool);

3646 3647
	qlt_mem_free(ha);

3648 3649
	if (ha->init_cb)
		dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3650
			ha->init_cb, ha->init_cb_dma);
3651 3652
	vfree(ha->optrom_buffer);
	kfree(ha->nvram);
3653
	kfree(ha->npiv_info);
3654
	kfree(ha->swl);
3655
	kfree(ha->loop_id_map);
L
Linus Torvalds 已提交
3656

3657
	ha->srb_mempool = NULL;
3658
	ha->ctx_mempool = NULL;
L
Linus Torvalds 已提交
3659 3660 3661 3662 3663 3664 3665 3666
	ha->sns_cmd = NULL;
	ha->sns_cmd_dma = 0;
	ha->ct_sns = NULL;
	ha->ct_sns_dma = 0;
	ha->ms_iocb = NULL;
	ha->ms_iocb_dma = 0;
	ha->init_cb = NULL;
	ha->init_cb_dma = 0;
3667 3668
	ha->ex_init_cb = NULL;
	ha->ex_init_cb_dma = 0;
3669 3670
	ha->async_pd = NULL;
	ha->async_pd_dma = 0;
L
Linus Torvalds 已提交
3671 3672

	ha->s_dma_pool = NULL;
3673 3674
	ha->dl_dma_pool = NULL;
	ha->fcp_cmnd_dma_pool = NULL;
L
Linus Torvalds 已提交
3675 3676 3677

	ha->gid_list = NULL;
	ha->gid_list_dma = 0;
3678 3679 3680 3681

	ha->tgt.atio_ring = NULL;
	ha->tgt.atio_dma = 0;
	ha->tgt.tgt_vp_map = NULL;
3682
}
L
Linus Torvalds 已提交
3683

3684 3685 3686 3687 3688
struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
						struct qla_hw_data *ha)
{
	struct Scsi_Host *host;
	struct scsi_qla_host *vha = NULL;
3689

3690 3691
	host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
	if (host == NULL) {
3692 3693
		ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
		    "Failed to allocate host from the scsi layer, aborting.\n");
3694 3695 3696 3697 3698 3699 3700 3701 3702 3703 3704 3705 3706 3707 3708
		goto fail;
	}

	/* Clear our data area */
	vha = shost_priv(host);
	memset(vha, 0, sizeof(scsi_qla_host_t));

	vha->host = host;
	vha->host_no = host->host_no;
	vha->hw = ha;

	INIT_LIST_HEAD(&vha->vp_fcports);
	INIT_LIST_HEAD(&vha->work_list);
	INIT_LIST_HEAD(&vha->list);

3709 3710
	spin_lock_init(&vha->work_lock);

3711
	sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3712 3713 3714 3715 3716
	ql_dbg(ql_dbg_init, vha, 0x0041,
	    "Allocated the host=%p hw=%p vha=%p dev_name=%s",
	    vha->host, vha->hw, vha,
	    dev_name(&(ha->pdev->dev)));

3717 3718 3719 3720
	return vha;

fail:
	return vha;
L
Linus Torvalds 已提交
3721 3722
}

3723
static struct qla_work_evt *
3724
qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3725 3726
{
	struct qla_work_evt *e;
3727 3728 3729 3730 3731
	uint8_t bail;

	QLA_VHA_MARK_BUSY(vha, bail);
	if (bail)
		return NULL;
3732

3733
	e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3734 3735
	if (!e) {
		QLA_VHA_MARK_NOT_BUSY(vha);
3736
		return NULL;
3737
	}
3738 3739 3740 3741 3742 3743 3744

	INIT_LIST_HEAD(&e->list);
	e->type = type;
	e->flags = QLA_EVT_FLAG_FREE;
	return e;
}

3745
static int
3746
qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3747
{
3748
	unsigned long flags;
3749

3750
	spin_lock_irqsave(&vha->work_lock, flags);
3751
	list_add_tail(&e->list, &vha->work_list);
3752
	spin_unlock_irqrestore(&vha->work_lock, flags);
3753
	qla2xxx_wake_dpc(vha);
3754

3755 3756 3757 3758
	return QLA_SUCCESS;
}

int
3759
qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3760 3761 3762 3763
    u32 data)
{
	struct qla_work_evt *e;

3764
	e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3765 3766 3767 3768 3769
	if (!e)
		return QLA_FUNCTION_FAILED;

	e->u.aen.code = code;
	e->u.aen.data = data;
3770
	return qla2x00_post_work(vha, e);
3771 3772
}

3773 3774 3775 3776 3777
int
qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
{
	struct qla_work_evt *e;

3778
	e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3779 3780 3781 3782
	if (!e)
		return QLA_FUNCTION_FAILED;

	memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3783
	return qla2x00_post_work(vha, e);
3784 3785
}

3786 3787 3788 3789 3790 3791 3792 3793 3794 3795 3796 3797 3798 3799 3800 3801 3802 3803 3804 3805 3806 3807 3808
#define qla2x00_post_async_work(name, type)	\
int qla2x00_post_async_##name##_work(		\
    struct scsi_qla_host *vha,			\
    fc_port_t *fcport, uint16_t *data)		\
{						\
	struct qla_work_evt *e;			\
						\
	e = qla2x00_alloc_work(vha, type);	\
	if (!e)					\
		return QLA_FUNCTION_FAILED;	\
						\
	e->u.logio.fcport = fcport;		\
	if (data) {				\
		e->u.logio.data[0] = data[0];	\
		e->u.logio.data[1] = data[1];	\
	}					\
	return qla2x00_post_work(vha, e);	\
}

qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3809 3810
qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3811

3812 3813 3814 3815 3816 3817 3818 3819 3820 3821 3822 3823 3824 3825 3826 3827 3828 3829 3830 3831 3832 3833 3834 3835 3836 3837 3838 3839 3840 3841 3842
int
qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
{
	struct qla_work_evt *e;

	e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
	if (!e)
		return QLA_FUNCTION_FAILED;

	e->u.uevent.code = code;
	return qla2x00_post_work(vha, e);
}

static void
qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
{
	char event_string[40];
	char *envp[] = { event_string, NULL };

	switch (code) {
	case QLA_UEVENT_CODE_FW_DUMP:
		snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
		    vha->host_no);
		break;
	default:
		/* do nothing */
		break;
	}
	kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
}

3843 3844 3845 3846 3847 3848 3849 3850 3851 3852 3853 3854 3855 3856 3857 3858
int
qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
			uint32_t *data, int cnt)
{
	struct qla_work_evt *e;

	e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
	if (!e)
		return QLA_FUNCTION_FAILED;

	e->u.aenfx.evtcode = evtcode;
	e->u.aenfx.count = cnt;
	memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
	return qla2x00_post_work(vha, e);
}

3859
void
3860
qla2x00_do_work(struct scsi_qla_host *vha)
3861
{
3862 3863 3864
	struct qla_work_evt *e, *tmp;
	unsigned long flags;
	LIST_HEAD(work);
3865

3866 3867 3868 3869 3870
	spin_lock_irqsave(&vha->work_lock, flags);
	list_splice_init(&vha->work_list, &work);
	spin_unlock_irqrestore(&vha->work_lock, flags);

	list_for_each_entry_safe(e, tmp, &work, list) {
3871 3872 3873 3874
		list_del_init(&e->list);

		switch (e->type) {
		case QLA_EVT_AEN:
3875
			fc_host_post_event(vha->host, fc_get_event_number(),
3876 3877
			    e->u.aen.code, e->u.aen.data);
			break;
3878 3879 3880
		case QLA_EVT_IDC_ACK:
			qla81xx_idc_ack(vha, e->u.idc_ack.mb);
			break;
3881 3882 3883 3884 3885 3886 3887 3888 3889 3890 3891 3892 3893 3894 3895
		case QLA_EVT_ASYNC_LOGIN:
			qla2x00_async_login(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
		case QLA_EVT_ASYNC_LOGIN_DONE:
			qla2x00_async_login_done(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
		case QLA_EVT_ASYNC_LOGOUT:
			qla2x00_async_logout(vha, e->u.logio.fcport);
			break;
		case QLA_EVT_ASYNC_LOGOUT_DONE:
			qla2x00_async_logout_done(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
3896 3897 3898 3899 3900 3901 3902 3903
		case QLA_EVT_ASYNC_ADISC:
			qla2x00_async_adisc(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
		case QLA_EVT_ASYNC_ADISC_DONE:
			qla2x00_async_adisc_done(vha, e->u.logio.fcport,
			    e->u.logio.data);
			break;
3904 3905 3906
		case QLA_EVT_UEVENT:
			qla2x00_uevent_emit(vha, e->u.uevent.code);
			break;
3907 3908 3909
		case QLA_EVT_AENFX:
			qlafx00_process_aen(vha, e);
			break;
3910 3911 3912
		}
		if (e->flags & QLA_EVT_FLAG_FREE)
			kfree(e);
3913 3914 3915

		/* For each work completed decrement vha ref count */
		QLA_VHA_MARK_NOT_BUSY(vha);
3916 3917
	}
}
3918

3919 3920 3921 3922 3923 3924
/* Relogins all the fcports of a vport
 * Context: dpc thread
 */
void qla2x00_relogin(struct scsi_qla_host *vha)
{
	fc_port_t       *fcport;
3925
	int status;
3926 3927
	uint16_t        next_loopid = 0;
	struct qla_hw_data *ha = vha->hw;
3928
	uint16_t data[2];
3929 3930 3931 3932 3933 3934

	list_for_each_entry(fcport, &vha->vp_fcports, list) {
	/*
	 * If the port is not ONLINE then try to login
	 * to it if we haven't run out of retries.
	 */
3935 3936
		if (atomic_read(&fcport->state) != FCS_ONLINE &&
		    fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
3937
			fcport->login_retry--;
3938
			if (fcport->flags & FCF_FABRIC_DEVICE) {
3939
				if (fcport->flags & FCF_FCP2_DEVICE)
3940 3941 3942 3943 3944 3945
					ha->isp_ops->fabric_logout(vha,
							fcport->loop_id,
							fcport->d_id.b.domain,
							fcport->d_id.b.area,
							fcport->d_id.b.al_pa);

3946 3947 3948 3949 3950 3951 3952 3953 3954 3955 3956
				if (fcport->loop_id == FC_NO_LOOP_ID) {
					fcport->loop_id = next_loopid =
					    ha->min_external_loopid;
					status = qla2x00_find_new_loop_id(
					    vha, fcport);
					if (status != QLA_SUCCESS) {
						/* Ran out of IDs to use */
						break;
					}
				}

3957
				if (IS_ALOGIO_CAPABLE(ha)) {
3958
					fcport->flags |= FCF_ASYNC_SENT;
3959 3960 3961 3962 3963 3964 3965 3966
					data[0] = 0;
					data[1] = QLA_LOGIO_LOGIN_RETRIED;
					status = qla2x00_post_async_login_work(
					    vha, fcport, data);
					if (status == QLA_SUCCESS)
						continue;
					/* Attempt a retry. */
					status = 1;
3967
				} else {
3968 3969
					status = qla2x00_fabric_login(vha,
					    fcport, &next_loopid);
3970 3971 3972 3973 3974 3975 3976 3977
					if (status ==  QLA_SUCCESS) {
						int status2;
						uint8_t opts;

						opts = 0;
						if (fcport->flags &
						    FCF_FCP2_DEVICE)
							opts |= BIT_1;
3978 3979 3980
						status2 =
						    qla2x00_get_port_database(
							vha, fcport, opts);
3981 3982 3983 3984
						if (status2 != QLA_SUCCESS)
							status = 1;
					}
				}
3985 3986 3987 3988 3989 3990 3991
			} else
				status = qla2x00_local_device_login(vha,
								fcport);

			if (status == QLA_SUCCESS) {
				fcport->old_loop_id = fcport->loop_id;

3992 3993 3994
				ql_dbg(ql_dbg_disc, vha, 0x2003,
				    "Port login OK: logged in ID 0x%x.\n",
				    fcport->loop_id);
3995 3996 3997 3998 3999 4000

				qla2x00_update_fcport(vha, fcport);

			} else if (status == 1) {
				set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
				/* retry the login again */
4001 4002 4003
				ql_dbg(ql_dbg_disc, vha, 0x2007,
				    "Retrying %d login again loop_id 0x%x.\n",
				    fcport->login_retry, fcport->loop_id);
4004 4005 4006 4007 4008
			} else {
				fcport->login_retry = 0;
			}

			if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4009
				qla2x00_clear_loop_id(fcport);
4010 4011 4012
		}
		if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
			break;
4013 4014 4015
	}
}

4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 4029 4030 4031 4032 4033 4034 4035 4036 4037 4038 4039 4040 4041 4042 4043 4044 4045 4046 4047 4048 4049 4050 4051 4052 4053 4054 4055 4056 4057
/* Schedule work on any of the dpc-workqueues */
void
qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
{
	struct qla_hw_data *ha = base_vha->hw;

	switch (work_code) {
	case MBA_IDC_AEN: /* 0x8200 */
		if (ha->dpc_lp_wq)
			queue_work(ha->dpc_lp_wq, &ha->idc_aen);
		break;

	case QLA83XX_NIC_CORE_RESET: /* 0x1 */
		if (!ha->flags.nic_core_reset_hdlr_active) {
			if (ha->dpc_hp_wq)
				queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
		} else
			ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
			    "NIC Core reset is already active. Skip "
			    "scheduling it again.\n");
		break;
	case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
		if (ha->dpc_hp_wq)
			queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
		break;
	case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
		if (ha->dpc_hp_wq)
			queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
		break;
	default:
		ql_log(ql_log_warn, base_vha, 0xb05f,
		    "Unknow work-code=0x%x.\n", work_code);
	}

	return;
}

/* Work: Perform NIC Core Unrecoverable state handling */
void
qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
{
	struct qla_hw_data *ha =
4058
		container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4059 4060 4061 4062 4063 4064 4065 4066 4067 4068 4069 4070 4071 4072 4073 4074 4075 4076 4077 4078 4079
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
	uint32_t dev_state = 0;

	qla83xx_idc_lock(base_vha, 0);
	qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
	qla83xx_reset_ownership(base_vha);
	if (ha->flags.nic_core_reset_owner) {
		ha->flags.nic_core_reset_owner = 0;
		qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
		    QLA8XXX_DEV_FAILED);
		ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
		qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
	}
	qla83xx_idc_unlock(base_vha, 0);
}

/* Work: Execute IDC state handler */
void
qla83xx_idc_state_handler_work(struct work_struct *work)
{
	struct qla_hw_data *ha =
4080
		container_of(work, struct qla_hw_data, idc_state_handler);
4081 4082 4083 4084 4085 4086 4087 4088 4089 4090 4091
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
	uint32_t dev_state = 0;

	qla83xx_idc_lock(base_vha, 0);
	qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
	if (dev_state == QLA8XXX_DEV_FAILED ||
			dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
		qla83xx_idc_state_handler(base_vha);
	qla83xx_idc_unlock(base_vha, 0);
}

4092
static int
4093 4094 4095 4096 4097 4098 4099 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 4120 4121 4122 4123 4124 4125 4126 4127 4128 4129
qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
{
	int rval = QLA_SUCCESS;
	unsigned long heart_beat_wait = jiffies + (1 * HZ);
	uint32_t heart_beat_counter1, heart_beat_counter2;

	do {
		if (time_after(jiffies, heart_beat_wait)) {
			ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
			    "Nic Core f/w is not alive.\n");
			rval = QLA_FUNCTION_FAILED;
			break;
		}

		qla83xx_idc_lock(base_vha, 0);
		qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
		    &heart_beat_counter1);
		qla83xx_idc_unlock(base_vha, 0);
		msleep(100);
		qla83xx_idc_lock(base_vha, 0);
		qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
		    &heart_beat_counter2);
		qla83xx_idc_unlock(base_vha, 0);
	} while (heart_beat_counter1 == heart_beat_counter2);

	return rval;
}

/* Work: Perform NIC Core Reset handling */
void
qla83xx_nic_core_reset_work(struct work_struct *work)
{
	struct qla_hw_data *ha =
		container_of(work, struct qla_hw_data, nic_core_reset);
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
	uint32_t dev_state = 0;

4130 4131 4132 4133 4134 4135 4136
	if (IS_QLA2031(ha)) {
		if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
			ql_log(ql_log_warn, base_vha, 0xb081,
			    "Failed to dump mctp\n");
		return;
	}

4137 4138 4139 4140 4141 4142 4143 4144 4145 4146 4147 4148 4149 4150 4151 4152 4153 4154 4155 4156 4157 4158 4159 4160 4161 4162 4163 4164 4165 4166 4167 4168 4169 4170 4171 4172 4173 4174 4175 4176 4177 4178 4179 4180 4181 4182 4183 4184 4185 4186 4187 4188 4189 4190 4191 4192 4193 4194 4195 4196 4197 4198 4199 4200 4201 4202 4203 4204 4205 4206 4207 4208 4209
	if (!ha->flags.nic_core_reset_hdlr_active) {
		if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
			qla83xx_idc_lock(base_vha, 0);
			qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
			    &dev_state);
			qla83xx_idc_unlock(base_vha, 0);
			if (dev_state != QLA8XXX_DEV_NEED_RESET) {
				ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
				    "Nic Core f/w is alive.\n");
				return;
			}
		}

		ha->flags.nic_core_reset_hdlr_active = 1;
		if (qla83xx_nic_core_reset(base_vha)) {
			/* NIC Core reset failed. */
			ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
			    "NIC Core reset failed.\n");
		}
		ha->flags.nic_core_reset_hdlr_active = 0;
	}
}

/* Work: Handle 8200 IDC aens */
void
qla83xx_service_idc_aen(struct work_struct *work)
{
	struct qla_hw_data *ha =
		container_of(work, struct qla_hw_data, idc_aen);
	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
	uint32_t dev_state, idc_control;

	qla83xx_idc_lock(base_vha, 0);
	qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
	qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
	qla83xx_idc_unlock(base_vha, 0);
	if (dev_state == QLA8XXX_DEV_NEED_RESET) {
		if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
			ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
			    "Application requested NIC Core Reset.\n");
			qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
		} else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
		    QLA_SUCCESS) {
			ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
			    "Other protocol driver requested NIC Core Reset.\n");
			qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
		}
	} else if (dev_state == QLA8XXX_DEV_FAILED ||
			dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
		qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
	}
}

static void
qla83xx_wait_logic(void)
{
	int i;

	/* Yield CPU */
	if (!in_interrupt()) {
		/*
		 * Wait about 200ms before retrying again.
		 * This controls the number of retries for single
		 * lock operation.
		 */
		msleep(100);
		schedule();
	} else {
		for (i = 0; i < 20; i++)
			cpu_relax(); /* This a nop instr on i386 */
	}
}

4210
static int
4211 4212 4213 4214 4215 4216 4217
qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
{
	int rval;
	uint32_t data;
	uint32_t idc_lck_rcvry_stage_mask = 0x3;
	uint32_t idc_lck_rcvry_owner_mask = 0x3c;
	struct qla_hw_data *ha = base_vha->hw;
4218 4219
	ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
	    "Trying force recovery of the IDC lock.\n");
4220 4221 4222 4223 4224 4225 4226 4227 4228 4229 4230 4231 4232 4233 4234 4235 4236 4237 4238 4239 4240 4241 4242 4243 4244 4245 4246 4247 4248 4249 4250 4251 4252 4253 4254 4255 4256 4257 4258 4259 4260 4261 4262 4263 4264 4265 4266 4267 4268 4269 4270

	rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
	if (rval)
		return rval;

	if ((data & idc_lck_rcvry_stage_mask) > 0) {
		return QLA_SUCCESS;
	} else {
		data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
		rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
		    data);
		if (rval)
			return rval;

		msleep(200);

		rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
		    &data);
		if (rval)
			return rval;

		if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
			data &= (IDC_LOCK_RECOVERY_STAGE2 |
					~(idc_lck_rcvry_stage_mask));
			rval = qla83xx_wr_reg(base_vha,
			    QLA83XX_IDC_LOCK_RECOVERY, data);
			if (rval)
				return rval;

			/* Forcefully perform IDC UnLock */
			rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
			    &data);
			if (rval)
				return rval;
			/* Clear lock-id by setting 0xff */
			rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
			    0xff);
			if (rval)
				return rval;
			/* Clear lock-recovery by setting 0x0 */
			rval = qla83xx_wr_reg(base_vha,
			    QLA83XX_IDC_LOCK_RECOVERY, 0x0);
			if (rval)
				return rval;
		} else
			return QLA_SUCCESS;
	}

	return rval;
}

4271
static int
4272 4273 4274 4275 4276 4277 4278 4279 4280 4281 4282 4283 4284 4285 4286 4287 4288 4289 4290 4291 4292 4293 4294 4295 4296 4297 4298 4299 4300 4301 4302 4303 4304 4305 4306 4307 4308 4309 4310
qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
{
	int rval = QLA_SUCCESS;
	uint32_t o_drv_lockid, n_drv_lockid;
	unsigned long lock_recovery_timeout;

	lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
retry_lockid:
	rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
	if (rval)
		goto exit;

	/* MAX wait time before forcing IDC Lock recovery = 2 secs */
	if (time_after_eq(jiffies, lock_recovery_timeout)) {
		if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
			return QLA_SUCCESS;
		else
			return QLA_FUNCTION_FAILED;
	}

	rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
	if (rval)
		goto exit;

	if (o_drv_lockid == n_drv_lockid) {
		qla83xx_wait_logic();
		goto retry_lockid;
	} else
		return QLA_SUCCESS;

exit:
	return rval;
}

void
qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
{
	uint16_t options = (requester_id << 15) | BIT_6;
	uint32_t data;
4311
	uint32_t lock_owner;
4312 4313 4314 4315 4316 4317 4318 4319 4320 4321 4322
	struct qla_hw_data *ha = base_vha->hw;

	/* IDC-lock implementation using driver-lock/lock-id remote registers */
retry_lock:
	if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
	    == QLA_SUCCESS) {
		if (data) {
			/* Setting lock-id to our function-number */
			qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
			    ha->portnum);
		} else {
4323 4324
			qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
			    &lock_owner);
4325
			ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4326 4327
			    "Failed to acquire IDC lock, acquired by %d, "
			    "retrying...\n", lock_owner);
4328 4329 4330 4331 4332 4333 4334 4335 4336 4337 4338 4339 4340 4341 4342 4343 4344 4345 4346 4347 4348 4349 4350 4351 4352 4353 4354 4355 4356 4357 4358 4359 4360 4361 4362 4363 4364 4365 4366 4367 4368 4369 4370 4371 4372 4373 4374 4375 4376 4377 4378 4379 4380 4381 4382 4383 4384 4385 4386 4387 4388 4389 4390 4391 4392 4393 4394 4395 4396 4397 4398 4399 4400 4401 4402 4403 4404 4405 4406 4407 4408 4409 4410 4411 4412 4413 4414 4415 4416 4417 4418 4419 4420 4421 4422 4423 4424 4425 4426 4427 4428 4429 4430 4431 4432 4433 4434 4435 4436 4437 4438 4439 4440 4441 4442 4443 4444 4445 4446 4447 4448 4449 4450 4451 4452 4453 4454 4455 4456 4457 4458 4459 4460 4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472 4473

			/* Retry/Perform IDC-Lock recovery */
			if (qla83xx_idc_lock_recovery(base_vha)
			    == QLA_SUCCESS) {
				qla83xx_wait_logic();
				goto retry_lock;
			} else
				ql_log(ql_log_warn, base_vha, 0xb075,
				    "IDC Lock recovery FAILED.\n");
		}

	}

	return;

	/* XXX: IDC-lock implementation using access-control mbx */
retry_lock2:
	if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
		ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
		    "Failed to acquire IDC lock. retrying...\n");
		/* Retry/Perform IDC-Lock recovery */
		if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
			qla83xx_wait_logic();
			goto retry_lock2;
		} else
			ql_log(ql_log_warn, base_vha, 0xb076,
			    "IDC Lock recovery FAILED.\n");
	}

	return;
}

void
qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
{
	uint16_t options = (requester_id << 15) | BIT_7, retry;
	uint32_t data;
	struct qla_hw_data *ha = base_vha->hw;

	/* IDC-unlock implementation using driver-unlock/lock-id
	 * remote registers
	 */
	retry = 0;
retry_unlock:
	if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
	    == QLA_SUCCESS) {
		if (data == ha->portnum) {
			qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
			/* Clearing lock-id by setting 0xff */
			qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
		} else if (retry < 10) {
			/* SV: XXX: IDC unlock retrying needed here? */

			/* Retry for IDC-unlock */
			qla83xx_wait_logic();
			retry++;
			ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
			    "Failed to release IDC lock, retyring=%d\n", retry);
			goto retry_unlock;
		}
	} else if (retry < 10) {
		/* Retry for IDC-unlock */
		qla83xx_wait_logic();
		retry++;
		ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
		    "Failed to read drv-lockid, retyring=%d\n", retry);
		goto retry_unlock;
	}

	return;

	/* XXX: IDC-unlock implementation using access-control mbx */
	retry = 0;
retry_unlock2:
	if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
		if (retry < 10) {
			/* Retry for IDC-unlock */
			qla83xx_wait_logic();
			retry++;
			ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
			    "Failed to release IDC lock, retyring=%d\n", retry);
			goto retry_unlock2;
		}
	}

	return;
}

int
__qla83xx_set_drv_presence(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;
	struct qla_hw_data *ha = vha->hw;
	uint32_t drv_presence;

	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
	if (rval == QLA_SUCCESS) {
		drv_presence |= (1 << ha->portnum);
		rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
		    drv_presence);
	}

	return rval;
}

int
qla83xx_set_drv_presence(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;

	qla83xx_idc_lock(vha, 0);
	rval = __qla83xx_set_drv_presence(vha);
	qla83xx_idc_unlock(vha, 0);

	return rval;
}

int
__qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;
	struct qla_hw_data *ha = vha->hw;
	uint32_t drv_presence;

	rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
	if (rval == QLA_SUCCESS) {
		drv_presence &= ~(1 << ha->portnum);
		rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
		    drv_presence);
	}

	return rval;
}

int
qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;

	qla83xx_idc_lock(vha, 0);
	rval = __qla83xx_clear_drv_presence(vha);
	qla83xx_idc_unlock(vha, 0);

	return rval;
}

4474
static void
4475 4476 4477 4478 4479 4480 4481 4482 4483 4484 4485
qla83xx_need_reset_handler(scsi_qla_host_t *vha)
{
	struct qla_hw_data *ha = vha->hw;
	uint32_t drv_ack, drv_presence;
	unsigned long ack_timeout;

	/* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
	ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
	while (1) {
		qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
		qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4486
		if ((drv_ack & drv_presence) == drv_presence)
4487 4488 4489 4490 4491 4492 4493 4494 4495 4496 4497 4498 4499 4500 4501 4502 4503 4504 4505 4506 4507 4508 4509 4510 4511 4512
			break;

		if (time_after_eq(jiffies, ack_timeout)) {
			ql_log(ql_log_warn, vha, 0xb067,
			    "RESET ACK TIMEOUT! drv_presence=0x%x "
			    "drv_ack=0x%x\n", drv_presence, drv_ack);
			/*
			 * The function(s) which did not ack in time are forced
			 * to withdraw any further participation in the IDC
			 * reset.
			 */
			if (drv_ack != drv_presence)
				qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
				    drv_ack);
			break;
		}

		qla83xx_idc_unlock(vha, 0);
		msleep(1000);
		qla83xx_idc_lock(vha, 0);
	}

	qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
	ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
}

4513
static int
4514 4515 4516 4517 4518 4519 4520 4521 4522 4523 4524 4525 4526 4527 4528 4529 4530 4531 4532 4533 4534 4535 4536 4537 4538 4539 4540 4541 4542 4543 4544 4545 4546 4547 4548 4549 4550 4551 4552 4553 4554 4555 4556 4557 4558 4559 4560 4561 4562 4563 4564 4565 4566 4567 4568 4569 4570 4571 4572 4573 4574 4575 4576 4577 4578 4579 4580 4581 4582 4583 4584 4585 4586 4587 4588 4589 4590 4591 4592 4593 4594 4595 4596 4597 4598 4599 4600 4601 4602 4603 4604 4605 4606 4607 4608 4609 4610 4611 4612 4613 4614 4615 4616 4617 4618 4619 4620 4621 4622 4623 4624 4625 4626 4627 4628 4629 4630 4631 4632 4633 4634 4635 4636 4637 4638 4639 4640 4641 4642 4643 4644 4645 4646 4647 4648 4649 4650 4651 4652 4653 4654 4655 4656 4657 4658 4659
qla83xx_device_bootstrap(scsi_qla_host_t *vha)
{
	int rval = QLA_SUCCESS;
	uint32_t idc_control;

	qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
	ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");

	/* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
	__qla83xx_get_idc_control(vha, &idc_control);
	idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
	__qla83xx_set_idc_control(vha, 0);

	qla83xx_idc_unlock(vha, 0);
	rval = qla83xx_restart_nic_firmware(vha);
	qla83xx_idc_lock(vha, 0);

	if (rval != QLA_SUCCESS) {
		ql_log(ql_log_fatal, vha, 0xb06a,
		    "Failed to restart NIC f/w.\n");
		qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
		ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
	} else {
		ql_dbg(ql_dbg_p3p, vha, 0xb06c,
		    "Success in restarting nic f/w.\n");
		qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
		ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
	}

	return rval;
}

/* Assumes idc_lock always held on entry */
int
qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
{
	struct qla_hw_data *ha = base_vha->hw;
	int rval = QLA_SUCCESS;
	unsigned long dev_init_timeout;
	uint32_t dev_state;

	/* Wait for MAX-INIT-TIMEOUT for the device to go ready */
	dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);

	while (1) {

		if (time_after_eq(jiffies, dev_init_timeout)) {
			ql_log(ql_log_warn, base_vha, 0xb06e,
			    "Initialization TIMEOUT!\n");
			/* Init timeout. Disable further NIC Core
			 * communication.
			 */
			qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
				QLA8XXX_DEV_FAILED);
			ql_log(ql_log_info, base_vha, 0xb06f,
			    "HW State: FAILED.\n");
		}

		qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
		switch (dev_state) {
		case QLA8XXX_DEV_READY:
			if (ha->flags.nic_core_reset_owner)
				qla83xx_idc_audit(base_vha,
				    IDC_AUDIT_COMPLETION);
			ha->flags.nic_core_reset_owner = 0;
			ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
			    "Reset_owner reset by 0x%x.\n",
			    ha->portnum);
			goto exit;
		case QLA8XXX_DEV_COLD:
			if (ha->flags.nic_core_reset_owner)
				rval = qla83xx_device_bootstrap(base_vha);
			else {
			/* Wait for AEN to change device-state */
				qla83xx_idc_unlock(base_vha, 0);
				msleep(1000);
				qla83xx_idc_lock(base_vha, 0);
			}
			break;
		case QLA8XXX_DEV_INITIALIZING:
			/* Wait for AEN to change device-state */
			qla83xx_idc_unlock(base_vha, 0);
			msleep(1000);
			qla83xx_idc_lock(base_vha, 0);
			break;
		case QLA8XXX_DEV_NEED_RESET:
			if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
				qla83xx_need_reset_handler(base_vha);
			else {
				/* Wait for AEN to change device-state */
				qla83xx_idc_unlock(base_vha, 0);
				msleep(1000);
				qla83xx_idc_lock(base_vha, 0);
			}
			/* reset timeout value after need reset handler */
			dev_init_timeout = jiffies +
			    (ha->fcoe_dev_init_timeout * HZ);
			break;
		case QLA8XXX_DEV_NEED_QUIESCENT:
			/* XXX: DEBUG for now */
			qla83xx_idc_unlock(base_vha, 0);
			msleep(1000);
			qla83xx_idc_lock(base_vha, 0);
			break;
		case QLA8XXX_DEV_QUIESCENT:
			/* XXX: DEBUG for now */
			if (ha->flags.quiesce_owner)
				goto exit;

			qla83xx_idc_unlock(base_vha, 0);
			msleep(1000);
			qla83xx_idc_lock(base_vha, 0);
			dev_init_timeout = jiffies +
			    (ha->fcoe_dev_init_timeout * HZ);
			break;
		case QLA8XXX_DEV_FAILED:
			if (ha->flags.nic_core_reset_owner)
				qla83xx_idc_audit(base_vha,
				    IDC_AUDIT_COMPLETION);
			ha->flags.nic_core_reset_owner = 0;
			__qla83xx_clear_drv_presence(base_vha);
			qla83xx_idc_unlock(base_vha, 0);
			qla8xxx_dev_failed_handler(base_vha);
			rval = QLA_FUNCTION_FAILED;
			qla83xx_idc_lock(base_vha, 0);
			goto exit;
		case QLA8XXX_BAD_VALUE:
			qla83xx_idc_unlock(base_vha, 0);
			msleep(1000);
			qla83xx_idc_lock(base_vha, 0);
			break;
		default:
			ql_log(ql_log_warn, base_vha, 0xb071,
			    "Unknow Device State: %x.\n", dev_state);
			qla83xx_idc_unlock(base_vha, 0);
			qla8xxx_dev_failed_handler(base_vha);
			rval = QLA_FUNCTION_FAILED;
			qla83xx_idc_lock(base_vha, 0);
			goto exit;
		}
	}

exit:
	return rval;
}

L
Linus Torvalds 已提交
4660 4661 4662 4663 4664 4665 4666 4667 4668 4669 4670 4671 4672 4673 4674 4675
/**************************************************************************
* qla2x00_do_dpc
*   This kernel thread is a task that is schedule by the interrupt handler
*   to perform the background processing for interrupts.
*
* Notes:
* This task always run in the context of a kernel thread.  It
* is kick-off by the driver's detect code and starts up
* up one per adapter. It immediately goes to sleep and waits for
* some fibre event.  When either the interrupt handler or
* the timer routine detects a event it will one of the task
* bits then wake us up.
**************************************************************************/
static int
qla2x00_do_dpc(void *data)
{
4676
	int		rval;
4677 4678
	scsi_qla_host_t *base_vha;
	struct qla_hw_data *ha;
L
Linus Torvalds 已提交
4679

4680 4681
	ha = (struct qla_hw_data *)data;
	base_vha = pci_get_drvdata(ha->pdev);
L
Linus Torvalds 已提交
4682 4683 4684

	set_user_nice(current, -20);

4685
	set_current_state(TASK_INTERRUPTIBLE);
4686
	while (!kthread_should_stop()) {
4687 4688
		ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
		    "DPC handler sleeping.\n");
L
Linus Torvalds 已提交
4689

4690 4691
		schedule();
		__set_current_state(TASK_RUNNING);
L
Linus Torvalds 已提交
4692

4693 4694
		if (!base_vha->flags.init_done || ha->flags.mbox_busy)
			goto end_loop;
L
Linus Torvalds 已提交
4695

4696
		if (ha->flags.eeh_busy) {
4697 4698
			ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
			    "eeh_busy=%d.\n", ha->flags.eeh_busy);
4699
			goto end_loop;
4700 4701
		}

L
Linus Torvalds 已提交
4702 4703
		ha->dpc_active = 1;

4704 4705 4706
		ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
		    "DPC handler waking up, dpc_flags=0x%lx.\n",
		    base_vha->dpc_flags);
L
Linus Torvalds 已提交
4707

4708
		qla2x00_do_work(base_vha);
4709

4710 4711 4712 4713 4714 4715 4716 4717 4718 4719 4720 4721 4722 4723 4724 4725 4726 4727 4728 4729 4730 4731 4732 4733 4734 4735 4736
		if (IS_P3P_TYPE(ha)) {
			if (IS_QLA8044(ha)) {
				if (test_and_clear_bit(ISP_UNRECOVERABLE,
					&base_vha->dpc_flags)) {
					qla8044_idc_lock(ha);
					qla8044_wr_direct(base_vha,
						QLA8044_CRB_DEV_STATE_INDEX,
						QLA8XXX_DEV_FAILED);
					qla8044_idc_unlock(ha);
					ql_log(ql_log_info, base_vha, 0x4004,
						"HW State: FAILED.\n");
					qla8044_device_state_handler(base_vha);
					continue;
				}

			} else {
				if (test_and_clear_bit(ISP_UNRECOVERABLE,
					&base_vha->dpc_flags)) {
					qla82xx_idc_lock(ha);
					qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
						QLA8XXX_DEV_FAILED);
					qla82xx_idc_unlock(ha);
					ql_log(ql_log_info, base_vha, 0x0151,
						"HW State: FAILED.\n");
					qla82xx_device_state_handler(base_vha);
					continue;
				}
4737 4738 4739 4740 4741
			}

			if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
				&base_vha->dpc_flags)) {

4742 4743
				ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
				    "FCoE context reset scheduled.\n");
4744 4745 4746 4747 4748 4749 4750 4751 4752 4753 4754 4755 4756
				if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
					&base_vha->dpc_flags))) {
					if (qla82xx_fcoe_ctx_reset(base_vha)) {
						/* FCoE-ctx reset failed.
						 * Escalate to chip-reset
						 */
						set_bit(ISP_ABORT_NEEDED,
							&base_vha->dpc_flags);
					}
					clear_bit(ABORT_ISP_ACTIVE,
						&base_vha->dpc_flags);
				}

4757 4758
				ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
				    "FCoE context reset end.\n");
4759
			}
4760 4761 4762 4763 4764 4765 4766 4767 4768 4769 4770 4771 4772 4773 4774 4775 4776 4777 4778 4779 4780 4781 4782 4783 4784 4785 4786 4787 4788 4789 4790 4791
		} else if (IS_QLAFX00(ha)) {
			if (test_and_clear_bit(ISP_UNRECOVERABLE,
				&base_vha->dpc_flags)) {
				ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
				    "Firmware Reset Recovery\n");
				if (qlafx00_reset_initialize(base_vha)) {
					/* Failed. Abort isp later. */
					if (!test_bit(UNLOADING,
					    &base_vha->dpc_flags))
						set_bit(ISP_UNRECOVERABLE,
						    &base_vha->dpc_flags);
						ql_dbg(ql_dbg_dpc, base_vha,
						    0x4021,
						    "Reset Recovery Failed\n");
				}
			}

			if (test_and_clear_bit(FX00_TARGET_SCAN,
				&base_vha->dpc_flags)) {
				ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
				    "ISPFx00 Target Scan scheduled\n");
				if (qlafx00_rescan_isp(base_vha)) {
					if (!test_bit(UNLOADING,
					    &base_vha->dpc_flags))
						set_bit(ISP_UNRECOVERABLE,
						    &base_vha->dpc_flags);
					ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
					    "ISPFx00 Target Scan Failed\n");
				}
				ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
				    "ISPFx00 Target Scan End\n");
			}
4792 4793
		}

4794 4795
		if (test_and_clear_bit(ISP_ABORT_NEEDED,
						&base_vha->dpc_flags)) {
L
Linus Torvalds 已提交
4796

4797 4798
			ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
			    "ISP abort scheduled.\n");
L
Linus Torvalds 已提交
4799
			if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4800
			    &base_vha->dpc_flags))) {
L
Linus Torvalds 已提交
4801

4802
				if (ha->isp_ops->abort_isp(base_vha)) {
L
Linus Torvalds 已提交
4803 4804
					/* failed. retry later */
					set_bit(ISP_ABORT_NEEDED,
4805
					    &base_vha->dpc_flags);
4806
				}
4807 4808
				clear_bit(ABORT_ISP_ACTIVE,
						&base_vha->dpc_flags);
4809 4810
			}

4811 4812
			ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
			    "ISP abort end.\n");
L
Linus Torvalds 已提交
4813 4814
		}

4815 4816
		if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
		    &base_vha->dpc_flags)) {
4817
			qla2x00_update_fcports(base_vha);
4818
		}
4819

4820 4821 4822 4823 4824 4825 4826 4827 4828 4829
		if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
			int ret;
			ret = qla2x00_send_change_request(base_vha, 0x3, 0);
			if (ret != QLA_SUCCESS)
				ql_log(ql_log_warn, base_vha, 0x121,
				    "Failed to enable receiving of RSCN "
				    "requests: 0x%x.\n", ret);
			clear_bit(SCR_PENDING, &base_vha->dpc_flags);
		}

4830 4831 4832
		if (IS_QLAFX00(ha))
			goto loop_resync_check;

4833
		if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
4834 4835
			ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
			    "Quiescence mode scheduled.\n");
4836 4837 4838 4839 4840
			if (IS_P3P_TYPE(ha)) {
				if (IS_QLA82XX(ha))
					qla82xx_device_state_handler(base_vha);
				if (IS_QLA8044(ha))
					qla8044_device_state_handler(base_vha);
4841 4842 4843 4844
				clear_bit(ISP_QUIESCE_NEEDED,
				    &base_vha->dpc_flags);
				if (!ha->flags.quiesce_owner) {
					qla2x00_perform_loop_resync(base_vha);
4845 4846 4847 4848 4849 4850 4851 4852 4853 4854 4855
					if (IS_QLA82XX(ha)) {
						qla82xx_idc_lock(ha);
						qla82xx_clear_qsnt_ready(
						    base_vha);
						qla82xx_idc_unlock(ha);
					} else if (IS_QLA8044(ha)) {
						qla8044_idc_lock(ha);
						qla8044_clear_qsnt_ready(
						    base_vha);
						qla8044_idc_unlock(ha);
					}
4856 4857 4858 4859 4860
				}
			} else {
				clear_bit(ISP_QUIESCE_NEEDED,
				    &base_vha->dpc_flags);
				qla2x00_quiesce_io(base_vha);
4861
			}
4862 4863
			ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
			    "Quiescence mode end.\n");
4864 4865
		}

4866
		if (test_and_clear_bit(RESET_MARKER_NEEDED,
4867
				&base_vha->dpc_flags) &&
4868
		    (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
L
Linus Torvalds 已提交
4869

4870 4871
			ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
			    "Reset marker scheduled.\n");
4872 4873
			qla2x00_rst_aen(base_vha);
			clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
4874 4875
			ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
			    "Reset marker end.\n");
L
Linus Torvalds 已提交
4876 4877 4878
		}

		/* Retry each device up to login retry count */
4879 4880 4881 4882
		if ((test_and_clear_bit(RELOGIN_NEEDED,
						&base_vha->dpc_flags)) &&
		    !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
		    atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
L
Linus Torvalds 已提交
4883

4884 4885
			ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
			    "Relogin scheduled.\n");
4886
			qla2x00_relogin(base_vha);
4887 4888
			ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
			    "Relogin end.\n");
L
Linus Torvalds 已提交
4889
		}
4890
loop_resync_check:
4891
		if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
4892
		    &base_vha->dpc_flags)) {
L
Linus Torvalds 已提交
4893

4894 4895
			ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
			    "Loop resync scheduled.\n");
L
Linus Torvalds 已提交
4896 4897

			if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
4898
			    &base_vha->dpc_flags))) {
L
Linus Torvalds 已提交
4899

4900
				rval = qla2x00_loop_resync(base_vha);
L
Linus Torvalds 已提交
4901

4902 4903
				clear_bit(LOOP_RESYNC_ACTIVE,
						&base_vha->dpc_flags);
L
Linus Torvalds 已提交
4904 4905
			}

4906 4907
			ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
			    "Loop resync end.\n");
L
Linus Torvalds 已提交
4908 4909
		}

4910 4911 4912
		if (IS_QLAFX00(ha))
			goto intr_on_check;

4913 4914 4915 4916
		if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
		    atomic_read(&base_vha->loop_state) == LOOP_READY) {
			clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
			qla2xxx_flash_npiv_conf(base_vha);
4917 4918
		}

4919
intr_on_check:
L
Linus Torvalds 已提交
4920
		if (!ha->interrupts_on)
4921
			ha->isp_ops->enable_intrs(ha);
L
Linus Torvalds 已提交
4922

4923 4924 4925
		if (test_and_clear_bit(BEACON_BLINK_NEEDED,
					&base_vha->dpc_flags))
			ha->isp_ops->beacon_blink(base_vha);
4926

4927 4928
		if (!IS_QLAFX00(ha))
			qla2x00_do_dpc_all_vps(base_vha);
4929

L
Linus Torvalds 已提交
4930
		ha->dpc_active = 0;
4931
end_loop:
4932
		set_current_state(TASK_INTERRUPTIBLE);
L
Linus Torvalds 已提交
4933
	} /* End of while(1) */
4934
	__set_current_state(TASK_RUNNING);
L
Linus Torvalds 已提交
4935

4936 4937
	ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
	    "DPC handler exiting.\n");
L
Linus Torvalds 已提交
4938 4939 4940 4941 4942 4943

	/*
	 * Make sure that nobody tries to wake us up again.
	 */
	ha->dpc_active = 0;

4944 4945 4946
	/* Cleanup any residual CTX SRBs. */
	qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);

4947 4948 4949 4950
	return 0;
}

void
4951
qla2xxx_wake_dpc(struct scsi_qla_host *vha)
4952
{
4953
	struct qla_hw_data *ha = vha->hw;
4954 4955
	struct task_struct *t = ha->dpc_thread;

4956
	if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
4957
		wake_up_process(t);
L
Linus Torvalds 已提交
4958 4959 4960 4961 4962 4963 4964 4965 4966 4967
}

/*
*  qla2x00_rst_aen
*      Processes asynchronous reset.
*
* Input:
*      ha  = adapter block pointer.
*/
static void
4968
qla2x00_rst_aen(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
4969
{
4970 4971 4972
	if (vha->flags.online && !vha->flags.reset_active &&
	    !atomic_read(&vha->loop_down_timer) &&
	    !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
L
Linus Torvalds 已提交
4973
		do {
4974
			clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
L
Linus Torvalds 已提交
4975 4976 4977 4978 4979

			/*
			 * Issue marker command only when we are going to start
			 * the I/O.
			 */
4980 4981 4982
			vha->marker_needed = 1;
		} while (!atomic_read(&vha->loop_down_timer) &&
		    (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
L
Linus Torvalds 已提交
4983 4984 4985 4986 4987 4988 4989 4990 4991 4992 4993
	}
}

/**************************************************************************
*   qla2x00_timer
*
* Description:
*   One second timer
*
* Context: Interrupt
***************************************************************************/
4994
void
4995
qla2x00_timer(scsi_qla_host_t *vha)
L
Linus Torvalds 已提交
4996 4997 4998 4999 5000
{
	unsigned long	cpu_flags = 0;
	int		start_dpc = 0;
	int		index;
	srb_t		*sp;
5001
	uint16_t        w;
5002
	struct qla_hw_data *ha = vha->hw;
5003
	struct req_que *req;
5004

5005
	if (ha->flags.eeh_busy) {
5006 5007 5008
		ql_dbg(ql_dbg_timer, vha, 0x6000,
		    "EEH = %d, restarting timer.\n",
		    ha->flags.eeh_busy);
5009 5010 5011 5012
		qla2x00_restart_timer(vha, WATCH_INTERVAL);
		return;
	}

5013 5014 5015
	/* Hardware read to raise pending EEH errors during mailbox waits. */
	if (!pci_channel_offline(ha->pdev))
		pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
L
Linus Torvalds 已提交
5016

5017
	/* Make sure qla82xx_watchdog is run only for physical port */
5018
	if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5019 5020
		if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
			start_dpc++;
5021 5022 5023 5024
		if (IS_QLA82XX(ha))
			qla82xx_watchdog(vha);
		else if (IS_QLA8044(ha))
			qla8044_watchdog(vha);
5025 5026
	}

5027 5028 5029
	if (!vha->vp_idx && IS_QLAFX00(ha))
		qlafx00_timer_routine(vha);

L
Linus Torvalds 已提交
5030
	/* Loop down handler. */
5031
	if (atomic_read(&vha->loop_down_timer) > 0 &&
5032 5033
	    !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
	    !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5034
		&& vha->flags.online) {
L
Linus Torvalds 已提交
5035

5036 5037
		if (atomic_read(&vha->loop_down_timer) ==
		    vha->loop_down_abort_time) {
L
Linus Torvalds 已提交
5038

5039 5040
			ql_log(ql_log_info, vha, 0x6008,
			    "Loop down - aborting the queues before time expires.\n");
L
Linus Torvalds 已提交
5041

5042 5043
			if (!IS_QLA2100(ha) && vha->link_down_timeout)
				atomic_set(&vha->loop_state, LOOP_DEAD);
L
Linus Torvalds 已提交
5044

5045 5046 5047 5048
			/*
			 * Schedule an ISP abort to return any FCP2-device
			 * commands.
			 */
5049
			/* NPIV - scan physical port only */
5050
			if (!vha->vp_idx) {
5051 5052
				spin_lock_irqsave(&ha->hardware_lock,
				    cpu_flags);
5053
				req = ha->req_q_map[0];
5054
				for (index = 1;
5055
				    index < req->num_outstanding_cmds;
5056 5057 5058
				    index++) {
					fc_port_t *sfcp;

5059
					sp = req->outstanding_cmds[index];
5060 5061
					if (!sp)
						continue;
5062
					if (sp->type != SRB_SCSI_CMD)
5063
						continue;
5064
					sfcp = sp->fcport;
5065
					if (!(sfcp->flags & FCF_FCP2_DEVICE))
5066
						continue;
5067

5068 5069 5070 5071 5072
					if (IS_QLA82XX(ha))
						set_bit(FCOE_CTX_RESET_NEEDED,
							&vha->dpc_flags);
					else
						set_bit(ISP_ABORT_NEEDED,
5073
							&vha->dpc_flags);
5074 5075 5076
					break;
				}
				spin_unlock_irqrestore(&ha->hardware_lock,
5077
								cpu_flags);
L
Linus Torvalds 已提交
5078 5079 5080 5081 5082
			}
			start_dpc++;
		}

		/* if the loop has been down for 4 minutes, reinit adapter */
5083
		if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5084
			if (!(vha->device_flags & DFLG_NO_CABLE)) {
5085
				ql_log(ql_log_warn, vha, 0x6009,
L
Linus Torvalds 已提交
5086 5087
				    "Loop down - aborting ISP.\n");

5088 5089 5090 5091 5092 5093
				if (IS_QLA82XX(ha))
					set_bit(FCOE_CTX_RESET_NEEDED,
						&vha->dpc_flags);
				else
					set_bit(ISP_ABORT_NEEDED,
						&vha->dpc_flags);
L
Linus Torvalds 已提交
5094 5095
			}
		}
5096 5097 5098
		ql_dbg(ql_dbg_timer, vha, 0x600a,
		    "Loop down - seconds remaining %d.\n",
		    atomic_read(&vha->loop_down_timer));
L
Linus Torvalds 已提交
5099
	}
5100 5101
	/* Check if beacon LED needs to be blinked for physical host only */
	if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5102
		/* There is no beacon_blink function for ISP82xx */
5103
		if (!IS_P3P_TYPE(ha)) {
5104 5105 5106
			set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
			start_dpc++;
		}
5107 5108
	}

5109
	/* Process any deferred work. */
5110
	if (!list_empty(&vha->work_list))
5111 5112
		start_dpc++;

L
Linus Torvalds 已提交
5113
	/* Schedule the DPC routine if needed */
5114 5115 5116
	if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
	    test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
	    test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
L
Linus Torvalds 已提交
5117
	    start_dpc ||
5118 5119
	    test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
	    test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5120 5121
	    test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
	    test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5122
	    test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5123
	    test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5124 5125 5126 5127 5128 5129 5130 5131 5132 5133 5134 5135
		ql_dbg(ql_dbg_timer, vha, 0x600b,
		    "isp_abort_needed=%d loop_resync_needed=%d "
		    "fcport_update_needed=%d start_dpc=%d "
		    "reset_marker_needed=%d",
		    test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
		    test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
		    test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
		    start_dpc,
		    test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
		ql_dbg(ql_dbg_timer, vha, 0x600c,
		    "beacon_blink_needed=%d isp_unrecoverable=%d "
		    "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5136
		    "relogin_needed=%d.\n",
5137 5138 5139 5140
		    test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
		    test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
		    test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
		    test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5141
		    test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5142
		qla2xxx_wake_dpc(vha);
5143
	}
L
Linus Torvalds 已提交
5144

5145
	qla2x00_restart_timer(vha, WATCH_INTERVAL);
L
Linus Torvalds 已提交
5146 5147
}

5148 5149
/* Firmware interface routines. */

5150
#define FW_BLOBS	10
5151 5152 5153 5154
#define FW_ISP21XX	0
#define FW_ISP22XX	1
#define FW_ISP2300	2
#define FW_ISP2322	3
5155
#define FW_ISP24XX	4
5156
#define FW_ISP25XX	5
5157
#define FW_ISP81XX	6
5158
#define FW_ISP82XX	7
5159 5160
#define FW_ISP2031	8
#define FW_ISP8031	9
5161

5162 5163 5164 5165 5166
#define FW_FILE_ISP21XX	"ql2100_fw.bin"
#define FW_FILE_ISP22XX	"ql2200_fw.bin"
#define FW_FILE_ISP2300	"ql2300_fw.bin"
#define FW_FILE_ISP2322	"ql2322_fw.bin"
#define FW_FILE_ISP24XX	"ql2400_fw.bin"
5167
#define FW_FILE_ISP25XX	"ql2500_fw.bin"
5168
#define FW_FILE_ISP81XX	"ql8100_fw.bin"
5169
#define FW_FILE_ISP82XX	"ql8200_fw.bin"
5170 5171
#define FW_FILE_ISP2031	"ql2600_fw.bin"
#define FW_FILE_ISP8031	"ql8300_fw.bin"
5172

5173
static DEFINE_MUTEX(qla_fw_lock);
5174 5175

static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5176 5177 5178 5179 5180
	{ .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
	{ .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
	{ .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
	{ .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
	{ .name = FW_FILE_ISP24XX, },
5181
	{ .name = FW_FILE_ISP25XX, },
5182
	{ .name = FW_FILE_ISP81XX, },
5183
	{ .name = FW_FILE_ISP82XX, },
5184 5185
	{ .name = FW_FILE_ISP2031, },
	{ .name = FW_FILE_ISP8031, },
5186 5187 5188
};

struct fw_blob *
5189
qla2x00_request_firmware(scsi_qla_host_t *vha)
5190
{
5191
	struct qla_hw_data *ha = vha->hw;
5192 5193 5194 5195 5196 5197
	struct fw_blob *blob;

	if (IS_QLA2100(ha)) {
		blob = &qla_fw_blobs[FW_ISP21XX];
	} else if (IS_QLA2200(ha)) {
		blob = &qla_fw_blobs[FW_ISP22XX];
5198
	} else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5199
		blob = &qla_fw_blobs[FW_ISP2300];
5200
	} else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5201
		blob = &qla_fw_blobs[FW_ISP2322];
5202
	} else if (IS_QLA24XX_TYPE(ha)) {
5203
		blob = &qla_fw_blobs[FW_ISP24XX];
5204 5205
	} else if (IS_QLA25XX(ha)) {
		blob = &qla_fw_blobs[FW_ISP25XX];
5206 5207
	} else if (IS_QLA81XX(ha)) {
		blob = &qla_fw_blobs[FW_ISP81XX];
5208 5209
	} else if (IS_QLA82XX(ha)) {
		blob = &qla_fw_blobs[FW_ISP82XX];
5210 5211 5212 5213
	} else if (IS_QLA2031(ha)) {
		blob = &qla_fw_blobs[FW_ISP2031];
	} else if (IS_QLA8031(ha)) {
		blob = &qla_fw_blobs[FW_ISP8031];
5214 5215
	} else {
		return NULL;
5216 5217
	}

5218
	mutex_lock(&qla_fw_lock);
5219 5220 5221 5222
	if (blob->fw)
		goto out;

	if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5223 5224
		ql_log(ql_log_warn, vha, 0x0063,
		    "Failed to load firmware image (%s).\n", blob->name);
5225 5226 5227 5228 5229 5230
		blob->fw = NULL;
		blob = NULL;
		goto out;
	}

out:
5231
	mutex_unlock(&qla_fw_lock);
5232 5233 5234 5235 5236 5237 5238 5239
	return blob;
}

static void
qla2x00_release_firmware(void)
{
	int idx;

5240
	mutex_lock(&qla_fw_lock);
5241
	for (idx = 0; idx < FW_BLOBS; idx++)
5242
		release_firmware(qla_fw_blobs[idx].fw);
5243
	mutex_unlock(&qla_fw_lock);
5244 5245
}

5246 5247 5248
static pci_ers_result_t
qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
{
5249 5250 5251
	scsi_qla_host_t *vha = pci_get_drvdata(pdev);
	struct qla_hw_data *ha = vha->hw;

5252 5253
	ql_dbg(ql_dbg_aer, vha, 0x9000,
	    "PCI error detected, state %x.\n", state);
5254

5255 5256
	switch (state) {
	case pci_channel_io_normal:
5257
		ha->flags.eeh_busy = 0;
5258 5259
		return PCI_ERS_RESULT_CAN_RECOVER;
	case pci_channel_io_frozen:
5260
		ha->flags.eeh_busy = 1;
5261 5262
		/* For ISP82XX complete any pending mailbox cmd */
		if (IS_QLA82XX(ha)) {
5263
			ha->flags.isp82xx_fw_hung = 1;
5264 5265
			ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
			qla82xx_clear_pending_mbx(vha);
5266
		}
5267
		qla2x00_free_irqs(vha);
5268
		pci_disable_device(pdev);
5269 5270
		/* Return back all IOs */
		qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5271 5272
		return PCI_ERS_RESULT_NEED_RESET;
	case pci_channel_io_perm_failure:
5273 5274
		ha->flags.pci_channel_io_perm_failure = 1;
		qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5275 5276 5277 5278 5279 5280 5281 5282 5283 5284 5285
		return PCI_ERS_RESULT_DISCONNECT;
	}
	return PCI_ERS_RESULT_NEED_RESET;
}

static pci_ers_result_t
qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
{
	int risc_paused = 0;
	uint32_t stat;
	unsigned long flags;
5286 5287
	scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
	struct qla_hw_data *ha = base_vha->hw;
5288 5289 5290
	struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
	struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;

5291 5292 5293
	if (IS_QLA82XX(ha))
		return PCI_ERS_RESULT_RECOVERED;

5294 5295 5296 5297 5298 5299 5300 5301 5302 5303 5304 5305 5306 5307 5308 5309 5310
	spin_lock_irqsave(&ha->hardware_lock, flags);
	if (IS_QLA2100(ha) || IS_QLA2200(ha)){
		stat = RD_REG_DWORD(&reg->hccr);
		if (stat & HCCR_RISC_PAUSE)
			risc_paused = 1;
	} else if (IS_QLA23XX(ha)) {
		stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
		if (stat & HSR_RISC_PAUSED)
			risc_paused = 1;
	} else if (IS_FWI2_CAPABLE(ha)) {
		stat = RD_REG_DWORD(&reg24->host_status);
		if (stat & HSRX_RISC_PAUSED)
			risc_paused = 1;
	}
	spin_unlock_irqrestore(&ha->hardware_lock, flags);

	if (risc_paused) {
5311 5312
		ql_log(ql_log_info, base_vha, 0x9003,
		    "RISC paused -- mmio_enabled, Dumping firmware.\n");
5313
		ha->isp_ops->fw_dump(base_vha, 0);
5314 5315 5316 5317 5318 5319

		return PCI_ERS_RESULT_NEED_RESET;
	} else
		return PCI_ERS_RESULT_RECOVERED;
}

5320 5321
static uint32_t
qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5322 5323 5324 5325 5326 5327 5328
{
	uint32_t rval = QLA_FUNCTION_FAILED;
	uint32_t drv_active = 0;
	struct qla_hw_data *ha = base_vha->hw;
	int fn;
	struct pci_dev *other_pdev = NULL;

5329 5330
	ql_dbg(ql_dbg_aer, base_vha, 0x9006,
	    "Entered %s.\n", __func__);
5331 5332 5333 5334 5335 5336 5337 5338 5339 5340 5341 5342 5343

	set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);

	if (base_vha->flags.online) {
		/* Abort all outstanding commands,
		 * so as to be requeued later */
		qla2x00_abort_isp_cleanup(base_vha);
	}


	fn = PCI_FUNC(ha->pdev->devfn);
	while (fn > 0) {
		fn--;
5344 5345
		ql_dbg(ql_dbg_aer, base_vha, 0x9007,
		    "Finding pci device at function = 0x%x.\n", fn);
5346 5347 5348 5349 5350 5351 5352 5353
		other_pdev =
		    pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
		    ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
		    fn));

		if (!other_pdev)
			continue;
		if (atomic_read(&other_pdev->enable_cnt)) {
5354 5355 5356
			ql_dbg(ql_dbg_aer, base_vha, 0x9008,
			    "Found PCI func available and enable at 0x%x.\n",
			    fn);
5357 5358 5359 5360 5361 5362 5363 5364
			pci_dev_put(other_pdev);
			break;
		}
		pci_dev_put(other_pdev);
	}

	if (!fn) {
		/* Reset owner */
5365 5366 5367
		ql_dbg(ql_dbg_aer, base_vha, 0x9009,
		    "This devfn is reset owner = 0x%x.\n",
		    ha->pdev->devfn);
5368 5369 5370
		qla82xx_idc_lock(ha);

		qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5371
		    QLA8XXX_DEV_INITIALIZING);
5372 5373 5374 5375 5376

		qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
		    QLA82XX_IDC_VERSION);

		drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5377 5378
		ql_dbg(ql_dbg_aer, base_vha, 0x900a,
		    "drv_active = 0x%x.\n", drv_active);
5379 5380 5381 5382 5383 5384 5385 5386 5387 5388 5389 5390

		qla82xx_idc_unlock(ha);
		/* Reset if device is not already reset
		 * drv_active would be 0 if a reset has already been done
		 */
		if (drv_active)
			rval = qla82xx_start_firmware(base_vha);
		else
			rval = QLA_SUCCESS;
		qla82xx_idc_lock(ha);

		if (rval != QLA_SUCCESS) {
5391 5392
			ql_log(ql_log_info, base_vha, 0x900b,
			    "HW State: FAILED.\n");
5393 5394
			qla82xx_clear_drv_active(ha);
			qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5395
			    QLA8XXX_DEV_FAILED);
5396
		} else {
5397 5398
			ql_log(ql_log_info, base_vha, 0x900c,
			    "HW State: READY.\n");
5399
			qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5400
			    QLA8XXX_DEV_READY);
5401
			qla82xx_idc_unlock(ha);
5402
			ha->flags.isp82xx_fw_hung = 0;
5403 5404 5405 5406 5407 5408 5409 5410
			rval = qla82xx_restart_isp(base_vha);
			qla82xx_idc_lock(ha);
			/* Clear driver state register */
			qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
			qla82xx_set_drv_active(base_vha);
		}
		qla82xx_idc_unlock(ha);
	} else {
5411 5412 5413
		ql_dbg(ql_dbg_aer, base_vha, 0x900d,
		    "This devfn is not reset owner = 0x%x.\n",
		    ha->pdev->devfn);
5414
		if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5415
		    QLA8XXX_DEV_READY)) {
5416
			ha->flags.isp82xx_fw_hung = 0;
5417 5418 5419 5420 5421 5422 5423 5424 5425 5426 5427
			rval = qla82xx_restart_isp(base_vha);
			qla82xx_idc_lock(ha);
			qla82xx_set_drv_active(base_vha);
			qla82xx_idc_unlock(ha);
		}
	}
	clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);

	return rval;
}

5428 5429 5430 5431
static pci_ers_result_t
qla2xxx_pci_slot_reset(struct pci_dev *pdev)
{
	pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5432 5433
	scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
	struct qla_hw_data *ha = base_vha->hw;
5434 5435
	struct rsp_que *rsp;
	int rc, retries = 10;
5436

5437 5438
	ql_dbg(ql_dbg_aer, base_vha, 0x9004,
	    "Slot Reset.\n");
5439

5440 5441 5442 5443 5444 5445 5446 5447
	/* Workaround: qla2xxx driver which access hardware earlier
	 * needs error state to be pci_channel_io_online.
	 * Otherwise mailbox command timesout.
	 */
	pdev->error_state = pci_channel_io_normal;

	pci_restore_state(pdev);

5448 5449 5450 5451 5452
	/* pci_restore_state() clears the saved_state flag of the device
	 * save restored state which resets saved_state flag
	 */
	pci_save_state(pdev);

5453 5454 5455 5456
	if (ha->mem_only)
		rc = pci_enable_device_mem(pdev);
	else
		rc = pci_enable_device(pdev);
5457

5458
	if (rc) {
5459
		ql_log(ql_log_warn, base_vha, 0x9005,
5460
		    "Can't re-enable PCI device after reset.\n");
5461
		goto exit_slot_reset;
5462 5463
	}

5464 5465
	rsp = ha->rsp_q_map[0];
	if (qla2x00_request_irqs(ha, rsp))
5466
		goto exit_slot_reset;
5467

5468
	if (ha->isp_ops->pci_config(base_vha))
5469 5470 5471 5472 5473 5474 5475 5476 5477
		goto exit_slot_reset;

	if (IS_QLA82XX(ha)) {
		if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
			ret = PCI_ERS_RESULT_RECOVERED;
			goto exit_slot_reset;
		} else
			goto exit_slot_reset;
	}
5478

5479 5480
	while (ha->flags.mbox_busy && retries--)
		msleep(1000);
5481

5482
	set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5483
	if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5484
		ret =  PCI_ERS_RESULT_RECOVERED;
5485
	clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5486

5487

5488
exit_slot_reset:
5489 5490
	ql_dbg(ql_dbg_aer, base_vha, 0x900e,
	    "slot_reset return %x.\n", ret);
5491

5492 5493 5494 5495 5496 5497
	return ret;
}

static void
qla2xxx_pci_resume(struct pci_dev *pdev)
{
5498 5499
	scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
	struct qla_hw_data *ha = base_vha->hw;
5500 5501
	int ret;

5502 5503
	ql_dbg(ql_dbg_aer, base_vha, 0x900f,
	    "pci_resume.\n");
5504

5505
	ret = qla2x00_wait_for_hba_online(base_vha);
5506
	if (ret != QLA_SUCCESS) {
5507 5508
		ql_log(ql_log_fatal, base_vha, 0x9002,
		    "The device failed to resume I/O from slot/link_reset.\n");
5509
	}
5510

5511 5512
	pci_cleanup_aer_uncorrect_error_status(pdev);

5513
	ha->flags.eeh_busy = 0;
5514 5515
}

5516
static const struct pci_error_handlers qla2xxx_err_handler = {
5517 5518 5519 5520 5521 5522
	.error_detected = qla2xxx_pci_error_detected,
	.mmio_enabled = qla2xxx_pci_mmio_enabled,
	.slot_reset = qla2xxx_pci_slot_reset,
	.resume = qla2xxx_pci_resume,
};

5523
static struct pci_device_id qla2xxx_pci_tbl[] = {
5524 5525 5526 5527 5528 5529 5530 5531 5532
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5533
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5534 5535
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5536
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5537
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5538
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5539
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5540
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5541
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5542
	{ PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
5543 5544 5545 5546
	{ 0 },
};
MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);

5547
static struct pci_driver qla2xxx_pci_driver = {
5548
	.name		= QLA2XXX_DRIVER_NAME,
5549 5550 5551
	.driver		= {
		.owner		= THIS_MODULE,
	},
5552
	.id_table	= qla2xxx_pci_tbl,
5553
	.probe		= qla2x00_probe_one,
A
Adrian Bunk 已提交
5554
	.remove		= qla2x00_remove_one,
5555
	.shutdown	= qla2x00_shutdown,
5556
	.err_handler	= &qla2xxx_err_handler,
5557 5558
};

5559
static const struct file_operations apidev_fops = {
5560
	.owner = THIS_MODULE,
5561
	.llseek = noop_llseek,
5562 5563
};

L
Linus Torvalds 已提交
5564 5565 5566 5567 5568 5569
/**
 * qla2x00_module_init - Module initialization.
 **/
static int __init
qla2x00_module_init(void)
{
5570 5571
	int ret = 0;

L
Linus Torvalds 已提交
5572
	/* Allocate cache for SRBs. */
5573
	srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5574
	    SLAB_HWCACHE_ALIGN, NULL);
L
Linus Torvalds 已提交
5575
	if (srb_cachep == NULL) {
5576 5577
		ql_log(ql_log_fatal, NULL, 0x0001,
		    "Unable to allocate SRB cache...Failing load!.\n");
L
Linus Torvalds 已提交
5578 5579 5580
		return -ENOMEM;
	}

5581 5582 5583 5584 5585 5586 5587 5588 5589 5590 5591 5592 5593 5594 5595
	/* Initialize target kmem_cache and mem_pools */
	ret = qlt_init();
	if (ret < 0) {
		kmem_cache_destroy(srb_cachep);
		return ret;
	} else if (ret > 0) {
		/*
		 * If initiator mode is explictly disabled by qlt_init(),
		 * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
		 * performing scsi_scan_target() during LOOP UP event.
		 */
		qla2xxx_transport_functions.disable_target_scan = 1;
		qla2xxx_transport_vport_functions.disable_target_scan = 1;
	}

L
Linus Torvalds 已提交
5596 5597
	/* Derive version string. */
	strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5598
	if (ql2xextended_error_logging)
5599 5600
		strcat(qla2x00_version_str, "-debug");

5601 5602
	qla2xxx_transport_template =
	    fc_attach_transport(&qla2xxx_transport_functions);
5603 5604
	if (!qla2xxx_transport_template) {
		kmem_cache_destroy(srb_cachep);
5605 5606
		ql_log(ql_log_fatal, NULL, 0x0002,
		    "fc_attach_transport failed...Failing load!.\n");
5607
		qlt_exit();
L
Linus Torvalds 已提交
5608
		return -ENODEV;
5609
	}
5610 5611 5612

	apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
	if (apidev_major < 0) {
5613 5614
		ql_log(ql_log_fatal, NULL, 0x0003,
		    "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5615 5616
	}

5617 5618 5619 5620
	qla2xxx_transport_vport_template =
	    fc_attach_transport(&qla2xxx_transport_vport_functions);
	if (!qla2xxx_transport_vport_template) {
		kmem_cache_destroy(srb_cachep);
5621
		qlt_exit();
5622
		fc_release_transport(qla2xxx_transport_template);
5623 5624
		ql_log(ql_log_fatal, NULL, 0x0004,
		    "fc_attach_transport vport failed...Failing load!.\n");
L
Linus Torvalds 已提交
5625
		return -ENODEV;
5626
	}
5627 5628
	ql_log(ql_log_info, NULL, 0x0005,
	    "QLogic Fibre Channel HBA Driver: %s.\n",
5629
	    qla2x00_version_str);
5630
	ret = pci_register_driver(&qla2xxx_pci_driver);
5631 5632
	if (ret) {
		kmem_cache_destroy(srb_cachep);
5633
		qlt_exit();
5634
		fc_release_transport(qla2xxx_transport_template);
5635
		fc_release_transport(qla2xxx_transport_vport_template);
5636 5637 5638
		ql_log(ql_log_fatal, NULL, 0x0006,
		    "pci_register_driver failed...ret=%d Failing load!.\n",
		    ret);
5639 5640
	}
	return ret;
L
Linus Torvalds 已提交
5641 5642 5643 5644 5645 5646 5647 5648
}

/**
 * qla2x00_module_exit - Module cleanup.
 **/
static void __exit
qla2x00_module_exit(void)
{
5649
	unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5650
	pci_unregister_driver(&qla2xxx_pci_driver);
5651
	qla2x00_release_firmware();
5652
	kmem_cache_destroy(srb_cachep);
5653
	qlt_exit();
5654 5655
	if (ctx_cachep)
		kmem_cache_destroy(ctx_cachep);
L
Linus Torvalds 已提交
5656
	fc_release_transport(qla2xxx_transport_template);
5657
	fc_release_transport(qla2xxx_transport_vport_template);
L
Linus Torvalds 已提交
5658 5659 5660 5661 5662 5663 5664 5665 5666
}

module_init(qla2x00_module_init);
module_exit(qla2x00_module_exit);

MODULE_AUTHOR("QLogic Corporation");
MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(QLA2XXX_VERSION);
5667 5668 5669 5670 5671
MODULE_FIRMWARE(FW_FILE_ISP21XX);
MODULE_FIRMWARE(FW_FILE_ISP22XX);
MODULE_FIRMWARE(FW_FILE_ISP2300);
MODULE_FIRMWARE(FW_FILE_ISP2322);
MODULE_FIRMWARE(FW_FILE_ISP24XX);
5672
MODULE_FIRMWARE(FW_FILE_ISP25XX);