mwl8k.c 73.3 KB
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/*
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 * drivers/net/wireless/mwl8k.c
 * Driver for Marvell TOPDOG 802.11 Wireless cards
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 *
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 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
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 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/completion.h>
#include <linux/etherdevice.h>
#include <net/mac80211.h>
#include <linux/moduleparam.h>
#include <linux/firmware.h>
#include <linux/workqueue.h>

#define MWL8K_DESC	"Marvell TOPDOG(R) 802.11 Wireless Network Driver"
#define MWL8K_NAME	KBUILD_MODNAME
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#define MWL8K_VERSION	"0.10"
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static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
	{ PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
	{ PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
	{ }
};
MODULE_DEVICE_TABLE(pci, mwl8k_table);

/* Register definitions */
#define MWL8K_HIU_GEN_PTR			0x00000c10
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#define  MWL8K_MODE_STA				 0x0000005a
#define  MWL8K_MODE_AP				 0x000000a5
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#define MWL8K_HIU_INT_CODE			0x00000c14
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#define  MWL8K_FWSTA_READY			 0xf0f1f2f4
#define  MWL8K_FWAP_READY			 0xf1f2f4a5
#define  MWL8K_INT_CODE_CMD_FINISHED		 0x00000005
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#define MWL8K_HIU_SCRATCH			0x00000c40

/* Host->device communications */
#define MWL8K_HIU_H2A_INTERRUPT_EVENTS		0x00000c18
#define MWL8K_HIU_H2A_INTERRUPT_STATUS		0x00000c1c
#define MWL8K_HIU_H2A_INTERRUPT_MASK		0x00000c20
#define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL	0x00000c24
#define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK	0x00000c28
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#define  MWL8K_H2A_INT_DUMMY			 (1 << 20)
#define  MWL8K_H2A_INT_RESET			 (1 << 15)
#define  MWL8K_H2A_INT_DOORBELL			 (1 << 1)
#define  MWL8K_H2A_INT_PPA_READY		 (1 << 0)
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/* Device->host communications */
#define MWL8K_HIU_A2H_INTERRUPT_EVENTS		0x00000c2c
#define MWL8K_HIU_A2H_INTERRUPT_STATUS		0x00000c30
#define MWL8K_HIU_A2H_INTERRUPT_MASK		0x00000c34
#define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL	0x00000c38
#define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK	0x00000c3c
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#define  MWL8K_A2H_INT_DUMMY			 (1 << 20)
#define  MWL8K_A2H_INT_CHNL_SWITCHED		 (1 << 11)
#define  MWL8K_A2H_INT_QUEUE_EMPTY		 (1 << 10)
#define  MWL8K_A2H_INT_RADAR_DETECT		 (1 << 7)
#define  MWL8K_A2H_INT_RADIO_ON			 (1 << 6)
#define  MWL8K_A2H_INT_RADIO_OFF		 (1 << 5)
#define  MWL8K_A2H_INT_MAC_EVENT		 (1 << 3)
#define  MWL8K_A2H_INT_OPC_DONE			 (1 << 2)
#define  MWL8K_A2H_INT_RX_READY			 (1 << 1)
#define  MWL8K_A2H_INT_TX_DONE			 (1 << 0)
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#define MWL8K_A2H_EVENTS	(MWL8K_A2H_INT_DUMMY | \
				 MWL8K_A2H_INT_CHNL_SWITCHED | \
				 MWL8K_A2H_INT_QUEUE_EMPTY | \
				 MWL8K_A2H_INT_RADAR_DETECT | \
				 MWL8K_A2H_INT_RADIO_ON | \
				 MWL8K_A2H_INT_RADIO_OFF | \
				 MWL8K_A2H_INT_MAC_EVENT | \
				 MWL8K_A2H_INT_OPC_DONE | \
				 MWL8K_A2H_INT_RX_READY | \
				 MWL8K_A2H_INT_TX_DONE)

/* WME stream classes */
#define WME_AC_BE	0		/* best effort */
#define WME_AC_BK	1		/* background */
#define WME_AC_VI	2		/* video */
#define WME_AC_VO	3		/* voice */

#define MWL8K_RX_QUEUES		1
#define MWL8K_TX_QUEUES		4

struct mwl8k_rx_queue {
	int rx_desc_count;

	/* hw receives here */
	int rx_head;

	/* refill descs here */
	int rx_tail;

	struct mwl8k_rx_desc *rx_desc_area;
	dma_addr_t rx_desc_dma;
	struct sk_buff **rx_skb;
};

struct mwl8k_tx_queue {
	/* hw transmits here */
	int tx_head;

	/* sw appends here */
	int tx_tail;

	struct ieee80211_tx_queue_stats tx_stats;
	struct mwl8k_tx_desc *tx_desc_area;
	dma_addr_t tx_desc_dma;
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	struct sk_buff **tx_skb;
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};

/* Pointers to the firmware data and meta information about it.  */
struct mwl8k_firmware {
	/* Microcode */
	struct firmware *ucode;

	/* Boot helper code */
	struct firmware *helper;
};

struct mwl8k_priv {
	void __iomem *regs;
	struct ieee80211_hw *hw;

	struct pci_dev *pdev;

	/* firmware files and meta data */
	struct mwl8k_firmware fw;
	u32 part_num;

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	/* firmware access */
	struct mutex fw_mutex;
	struct task_struct *fw_mutex_owner;
	int fw_mutex_depth;
	struct completion *hostcmd_wait;

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	/* lock held over TX and TX reap */
	spinlock_t tx_lock;

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	/* TX quiesce completion, protected by fw_mutex and tx_lock */
	struct completion *tx_wait;

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	struct ieee80211_vif *vif;

	struct ieee80211_channel *current_channel;

	/* power management status cookie from firmware */
	u32 *cookie;
	dma_addr_t cookie_dma;

	u16 num_mcaddrs;
	u8 hw_rev;
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	u32 fw_rev;
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	/*
	 * Running count of TX packets in flight, to avoid
	 * iterating over the transmit rings each time.
	 */
	int pending_tx_pkts;

	struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
	struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];

	/* PHY parameters */
	struct ieee80211_supported_band band;
	struct ieee80211_channel channels[14];
	struct ieee80211_rate rates[12];

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	bool radio_on;
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	bool radio_short_preamble;
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	bool wmm_enabled;
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	/* XXX need to convert this to handle multiple interfaces */
	bool capture_beacon;
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	u8 capture_bssid[ETH_ALEN];
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	struct sk_buff *beacon_skb;

	/*
	 * This FJ worker has to be global as it is scheduled from the
	 * RX handler.  At this point we don't know which interface it
	 * belongs to until the list of bssids waiting to complete join
	 * is checked.
	 */
	struct work_struct finalize_join_worker;

	/* Tasklet to reclaim TX descriptors and buffers after tx */
	struct tasklet_struct tx_reclaim_task;
};

/* Per interface specific private data */
struct mwl8k_vif {
	/* backpointer to parent config block */
	struct mwl8k_priv *priv;

	/* BSS config of AP or IBSS from mac80211*/
	struct ieee80211_bss_conf bss_info;

	/* BSSID of AP or IBSS */
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	u8	bssid[ETH_ALEN];
	u8	mac_addr[ETH_ALEN];
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	/*
	 * Subset of supported legacy rates.
	 * Intersection of AP and STA supported rates.
	 */
	struct ieee80211_rate legacy_rates[12];

	/* number of supported legacy rates */
	u8	legacy_nrates;

	 /* Index into station database.Returned by update_sta_db call */
	u8	peer_id;

	/* Non AMPDU sequence number assigned by driver */
	u16	seqno;
};

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#define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
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static const struct ieee80211_channel mwl8k_channels[] = {
	{ .center_freq = 2412, .hw_value = 1, },
	{ .center_freq = 2417, .hw_value = 2, },
	{ .center_freq = 2422, .hw_value = 3, },
	{ .center_freq = 2427, .hw_value = 4, },
	{ .center_freq = 2432, .hw_value = 5, },
	{ .center_freq = 2437, .hw_value = 6, },
	{ .center_freq = 2442, .hw_value = 7, },
	{ .center_freq = 2447, .hw_value = 8, },
	{ .center_freq = 2452, .hw_value = 9, },
	{ .center_freq = 2457, .hw_value = 10, },
	{ .center_freq = 2462, .hw_value = 11, },
};

static const struct ieee80211_rate mwl8k_rates[] = {
	{ .bitrate = 10, .hw_value = 2, },
	{ .bitrate = 20, .hw_value = 4, },
	{ .bitrate = 55, .hw_value = 11, },
	{ .bitrate = 60, .hw_value = 12, },
	{ .bitrate = 90, .hw_value = 18, },
	{ .bitrate = 110, .hw_value = 22, },
	{ .bitrate = 120, .hw_value = 24, },
	{ .bitrate = 180, .hw_value = 36, },
	{ .bitrate = 240, .hw_value = 48, },
	{ .bitrate = 360, .hw_value = 72, },
	{ .bitrate = 480, .hw_value = 96, },
	{ .bitrate = 540, .hw_value = 108, },
};

/* Set or get info from Firmware */
#define MWL8K_CMD_SET			0x0001
#define MWL8K_CMD_GET			0x0000

/* Firmware command codes */
#define MWL8K_CMD_CODE_DNLD		0x0001
#define MWL8K_CMD_GET_HW_SPEC		0x0003
#define MWL8K_CMD_MAC_MULTICAST_ADR	0x0010
#define MWL8K_CMD_GET_STAT		0x0014
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#define MWL8K_CMD_RADIO_CONTROL		0x001c
#define MWL8K_CMD_RF_TX_POWER		0x001e
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#define MWL8K_CMD_SET_PRE_SCAN		0x0107
#define MWL8K_CMD_SET_POST_SCAN		0x0108
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#define MWL8K_CMD_SET_RF_CHANNEL	0x010a
#define MWL8K_CMD_SET_AID		0x010d
#define MWL8K_CMD_SET_RATE		0x0110
#define MWL8K_CMD_SET_FINALIZE_JOIN	0x0111
#define MWL8K_CMD_RTS_THRESHOLD		0x0113
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#define MWL8K_CMD_SET_SLOT		0x0114
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#define MWL8K_CMD_SET_EDCA_PARAMS	0x0115
#define MWL8K_CMD_SET_WMM_MODE		0x0123
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#define MWL8K_CMD_MIMO_CONFIG		0x0125
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#define MWL8K_CMD_USE_FIXED_RATE	0x0126
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#define MWL8K_CMD_ENABLE_SNIFFER	0x0150
#define MWL8K_CMD_SET_RATEADAPT_MODE	0x0203
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#define MWL8K_CMD_UPDATE_STADB		0x1123
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static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
{
#define MWL8K_CMDNAME(x)	case MWL8K_CMD_##x: do {\
					snprintf(buf, bufsize, "%s", #x);\
					return buf;\
					} while (0)
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	switch (cmd & ~0x8000) {
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		MWL8K_CMDNAME(CODE_DNLD);
		MWL8K_CMDNAME(GET_HW_SPEC);
		MWL8K_CMDNAME(MAC_MULTICAST_ADR);
		MWL8K_CMDNAME(GET_STAT);
		MWL8K_CMDNAME(RADIO_CONTROL);
		MWL8K_CMDNAME(RF_TX_POWER);
		MWL8K_CMDNAME(SET_PRE_SCAN);
		MWL8K_CMDNAME(SET_POST_SCAN);
		MWL8K_CMDNAME(SET_RF_CHANNEL);
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		MWL8K_CMDNAME(SET_AID);
		MWL8K_CMDNAME(SET_RATE);
		MWL8K_CMDNAME(SET_FINALIZE_JOIN);
		MWL8K_CMDNAME(RTS_THRESHOLD);
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		MWL8K_CMDNAME(SET_SLOT);
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		MWL8K_CMDNAME(SET_EDCA_PARAMS);
		MWL8K_CMDNAME(SET_WMM_MODE);
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		MWL8K_CMDNAME(MIMO_CONFIG);
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		MWL8K_CMDNAME(USE_FIXED_RATE);
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		MWL8K_CMDNAME(ENABLE_SNIFFER);
		MWL8K_CMDNAME(SET_RATEADAPT_MODE);
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		MWL8K_CMDNAME(UPDATE_STADB);
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	default:
		snprintf(buf, bufsize, "0x%x", cmd);
	}
#undef MWL8K_CMDNAME

	return buf;
}

/* Hardware and firmware reset */
static void mwl8k_hw_reset(struct mwl8k_priv *priv)
{
	iowrite32(MWL8K_H2A_INT_RESET,
		priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
	iowrite32(MWL8K_H2A_INT_RESET,
		priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
	msleep(20);
}

/* Release fw image */
static void mwl8k_release_fw(struct firmware **fw)
{
	if (*fw == NULL)
		return;
	release_firmware(*fw);
	*fw = NULL;
}

static void mwl8k_release_firmware(struct mwl8k_priv *priv)
{
	mwl8k_release_fw(&priv->fw.ucode);
	mwl8k_release_fw(&priv->fw.helper);
}

/* Request fw image */
static int mwl8k_request_fw(struct mwl8k_priv *priv,
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			    const char *fname, struct firmware **fw)
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{
	/* release current image */
	if (*fw != NULL)
		mwl8k_release_fw(fw);

	return request_firmware((const struct firmware **)fw,
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				fname, &priv->pdev->dev);
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}

static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
{
	u8 filename[64];
	int rc;

	priv->part_num = part_num;

	snprintf(filename, sizeof(filename),
		 "mwl8k/helper_%u.fw", priv->part_num);

	rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
	if (rc) {
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		printk(KERN_ERR "%s: Error requesting helper firmware "
		       "file %s\n", pci_name(priv->pdev), filename);
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		return rc;
	}

	snprintf(filename, sizeof(filename),
		 "mwl8k/fmimage_%u.fw", priv->part_num);

	rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
	if (rc) {
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		printk(KERN_ERR "%s: Error requesting firmware file %s\n",
		       pci_name(priv->pdev), filename);
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		mwl8k_release_fw(&priv->fw.helper);
		return rc;
	}

	return 0;
}

struct mwl8k_cmd_pkt {
	__le16	code;
	__le16	length;
	__le16	seq_num;
	__le16	result;
	char	payload[0];
} __attribute__((packed));

/*
 * Firmware loading.
 */
static int
mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
{
	void __iomem *regs = priv->regs;
	dma_addr_t dma_addr;
	int loops;

	dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
	if (pci_dma_mapping_error(priv->pdev, dma_addr))
		return -ENOMEM;

	iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
	iowrite32(0, regs + MWL8K_HIU_INT_CODE);
	iowrite32(MWL8K_H2A_INT_DOORBELL,
		regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
	iowrite32(MWL8K_H2A_INT_DUMMY,
		regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);

	loops = 1000;
	do {
		u32 int_code;

		int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
		if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
			iowrite32(0, regs + MWL8K_HIU_INT_CODE);
			break;
		}

		udelay(1);
	} while (--loops);

	pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);

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	return loops ? 0 : -ETIMEDOUT;
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}

static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
				const u8 *data, size_t length)
{
	struct mwl8k_cmd_pkt *cmd;
	int done;
	int rc = 0;

	cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
	cmd->seq_num = 0;
	cmd->result = 0;

	done = 0;
	while (length) {
		int block_size = length > 256 ? 256 : length;

		memcpy(cmd->payload, data + done, block_size);
		cmd->length = cpu_to_le16(block_size);

		rc = mwl8k_send_fw_load_cmd(priv, cmd,
						sizeof(*cmd) + block_size);
		if (rc)
			break;

		done += block_size;
		length -= block_size;
	}

	if (!rc) {
		cmd->length = 0;
		rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
	}

	kfree(cmd);

	return rc;
}

static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
				const u8 *data, size_t length)
{
	unsigned char *buffer;
	int may_continue, rc = 0;
	u32 done, prev_block_size;

	buffer = kmalloc(1024, GFP_KERNEL);
	if (buffer == NULL)
		return -ENOMEM;

	done = 0;
	prev_block_size = 0;
	may_continue = 1000;
	while (may_continue > 0) {
		u32 block_size;

		block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
		if (block_size & 1) {
			block_size &= ~1;
			may_continue--;
		} else {
			done += prev_block_size;
			length -= prev_block_size;
		}

		if (block_size > 1024 || block_size > length) {
			rc = -EOVERFLOW;
			break;
		}

		if (length == 0) {
			rc = 0;
			break;
		}

		if (block_size == 0) {
			rc = -EPROTO;
			may_continue--;
			udelay(1);
			continue;
		}

		prev_block_size = block_size;
		memcpy(buffer, data + done, block_size);

		rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
		if (rc)
			break;
	}

	if (!rc && length != 0)
		rc = -EREMOTEIO;

	kfree(buffer);

	return rc;
}

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static int mwl8k_load_firmware(struct ieee80211_hw *hw)
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{
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	struct mwl8k_priv *priv = hw->priv;
	struct firmware *fw = priv->fw.ucode;
	int rc;
	int loops;

	if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
		struct firmware *helper = priv->fw.helper;
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		if (helper == NULL) {
			printk(KERN_ERR "%s: helper image needed but none "
			       "given\n", pci_name(priv->pdev));
			return -EINVAL;
		}
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		rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
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		if (rc) {
			printk(KERN_ERR "%s: unable to load firmware "
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			       "helper image\n", pci_name(priv->pdev));
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			return rc;
		}
		msleep(1);

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		rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
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	} else {
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		rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
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	}

	if (rc) {
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		printk(KERN_ERR "%s: unable to load firmware image\n",
		       pci_name(priv->pdev));
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		return rc;
	}

	iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
	msleep(1);

	loops = 200000;
	do {
		if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
						== MWL8K_FWSTA_READY)
			break;
		udelay(1);
	} while (--loops);

	return loops ? 0 : -ETIMEDOUT;
}


/*
 * Defines shared between transmission and reception.
 */
/* HT control fields for firmware */
struct ewc_ht_info {
	__le16	control1;
	__le16	control2;
	__le16	control3;
} __attribute__((packed));

/* Firmware Station database operations */
#define MWL8K_STA_DB_ADD_ENTRY		0
#define MWL8K_STA_DB_MODIFY_ENTRY	1
#define MWL8K_STA_DB_DEL_ENTRY		2
#define MWL8K_STA_DB_FLUSH		3

/* Peer Entry flags - used to define the type of the peer node */
#define MWL8K_PEER_TYPE_ACCESSPOINT	2

#define MWL8K_IEEE_LEGACY_DATA_RATES	12
#define MWL8K_MCS_BITMAP_SIZE		16

struct peer_capability_info {
	/* Peer type - AP vs. STA.  */
	__u8	peer_type;

	/* Basic 802.11 capabilities from assoc resp.  */
	__le16	basic_caps;

	/* Set if peer supports 802.11n high throughput (HT).  */
	__u8	ht_support;

	/* Valid if HT is supported.  */
	__le16	ht_caps;
	__u8	extended_ht_caps;
	struct ewc_ht_info	ewc_info;

	/* Legacy rate table. Intersection of our rates and peer rates.  */
	__u8	legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];

	/* HT rate table. Intersection of our rates and peer rates.  */
	__u8	ht_rates[MWL8K_MCS_BITMAP_SIZE];
629
	__u8	pad[16];
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	/* If set, interoperability mode, no proprietary extensions.  */
	__u8	interop;
	__u8	pad2;
	__u8	station_id;
	__le16	amsdu_enabled;
} __attribute__((packed));

/* Inline functions to manipulate QoS field in data descriptor.  */
static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
{
	u16 val_mask = 1 << 4;

	/* End of Service Period Bit 4 */
	return qos | val_mask;
}

static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
{
	u16 val_mask = 0x3;
	u8	shift = 5;
	u16 qos_mask = ~(val_mask << shift);

	/* Ack Policy Bit 5-6 */
	return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
}

static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
{
	u16 val_mask = 1 << 7;

	/* AMSDU present Bit 7 */
	return qos | val_mask;
}

static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
{
	u16 val_mask = 0xff;
	u8	shift = 8;
	u16 qos_mask = ~(val_mask << shift);

	/* Queue Length Bits 8-15 */
	return (qos & qos_mask) | ((len & val_mask) << shift);
}

/* DMA header used by firmware and hardware.  */
struct mwl8k_dma_data {
	__le16 fwlen;
	struct ieee80211_hdr wh;
} __attribute__((packed));

/* Routines to add/remove DMA header from skb.  */
682
static inline void mwl8k_remove_dma_header(struct sk_buff *skb)
683
{
684
	struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)skb->data;
685
	void *dst, *src = &tr->wh;
686
	int hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
687 688 689 690 691 692 693 694 695
	u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;

	dst = (void *)tr + space;
	if (dst != src) {
		memmove(dst, src, hdrlen);
		skb_pull(skb, space);
	}
}

696
static inline void mwl8k_add_dma_header(struct sk_buff *skb)
697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719
{
	struct ieee80211_hdr *wh;
	u32 hdrlen, pktlen;
	struct mwl8k_dma_data *tr;

	wh = (struct ieee80211_hdr *)skb->data;
	hdrlen = ieee80211_hdrlen(wh->frame_control);
	pktlen = skb->len;

	/*
	 * Copy up/down the 802.11 header; the firmware requires
	 * we present a 2-byte payload length followed by a
	 * 4-address header (w/o QoS), followed (optionally) by
	 * any WEP/ExtIV header (but only filled in for CCMP).
	 */
	if (hdrlen != sizeof(struct mwl8k_dma_data))
		skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);

	tr = (struct mwl8k_dma_data *)skb->data;
	if (wh != &tr->wh)
		memmove(&tr->wh, wh, hdrlen);

	/* Clear addr4 */
720
	memset(tr->wh.addr4, 0, ETH_ALEN);
721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772

	/*
	 * Firmware length is the length of the fully formed "802.11
	 * payload".  That is, everything except for the 802.11 header.
	 * This includes all crypto material including the MIC.
	 */
	tr->fwlen = cpu_to_le16(pktlen - hdrlen);
}


/*
 * Packet reception.
 */
#define MWL8K_RX_CTRL_OWNED_BY_HOST	0x02

struct mwl8k_rx_desc {
	__le16 pkt_len;
	__u8 link_quality;
	__u8 noise_level;
	__le32 pkt_phys_addr;
	__le32 next_rx_desc_phys_addr;
	__le16 qos_control;
	__le16 rate_info;
	__le32 pad0[4];
	__u8 rssi;
	__u8 channel;
	__le16 pad1;
	__u8 rx_ctrl;
	__u8 rx_status;
	__u8 pad2[2];
} __attribute__((packed));

#define MWL8K_RX_DESCS		256
#define MWL8K_RX_MAXSZ		3800

static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
{
	struct mwl8k_priv *priv = hw->priv;
	struct mwl8k_rx_queue *rxq = priv->rxq + index;
	int size;
	int i;

	rxq->rx_desc_count = 0;
	rxq->rx_head = 0;
	rxq->rx_tail = 0;

	size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);

	rxq->rx_desc_area =
		pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
	if (rxq->rx_desc_area == NULL) {
		printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
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		       wiphy_name(hw->wiphy));
774 775 776 777 778 779 780 781
		return -ENOMEM;
	}
	memset(rxq->rx_desc_area, 0, size);

	rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
				sizeof(*rxq->rx_skb), GFP_KERNEL);
	if (rxq->rx_skb == NULL) {
		printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
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		       wiphy_name(hw->wiphy));
783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798
		pci_free_consistent(priv->pdev, size,
				    rxq->rx_desc_area, rxq->rx_desc_dma);
		return -ENOMEM;
	}
	memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));

	for (i = 0; i < MWL8K_RX_DESCS; i++) {
		struct mwl8k_rx_desc *rx_desc;
		int nexti;

		rx_desc = rxq->rx_desc_area + i;
		nexti = (i + 1) % MWL8K_RX_DESCS;

		rx_desc->next_rx_desc_phys_addr =
			cpu_to_le32(rxq->rx_desc_dma
						+ nexti * sizeof(*rx_desc));
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		rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880
	}

	return 0;
}

static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
{
	struct mwl8k_priv *priv = hw->priv;
	struct mwl8k_rx_queue *rxq = priv->rxq + index;
	int refilled;

	refilled = 0;
	while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
		struct sk_buff *skb;
		int rx;

		skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
		if (skb == NULL)
			break;

		rxq->rx_desc_count++;

		rx = rxq->rx_tail;
		rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;

		rxq->rx_desc_area[rx].pkt_phys_addr =
			cpu_to_le32(pci_map_single(priv->pdev, skb->data,
					MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));

		rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
		rxq->rx_skb[rx] = skb;
		wmb();
		rxq->rx_desc_area[rx].rx_ctrl = 0;

		refilled++;
	}

	return refilled;
}

/* Must be called only when the card's reception is completely halted */
static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
{
	struct mwl8k_priv *priv = hw->priv;
	struct mwl8k_rx_queue *rxq = priv->rxq + index;
	int i;

	for (i = 0; i < MWL8K_RX_DESCS; i++) {
		if (rxq->rx_skb[i] != NULL) {
			unsigned long addr;

			addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
			pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
					 PCI_DMA_FROMDEVICE);
			kfree_skb(rxq->rx_skb[i]);
			rxq->rx_skb[i] = NULL;
		}
	}

	kfree(rxq->rx_skb);
	rxq->rx_skb = NULL;

	pci_free_consistent(priv->pdev,
			    MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
			    rxq->rx_desc_area, rxq->rx_desc_dma);
	rxq->rx_desc_area = NULL;
}


/*
 * Scan a list of BSSIDs to process for finalize join.
 * Allows for extension to process multiple BSSIDs.
 */
static inline int
mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
{
	return priv->capture_beacon &&
		ieee80211_is_beacon(wh->frame_control) &&
		!compare_ether_addr(wh->addr3, priv->capture_bssid);
}

881 882
static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
				     struct sk_buff *skb)
883
{
884 885
	struct mwl8k_priv *priv = hw->priv;

886
	priv->capture_beacon = false;
887
	memset(priv->capture_bssid, 0, ETH_ALEN);
888 889 890 891 892 893 894 895

	/*
	 * Use GFP_ATOMIC as rxq_process is called from
	 * the primary interrupt handler, memory allocation call
	 * must not sleep.
	 */
	priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
	if (priv->beacon_skb != NULL)
896
		ieee80211_queue_work(hw, &priv->finalize_join_worker);
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}

static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
{
	struct mwl8k_priv *priv = hw->priv;
	struct mwl8k_rx_queue *rxq = priv->rxq + index;
	int processed;

	processed = 0;
	while (rxq->rx_desc_count && limit--) {
		struct mwl8k_rx_desc *rx_desc;
		struct sk_buff *skb;
		struct ieee80211_rx_status status;
		unsigned long addr;
		struct ieee80211_hdr *wh;

		rx_desc = rxq->rx_desc_area + rxq->rx_head;
		if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
			break;
		rmb();

		skb = rxq->rx_skb[rxq->rx_head];
919 920
		if (skb == NULL)
			break;
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		rxq->rx_skb[rxq->rx_head] = NULL;

		rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
		rxq->rx_desc_count--;

		addr = le32_to_cpu(rx_desc->pkt_phys_addr);
		pci_unmap_single(priv->pdev, addr,
					MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);

		skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
931
		mwl8k_remove_dma_header(skb);
932 933 934 935

		wh = (struct ieee80211_hdr *)skb->data;

		/*
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		 * Check for a pending join operation.  Save a
		 * copy of the beacon and schedule a tasklet to
		 * send a FINALIZE_JOIN command to the firmware.
939 940
		 */
		if (mwl8k_capture_bssid(priv, wh))
941
			mwl8k_save_beacon(hw, skb);
942 943 944 945 946 947 948 949 950 951 952

		memset(&status, 0, sizeof(status));
		status.mactime = 0;
		status.signal = -rx_desc->rssi;
		status.noise = -rx_desc->noise_level;
		status.qual = rx_desc->link_quality;
		status.antenna = 1;
		status.rate_idx = 1;
		status.flag = 0;
		status.band = IEEE80211_BAND_2GHZ;
		status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
953 954
		memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
		ieee80211_rx_irqsafe(hw, skb);
955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997

		processed++;
	}

	return processed;
}


/*
 * Packet transmission.
 */

/* Transmit queue assignment.  */
enum {
	MWL8K_WME_AC_BK	= 0,		/* background access */
	MWL8K_WME_AC_BE	= 1,		/* best effort access */
	MWL8K_WME_AC_VI	= 2,		/* video access */
	MWL8K_WME_AC_VO	= 3,		/* voice access */
};

/* Transmit packet ACK policy */
#define MWL8K_TXD_ACK_POLICY_NORMAL		0
#define MWL8K_TXD_ACK_POLICY_BLOCKACK		3

#define GET_TXQ(_ac) (\
		((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
		((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
		((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
		MWL8K_WME_AC_BE)

#define MWL8K_TXD_STATUS_OK			0x00000001
#define MWL8K_TXD_STATUS_OK_RETRY		0x00000002
#define MWL8K_TXD_STATUS_OK_MORE_RETRY		0x00000004
#define MWL8K_TXD_STATUS_MULTICAST_TX		0x00000008
#define MWL8K_TXD_STATUS_FW_OWNED		0x80000000

struct mwl8k_tx_desc {
	__le32 status;
	__u8 data_rate;
	__u8 tx_priority;
	__le16 qos_control;
	__le32 pkt_phys_addr;
	__le16 pkt_len;
998
	__u8 dest_MAC_addr[ETH_ALEN];
999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014
	__le32 next_tx_desc_phys_addr;
	__le32 reserved;
	__le16 rate_info;
	__u8 peer_id;
	__u8 tx_frag_cnt;
} __attribute__((packed));

#define MWL8K_TX_DESCS		128

static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
{
	struct mwl8k_priv *priv = hw->priv;
	struct mwl8k_tx_queue *txq = priv->txq + index;
	int size;
	int i;

1015
	memset(&txq->tx_stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1016 1017 1018 1019 1020 1021 1022 1023 1024 1025
	txq->tx_stats.limit = MWL8K_TX_DESCS;
	txq->tx_head = 0;
	txq->tx_tail = 0;

	size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);

	txq->tx_desc_area =
		pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
	if (txq->tx_desc_area == NULL) {
		printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
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		       wiphy_name(hw->wiphy));
1027 1028 1029 1030 1031 1032 1033 1034
		return -ENOMEM;
	}
	memset(txq->tx_desc_area, 0, size);

	txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
								GFP_KERNEL);
	if (txq->tx_skb == NULL) {
		printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
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		       wiphy_name(hw->wiphy));
1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076
		pci_free_consistent(priv->pdev, size,
				    txq->tx_desc_area, txq->tx_desc_dma);
		return -ENOMEM;
	}
	memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));

	for (i = 0; i < MWL8K_TX_DESCS; i++) {
		struct mwl8k_tx_desc *tx_desc;
		int nexti;

		tx_desc = txq->tx_desc_area + i;
		nexti = (i + 1) % MWL8K_TX_DESCS;

		tx_desc->status = 0;
		tx_desc->next_tx_desc_phys_addr =
			cpu_to_le32(txq->tx_desc_dma +
						nexti * sizeof(*tx_desc));
	}

	return 0;
}

static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
{
	iowrite32(MWL8K_H2A_INT_PPA_READY,
		priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
	iowrite32(MWL8K_H2A_INT_DUMMY,
		priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
	ioread32(priv->regs + MWL8K_HIU_INT_CODE);
}

struct mwl8k_txq_info {
	u32 fw_owned;
	u32 drv_owned;
	u32 unused;
	u32 len;
	u32 head;
	u32 tail;
};

static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
1077
				struct mwl8k_txq_info *txinfo)
1078 1079 1080 1081 1082 1083
{
	int count, desc, status;
	struct mwl8k_tx_queue *txq;
	struct mwl8k_tx_desc *tx_desc;
	int ndescs = 0;

1084 1085 1086
	memset(txinfo, 0, MWL8K_TX_QUEUES * sizeof(struct mwl8k_txq_info));

	for (count = 0; count < MWL8K_TX_QUEUES; count++) {
1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107
		txq = priv->txq + count;
		txinfo[count].len = txq->tx_stats.len;
		txinfo[count].head = txq->tx_head;
		txinfo[count].tail = txq->tx_tail;
		for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
			tx_desc = txq->tx_desc_area + desc;
			status = le32_to_cpu(tx_desc->status);

			if (status & MWL8K_TXD_STATUS_FW_OWNED)
				txinfo[count].fw_owned++;
			else
				txinfo[count].drv_owned++;

			if (tx_desc->pkt_len == 0)
				txinfo[count].unused++;
		}
	}

	return ndescs;
}

1108
/*
1109
 * Must be called with priv->fw_mutex held and tx queues stopped.
1110
 */
1111
static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1112 1113
{
	struct mwl8k_priv *priv = hw->priv;
1114
	DECLARE_COMPLETION_ONSTACK(tx_wait);
1115 1116
	u32 count;
	unsigned long timeout;
1117 1118 1119 1120

	might_sleep();

	spin_lock_bh(&priv->tx_lock);
1121 1122 1123
	count = priv->pending_tx_pkts;
	if (count)
		priv->tx_wait = &tx_wait;
1124 1125 1126
	spin_unlock_bh(&priv->tx_lock);

	if (count) {
1127
		struct mwl8k_txq_info txinfo[MWL8K_TX_QUEUES];
1128 1129 1130
		int index;
		int newcount;

1131
		timeout = wait_for_completion_timeout(&tx_wait,
1132
					msecs_to_jiffies(5000));
1133 1134 1135 1136 1137
		if (timeout)
			return 0;

		spin_lock_bh(&priv->tx_lock);
		priv->tx_wait = NULL;
1138 1139
		newcount = priv->pending_tx_pkts;
		mwl8k_scan_tx_ring(priv, txinfo);
1140 1141
		spin_unlock_bh(&priv->tx_lock);

1142
		printk(KERN_ERR "%s(%u) TIMEDOUT:5000ms Pend:%u-->%u\n",
1143
		       __func__, __LINE__, count, newcount);
1144

1145
		for (index = 0; index < MWL8K_TX_QUEUES; index++)
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			printk(KERN_ERR "TXQ:%u L:%u H:%u T:%u FW:%u "
			       "DRV:%u U:%u\n",
1148 1149 1150 1151 1152 1153 1154
					index,
					txinfo[index].len,
					txinfo[index].head,
					txinfo[index].tail,
					txinfo[index].fw_owned,
					txinfo[index].drv_owned,
					txinfo[index].unused);
1155

1156 1157 1158 1159 1160 1161
		return -ETIMEDOUT;
	}

	return 0;
}

1162 1163 1164 1165
#define MWL8K_TXD_SUCCESS(status)				\
	((status) & (MWL8K_TXD_STATUS_OK |			\
		     MWL8K_TXD_STATUS_OK_RETRY |		\
		     MWL8K_TXD_STATUS_OK_MORE_RETRY))
1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176

static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
{
	struct mwl8k_priv *priv = hw->priv;
	struct mwl8k_tx_queue *txq = priv->txq + index;
	int wake = 0;

	while (txq->tx_stats.len > 0) {
		int tx;
		struct mwl8k_tx_desc *tx_desc;
		unsigned long addr;
1177
		int size;
1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199
		struct sk_buff *skb;
		struct ieee80211_tx_info *info;
		u32 status;

		tx = txq->tx_head;
		tx_desc = txq->tx_desc_area + tx;

		status = le32_to_cpu(tx_desc->status);

		if (status & MWL8K_TXD_STATUS_FW_OWNED) {
			if (!force)
				break;
			tx_desc->status &=
				~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
		}

		txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
		BUG_ON(txq->tx_stats.len == 0);
		txq->tx_stats.len--;
		priv->pending_tx_pkts--;

		addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1200
		size = le16_to_cpu(tx_desc->pkt_len);
1201 1202
		skb = txq->tx_skb[tx];
		txq->tx_skb[tx] = NULL;
1203 1204 1205 1206

		BUG_ON(skb == NULL);
		pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);

1207
		mwl8k_remove_dma_header(skb);
1208 1209 1210 1211 1212 1213 1214

		/* Mark descriptor as unused */
		tx_desc->pkt_phys_addr = 0;
		tx_desc->pkt_len = 0;

		info = IEEE80211_SKB_CB(skb);
		ieee80211_tx_info_clear_status(info);
1215
		if (MWL8K_TXD_SUCCESS(status))
1216 1217 1218 1219
			info->flags |= IEEE80211_TX_STAT_ACK;

		ieee80211_tx_status_irqsafe(hw, skb);

1220
		wake = 1;
1221 1222
	}

1223
	if (wake && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248
		ieee80211_wake_queue(hw, index);
}

/* must be called only when the card's transmit is completely halted */
static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
{
	struct mwl8k_priv *priv = hw->priv;
	struct mwl8k_tx_queue *txq = priv->txq + index;

	mwl8k_txq_reclaim(hw, index, 1);

	kfree(txq->tx_skb);
	txq->tx_skb = NULL;

	pci_free_consistent(priv->pdev,
			    MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
			    txq->tx_desc_area, txq->tx_desc_dma);
	txq->tx_desc_area = NULL;
}

static int
mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
{
	struct mwl8k_priv *priv = hw->priv;
	struct ieee80211_tx_info *tx_info;
1249
	struct mwl8k_vif *mwl8k_vif;
1250 1251 1252 1253
	struct ieee80211_hdr *wh;
	struct mwl8k_tx_queue *txq;
	struct mwl8k_tx_desc *tx;
	dma_addr_t dma;
1254 1255 1256
	u32 txstatus;
	u8 txdatarate;
	u16 qos;
1257

1258 1259 1260 1261 1262
	wh = (struct ieee80211_hdr *)skb->data;
	if (ieee80211_is_data_qos(wh->frame_control))
		qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
	else
		qos = 0;
1263

1264
	mwl8k_add_dma_header(skb);
1265
	wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1266 1267 1268 1269 1270 1271

	tx_info = IEEE80211_SKB_CB(skb);
	mwl8k_vif = MWL8K_VIF(tx_info->control.vif);

	if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
		u16 seqno = mwl8k_vif->seqno;
1272

1273 1274 1275 1276 1277
		wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
		wh->seq_ctrl |= cpu_to_le16(seqno << 4);
		mwl8k_vif->seqno = seqno++ % 4096;
	}

1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302
	/* Setup firmware control bit fields for each frame type.  */
	txstatus = 0;
	txdatarate = 0;
	if (ieee80211_is_mgmt(wh->frame_control) ||
	    ieee80211_is_ctl(wh->frame_control)) {
		txdatarate = 0;
		qos = mwl8k_qos_setbit_eosp(qos);
		/* Set Queue size to unspecified */
		qos = mwl8k_qos_setbit_qlen(qos, 0xff);
	} else if (ieee80211_is_data(wh->frame_control)) {
		txdatarate = 1;
		if (is_multicast_ether_addr(wh->addr1))
			txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;

		/* Send pkt in an aggregate if AMPDU frame.  */
		if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
			qos = mwl8k_qos_setbit_ack(qos,
				MWL8K_TXD_ACK_POLICY_BLOCKACK);
		else
			qos = mwl8k_qos_setbit_ack(qos,
				MWL8K_TXD_ACK_POLICY_NORMAL);

		if (qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT)
			qos = mwl8k_qos_setbit_amsdu(qos);
	}
1303 1304 1305 1306 1307 1308

	dma = pci_map_single(priv->pdev, skb->data,
				skb->len, PCI_DMA_TODEVICE);

	if (pci_dma_mapping_error(priv->pdev, dma)) {
		printk(KERN_DEBUG "%s: failed to dma map skb, "
L
Lennert Buytenhek 已提交
1309
		       "dropping TX frame.\n", wiphy_name(hw->wiphy));
1310
		dev_kfree_skb(skb);
1311 1312 1313
		return NETDEV_TX_OK;
	}

1314
	spin_lock_bh(&priv->tx_lock);
1315

1316
	txq = priv->txq + index;
1317

1318 1319
	BUG_ON(txq->tx_skb[txq->tx_tail] != NULL);
	txq->tx_skb[txq->tx_tail] = skb;
1320

1321 1322 1323
	tx = txq->tx_desc_area + txq->tx_tail;
	tx->data_rate = txdatarate;
	tx->tx_priority = index;
1324 1325 1326
	tx->qos_control = cpu_to_le16(qos);
	tx->pkt_phys_addr = cpu_to_le32(dma);
	tx->pkt_len = cpu_to_le16(skb->len);
1327 1328
	tx->rate_info = 0;
	tx->peer_id = mwl8k_vif->peer_id;
1329
	wmb();
1330 1331 1332
	tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);

	txq->tx_stats.count++;
1333 1334 1335
	txq->tx_stats.len++;
	priv->pending_tx_pkts++;

1336
	txq->tx_tail++;
1337 1338
	if (txq->tx_tail == MWL8K_TX_DESCS)
		txq->tx_tail = 0;
1339

1340 1341 1342
	if (txq->tx_head == txq->tx_tail)
		ieee80211_stop_queue(hw, index);

1343
	mwl8k_tx_start(priv);
1344 1345 1346 1347 1348 1349 1350

	spin_unlock_bh(&priv->tx_lock);

	return NETDEV_TX_OK;
}


1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404
/*
 * Firmware access.
 *
 * We have the following requirements for issuing firmware commands:
 * - Some commands require that the packet transmit path is idle when
 *   the command is issued.  (For simplicity, we'll just quiesce the
 *   transmit path for every command.)
 * - There are certain sequences of commands that need to be issued to
 *   the hardware sequentially, with no other intervening commands.
 *
 * This leads to an implementation of a "firmware lock" as a mutex that
 * can be taken recursively, and which is taken by both the low-level
 * command submission function (mwl8k_post_cmd) as well as any users of
 * that function that require issuing of an atomic sequence of commands,
 * and quiesces the transmit path whenever it's taken.
 */
static int mwl8k_fw_lock(struct ieee80211_hw *hw)
{
	struct mwl8k_priv *priv = hw->priv;

	if (priv->fw_mutex_owner != current) {
		int rc;

		mutex_lock(&priv->fw_mutex);
		ieee80211_stop_queues(hw);

		rc = mwl8k_tx_wait_empty(hw);
		if (rc) {
			ieee80211_wake_queues(hw);
			mutex_unlock(&priv->fw_mutex);

			return rc;
		}

		priv->fw_mutex_owner = current;
	}

	priv->fw_mutex_depth++;

	return 0;
}

static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
{
	struct mwl8k_priv *priv = hw->priv;

	if (!--priv->fw_mutex_depth) {
		ieee80211_wake_queues(hw);
		priv->fw_mutex_owner = NULL;
		mutex_unlock(&priv->fw_mutex);
	}
}


1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422
/*
 * Command processing.
 */

/* Timeout firmware commands after 2000ms */
#define MWL8K_CMD_TIMEOUT_MS	2000

static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
{
	DECLARE_COMPLETION_ONSTACK(cmd_wait);
	struct mwl8k_priv *priv = hw->priv;
	void __iomem *regs = priv->regs;
	dma_addr_t dma_addr;
	unsigned int dma_size;
	int rc;
	unsigned long timeout = 0;
	u8 buf[32];

L
Lennert Buytenhek 已提交
1423
	cmd->result = 0xffff;
1424 1425 1426 1427 1428 1429
	dma_size = le16_to_cpu(cmd->length);
	dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
				  PCI_DMA_BIDIRECTIONAL);
	if (pci_dma_mapping_error(priv->pdev, dma_addr))
		return -ENOMEM;

1430
	rc = mwl8k_fw_lock(hw);
1431 1432 1433
	if (rc) {
		pci_unmap_single(priv->pdev, dma_addr, dma_size,
						PCI_DMA_BIDIRECTIONAL);
1434
		return rc;
1435
	}
1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446

	priv->hostcmd_wait = &cmd_wait;
	iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
	iowrite32(MWL8K_H2A_INT_DOORBELL,
		regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
	iowrite32(MWL8K_H2A_INT_DUMMY,
		regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);

	timeout = wait_for_completion_timeout(&cmd_wait,
				msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));

1447 1448 1449 1450
	priv->hostcmd_wait = NULL;

	mwl8k_fw_unlock(hw);

1451 1452 1453
	pci_unmap_single(priv->pdev, dma_addr, dma_size,
					PCI_DMA_BIDIRECTIONAL);

1454 1455
	if (!timeout) {
		printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
L
Lennert Buytenhek 已提交
1456
		       wiphy_name(hw->wiphy),
1457 1458 1459 1460
		       mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
		       MWL8K_CMD_TIMEOUT_MS);
		rc = -ETIMEDOUT;
	} else {
1461
		rc = cmd->result ? -EINVAL : 0;
1462 1463
		if (rc)
			printk(KERN_ERR "%s: Command %s error 0x%x\n",
L
Lennert Buytenhek 已提交
1464
			       wiphy_name(hw->wiphy),
1465
			       mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1466
			       le16_to_cpu(cmd->result));
1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479
	}

	return rc;
}

/*
 * GET_HW_SPEC.
 */
struct mwl8k_cmd_get_hw_spec {
	struct mwl8k_cmd_pkt header;
	__u8 hw_rev;
	__u8 host_interface;
	__le16 num_mcaddrs;
1480
	__u8 perm_addr[ETH_ALEN];
1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510
	__le16 region_code;
	__le32 fw_rev;
	__le32 ps_cookie;
	__le32 caps;
	__u8 mcs_bitmap[16];
	__le32 rx_queue_ptr;
	__le32 num_tx_queues;
	__le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
	__le32 caps2;
	__le32 num_tx_desc_per_queue;
	__le32 total_rx_desc;
} __attribute__((packed));

static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
{
	struct mwl8k_priv *priv = hw->priv;
	struct mwl8k_cmd_get_hw_spec *cmd;
	int rc;
	int i;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));

	memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
	cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
	cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
1511
	cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1512 1513
	for (i = 0; i < MWL8K_TX_QUEUES; i++)
		cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
1514 1515
	cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
	cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS);
1516 1517 1518 1519 1520 1521

	rc = mwl8k_post_cmd(hw, &cmd->header);

	if (!rc) {
		SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
		priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1522
		priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536
		priv->hw_rev = cmd->hw_rev;
	}

	kfree(cmd);
	return rc;
}

/*
 * CMD_MAC_MULTICAST_ADR.
 */
struct mwl8k_cmd_mac_multicast_adr {
	struct mwl8k_cmd_pkt header;
	__le16 action;
	__le16 numaddr;
1537
	__u8 addr[0][ETH_ALEN];
1538 1539
};

1540 1541 1542 1543
#define MWL8K_ENABLE_RX_DIRECTED	0x0001
#define MWL8K_ENABLE_RX_MULTICAST	0x0002
#define MWL8K_ENABLE_RX_ALL_MULTICAST	0x0004
#define MWL8K_ENABLE_RX_BROADCAST	0x0008
1544

1545
static struct mwl8k_cmd_pkt *
L
Lennert Buytenhek 已提交
1546
__mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1547
			      int mc_count, struct dev_addr_list *mclist)
1548
{
1549
	struct mwl8k_priv *priv = hw->priv;
1550
	struct mwl8k_cmd_mac_multicast_adr *cmd;
1551 1552
	int size;

L
Lennert Buytenhek 已提交
1553
	if (allmulti || mc_count > priv->num_mcaddrs) {
1554 1555 1556
		allmulti = 1;
		mc_count = 0;
	}
1557 1558

	size = sizeof(*cmd) + mc_count * ETH_ALEN;
1559

1560
	cmd = kzalloc(size, GFP_ATOMIC);
1561
	if (cmd == NULL)
1562
		return NULL;
1563 1564 1565

	cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
	cmd->header.length = cpu_to_le16(size);
1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582
	cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
				  MWL8K_ENABLE_RX_BROADCAST);

	if (allmulti) {
		cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
	} else if (mc_count) {
		int i;

		cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
		cmd->numaddr = cpu_to_le16(mc_count);
		for (i = 0; i < mc_count && mclist; i++) {
			if (mclist->da_addrlen != ETH_ALEN) {
				kfree(cmd);
				return NULL;
			}
			memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
			mclist = mclist->next;
1583 1584 1585
		}
	}

1586
	return &cmd->header;
1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640
}

/*
 * CMD_802_11_GET_STAT.
 */
struct mwl8k_cmd_802_11_get_stat {
	struct mwl8k_cmd_pkt header;
	__le32 stats[64];
} __attribute__((packed));

#define MWL8K_STAT_ACK_FAILURE	9
#define MWL8K_STAT_RTS_FAILURE	12
#define MWL8K_STAT_FCS_ERROR	24
#define MWL8K_STAT_RTS_SUCCESS	11

static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
				struct ieee80211_low_level_stats *stats)
{
	struct mwl8k_cmd_802_11_get_stat *cmd;
	int rc;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));

	rc = mwl8k_post_cmd(hw, &cmd->header);
	if (!rc) {
		stats->dot11ACKFailureCount =
			le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
		stats->dot11RTSFailureCount =
			le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
		stats->dot11FCSErrorCount =
			le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
		stats->dot11RTSSuccessCount =
			le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
	}
	kfree(cmd);

	return rc;
}

/*
 * CMD_802_11_RADIO_CONTROL.
 */
struct mwl8k_cmd_802_11_radio_control {
	struct mwl8k_cmd_pkt header;
	__le16 action;
	__le16 control;
	__le16 radio_on;
} __attribute__((packed));

1641 1642
static int
mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1643 1644 1645 1646 1647
{
	struct mwl8k_priv *priv = hw->priv;
	struct mwl8k_cmd_802_11_radio_control *cmd;
	int rc;

1648
	if (enable == priv->radio_on && !force)
1649 1650 1651 1652 1653 1654 1655 1656 1657
		return 0;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));
	cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1658
	cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
1659 1660 1661 1662 1663 1664
	cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);

	rc = mwl8k_post_cmd(hw, &cmd->header);
	kfree(cmd);

	if (!rc)
1665
		priv->radio_on = enable;
1666 1667 1668 1669

	return rc;
}

1670 1671 1672 1673 1674 1675 1676 1677 1678 1679
static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw *hw)
{
	return mwl8k_cmd_802_11_radio_control(hw, 0, 0);
}

static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw *hw)
{
	return mwl8k_cmd_802_11_radio_control(hw, 1, 0);
}

1680 1681 1682 1683 1684 1685 1686 1687 1688
static int
mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
{
	struct mwl8k_priv *priv;

	if (hw == NULL || hw->priv == NULL)
		return -EINVAL;
	priv = hw->priv;

1689
	priv->radio_short_preamble = short_preamble;
1690

1691
	return mwl8k_cmd_802_11_radio_control(hw, 1, 1);
1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758
}

/*
 * CMD_802_11_RF_TX_POWER.
 */
#define MWL8K_TX_POWER_LEVEL_TOTAL	8

struct mwl8k_cmd_802_11_rf_tx_power {
	struct mwl8k_cmd_pkt header;
	__le16 action;
	__le16 support_level;
	__le16 current_level;
	__le16 reserved;
	__le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
} __attribute__((packed));

static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
{
	struct mwl8k_cmd_802_11_rf_tx_power *cmd;
	int rc;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));
	cmd->action = cpu_to_le16(MWL8K_CMD_SET);
	cmd->support_level = cpu_to_le16(dBm);

	rc = mwl8k_post_cmd(hw, &cmd->header);
	kfree(cmd);

	return rc;
}

/*
 * CMD_SET_PRE_SCAN.
 */
struct mwl8k_cmd_set_pre_scan {
	struct mwl8k_cmd_pkt header;
} __attribute__((packed));

static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
{
	struct mwl8k_cmd_set_pre_scan *cmd;
	int rc;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));

	rc = mwl8k_post_cmd(hw, &cmd->header);
	kfree(cmd);

	return rc;
}

/*
 * CMD_SET_POST_SCAN.
 */
struct mwl8k_cmd_set_post_scan {
	struct mwl8k_cmd_pkt header;
	__le32 isibss;
1759
	__u8 bssid[ETH_ALEN];
1760 1761 1762
} __attribute__((packed));

static int
1763
mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 *mac)
1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774
{
	struct mwl8k_cmd_set_post_scan *cmd;
	int rc;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));
	cmd->isibss = 0;
1775
	memcpy(cmd->bssid, mac, ETH_ALEN);
1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826

	rc = mwl8k_post_cmd(hw, &cmd->header);
	kfree(cmd);

	return rc;
}

/*
 * CMD_SET_RF_CHANNEL.
 */
struct mwl8k_cmd_set_rf_channel {
	struct mwl8k_cmd_pkt header;
	__le16 action;
	__u8 current_channel;
	__le32 channel_flags;
} __attribute__((packed));

static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
				    struct ieee80211_channel *channel)
{
	struct mwl8k_cmd_set_rf_channel *cmd;
	int rc;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));
	cmd->action = cpu_to_le16(MWL8K_CMD_SET);
	cmd->current_channel = channel->hw_value;
	if (channel->band == IEEE80211_BAND_2GHZ)
		cmd->channel_flags = cpu_to_le32(0x00000081);
	else
		cmd->channel_flags = cpu_to_le32(0x00000000);

	rc = mwl8k_post_cmd(hw, &cmd->header);
	kfree(cmd);

	return rc;
}

/*
 * CMD_SET_SLOT.
 */
struct mwl8k_cmd_set_slot {
	struct mwl8k_cmd_pkt header;
	__le16 action;
	__u8 short_slot;
} __attribute__((packed));

1827
static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838
{
	struct mwl8k_cmd_set_slot *cmd;
	int rc;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));
	cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1839
	cmd->short_slot = short_slot_time;
1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896

	rc = mwl8k_post_cmd(hw, &cmd->header);
	kfree(cmd);

	return rc;
}

/*
 * CMD_MIMO_CONFIG.
 */
struct mwl8k_cmd_mimo_config {
	struct mwl8k_cmd_pkt header;
	__le32 action;
	__u8 rx_antenna_map;
	__u8 tx_antenna_map;
} __attribute__((packed));

static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
{
	struct mwl8k_cmd_mimo_config *cmd;
	int rc;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));
	cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
	cmd->rx_antenna_map = rx;
	cmd->tx_antenna_map = tx;

	rc = mwl8k_post_cmd(hw, &cmd->header);
	kfree(cmd);

	return rc;
}

/*
 * CMD_ENABLE_SNIFFER.
 */
struct mwl8k_cmd_enable_sniffer {
	struct mwl8k_cmd_pkt header;
	__le32 action;
} __attribute__((packed));

static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
{
	struct mwl8k_cmd_enable_sniffer *cmd;
	int rc;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));
1897
	cmd->action = cpu_to_le32(!!enable);
1898 1899 1900 1901 1902 1903 1904 1905

	rc = mwl8k_post_cmd(hw, &cmd->header);
	kfree(cmd);

	return rc;
}

/*
1906
 * CMD_SET_RATEADAPT_MODE.
1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953
 */
struct mwl8k_cmd_set_rate_adapt_mode {
	struct mwl8k_cmd_pkt header;
	__le16 action;
	__le16 mode;
} __attribute__((packed));

static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
{
	struct mwl8k_cmd_set_rate_adapt_mode *cmd;
	int rc;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));
	cmd->action = cpu_to_le16(MWL8K_CMD_SET);
	cmd->mode = cpu_to_le16(mode);

	rc = mwl8k_post_cmd(hw, &cmd->header);
	kfree(cmd);

	return rc;
}

/*
 * CMD_SET_WMM_MODE.
 */
struct mwl8k_cmd_set_wmm {
	struct mwl8k_cmd_pkt header;
	__le16 action;
} __attribute__((packed));

static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
{
	struct mwl8k_priv *priv = hw->priv;
	struct mwl8k_cmd_set_wmm *cmd;
	int rc;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));
1954
	cmd->action = cpu_to_le16(!!enable);
1955 1956 1957 1958 1959

	rc = mwl8k_post_cmd(hw, &cmd->header);
	kfree(cmd);

	if (!rc)
1960
		priv->wmm_enabled = enable;
1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974

	return rc;
}

/*
 * CMD_SET_RTS_THRESHOLD.
 */
struct mwl8k_cmd_rts_threshold {
	struct mwl8k_cmd_pkt header;
	__le16 action;
	__le16 threshold;
} __attribute__((packed));

static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
1975
			       u16 action, u16 threshold)
1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986
{
	struct mwl8k_cmd_rts_threshold *cmd;
	int rc;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));
	cmd->action = cpu_to_le16(action);
1987
	cmd->threshold = cpu_to_le16(threshold);
1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043

	rc = mwl8k_post_cmd(hw, &cmd->header);
	kfree(cmd);

	return rc;
}

/*
 * CMD_SET_EDCA_PARAMS.
 */
struct mwl8k_cmd_set_edca_params {
	struct mwl8k_cmd_pkt header;

	/* See MWL8K_SET_EDCA_XXX below */
	__le16 action;

	/* TX opportunity in units of 32 us */
	__le16 txop;

	/* Log exponent of max contention period: 0...15*/
	__u8 log_cw_max;

	/* Log exponent of min contention period: 0...15 */
	__u8 log_cw_min;

	/* Adaptive interframe spacing in units of 32us */
	__u8 aifs;

	/* TX queue to configure */
	__u8 txq;
} __attribute__((packed));

#define MWL8K_SET_EDCA_CW	0x01
#define MWL8K_SET_EDCA_TXOP	0x02
#define MWL8K_SET_EDCA_AIFS	0x04

#define MWL8K_SET_EDCA_ALL	(MWL8K_SET_EDCA_CW | \
				 MWL8K_SET_EDCA_TXOP | \
				 MWL8K_SET_EDCA_AIFS)

static int
mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
		__u16 cw_min, __u16 cw_max,
		__u8 aifs, __u16 txop)
{
	struct mwl8k_cmd_set_edca_params *cmd;
	int rc;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));
	cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
	cmd->txop = cpu_to_le16(txop);
2044 2045
	cmd->log_cw_max = (u8)ilog2(cw_max + 1);
	cmd->log_cw_min = (u8)ilog2(cw_min + 1);
2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085
	cmd->aifs = aifs;
	cmd->txq = qnum;

	rc = mwl8k_post_cmd(hw, &cmd->header);
	kfree(cmd);

	return rc;
}

/*
 * CMD_FINALIZE_JOIN.
 */

/* FJ beacon buffer size is compiled into the firmware.  */
#define MWL8K_FJ_BEACON_MAXLEN	128

struct mwl8k_cmd_finalize_join {
	struct mwl8k_cmd_pkt header;
	__le32 sleep_interval;	/* Number of beacon periods to sleep */
	__u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
} __attribute__((packed));

static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
				__u16 framelen, __u16 dtim)
{
	struct mwl8k_cmd_finalize_join *cmd;
	struct ieee80211_mgmt *payload = frame;
	u16 hdrlen;
	u32 payload_len;
	int rc;

	if (frame == NULL)
		return -EINVAL;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));
2086
	cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2087 2088 2089 2090 2091 2092 2093 2094

	hdrlen = ieee80211_hdrlen(payload->frame_control);

	payload_len = framelen > hdrlen ? framelen - hdrlen : 0;

	/* XXX TBD Might just have to abort and return an error */
	if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
		printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
L
Lennert Buytenhek 已提交
2095 2096
		       "sent to firmware. Sz=%u MAX=%u\n", __func__,
		       payload_len, MWL8K_FJ_BEACON_MAXLEN);
2097

2098 2099
	if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
		payload_len = MWL8K_FJ_BEACON_MAXLEN;
2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 2115 2116 2117 2118

	if (payload && payload_len)
		memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);

	rc = mwl8k_post_cmd(hw, &cmd->header);
	kfree(cmd);
	return rc;
}

/*
 * CMD_UPDATE_STADB.
 */
struct mwl8k_cmd_update_sta_db {
	struct mwl8k_cmd_pkt header;

	/* See STADB_ACTION_TYPE */
	__le32	action;

	/* Peer MAC address */
2119
	__u8	peer_addr[ETH_ALEN];
2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146

	__le32	reserved;

	/* Peer info - valid during add/update.  */
	struct peer_capability_info	peer_info;
} __attribute__((packed));

static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
		struct ieee80211_vif *vif, __u32 action)
{
	struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
	struct ieee80211_bss_conf *info = &mv_vif->bss_info;
	struct mwl8k_cmd_update_sta_db *cmd;
	struct peer_capability_info *peer_info;
	struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
	int rc;
	__u8 count, *rates;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));

	cmd->action = cpu_to_le32(action);
	peer_info = &cmd->peer_info;
2147
	memcpy(cmd->peer_addr, mv_vif->bssid, ETH_ALEN);
2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158

	switch (action) {
	case MWL8K_STA_DB_ADD_ENTRY:
	case MWL8K_STA_DB_MODIFY_ENTRY:
		/* Build peer_info block */
		peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
		peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
		peer_info->interop = 1;
		peer_info->amsdu_enabled = 0;

		rates = peer_info->legacy_rates;
2159
		for (count = 0; count < mv_vif->legacy_nrates; count++)
2160 2161 2162 2163 2164 2165 2166 2167 2168 2169 2170 2171 2172 2173 2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193 2194 2195
			rates[count] = bitrates[count].hw_value;

		rc = mwl8k_post_cmd(hw, &cmd->header);
		if (rc == 0)
			mv_vif->peer_id = peer_info->station_id;

		break;

	case MWL8K_STA_DB_DEL_ENTRY:
	case MWL8K_STA_DB_FLUSH:
	default:
		rc = mwl8k_post_cmd(hw, &cmd->header);
		if (rc == 0)
			mv_vif->peer_id = 0;
		break;
	}
	kfree(cmd);

	return rc;
}

/*
 * CMD_SET_AID.
 */
#define MWL8K_RATE_INDEX_MAX_ARRAY			14

#define MWL8K_FRAME_PROT_DISABLED			0x00
#define MWL8K_FRAME_PROT_11G				0x07
#define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY		0x02
#define MWL8K_FRAME_PROT_11N_HT_ALL			0x06

struct mwl8k_cmd_update_set_aid {
	struct	mwl8k_cmd_pkt header;
	__le16	aid;

	 /* AP's MAC address (BSSID) */
2196
	__u8	bssid[ETH_ALEN];
2197 2198 2199 2200 2201 2202 2203 2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219
	__le16	protection_mode;
	__u8	supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
} __attribute__((packed));

static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
					struct ieee80211_vif *vif)
{
	struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
	struct ieee80211_bss_conf *info = &mv_vif->bss_info;
	struct mwl8k_cmd_update_set_aid *cmd;
	struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
	int count;
	u16 prot_mode;
	int rc;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));
	cmd->aid = cpu_to_le16(info->aid);

2220
	memcpy(cmd->bssid, mv_vif->bssid, ETH_ALEN);
2221 2222 2223 2224

	if (info->use_cts_prot) {
		prot_mode = MWL8K_FRAME_PROT_11G;
	} else {
2225
		switch (info->ht_operation_mode &
2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256 2257 2258 2259 2260 2261 2262 2263 2264 2265 2266 2267 2268 2269 2270 2271 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281 2282 2283 2284 2285 2286 2287 2288 2289 2290 2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342
			IEEE80211_HT_OP_MODE_PROTECTION) {
		case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
			prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
			break;
		case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
			prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
			break;
		default:
			prot_mode = MWL8K_FRAME_PROT_DISABLED;
			break;
		}
	}
	cmd->protection_mode = cpu_to_le16(prot_mode);

	for (count = 0; count < mv_vif->legacy_nrates; count++)
		cmd->supp_rates[count] = bitrates[count].hw_value;

	rc = mwl8k_post_cmd(hw, &cmd->header);
	kfree(cmd);

	return rc;
}

/*
 * CMD_SET_RATE.
 */
struct mwl8k_cmd_update_rateset {
	struct	mwl8k_cmd_pkt header;
	__u8	legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];

	/* Bitmap for supported MCS codes.  */
	__u8	mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
	__u8	reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
} __attribute__((packed));

static int mwl8k_update_rateset(struct ieee80211_hw *hw,
		struct ieee80211_vif *vif)
{
	struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
	struct mwl8k_cmd_update_rateset *cmd;
	struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
	int count;
	int rc;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));

	for (count = 0; count < mv_vif->legacy_nrates; count++)
		cmd->legacy_rates[count] = bitrates[count].hw_value;

	rc = mwl8k_post_cmd(hw, &cmd->header);
	kfree(cmd);

	return rc;
}

/*
 * CMD_USE_FIXED_RATE.
 */
#define MWL8K_RATE_TABLE_SIZE	8
#define MWL8K_UCAST_RATE	0
#define MWL8K_USE_AUTO_RATE	0x0002

struct mwl8k_rate_entry {
	/* Set to 1 if HT rate, 0 if legacy.  */
	__le32	is_ht_rate;

	/* Set to 1 to use retry_count field.  */
	__le32	enable_retry;

	/* Specified legacy rate or MCS.  */
	__le32	rate;

	/* Number of allowed retries.  */
	__le32	retry_count;
} __attribute__((packed));

struct mwl8k_rate_table {
	/* 1 to allow specified rate and below */
	__le32	allow_rate_drop;
	__le32	num_rates;
	struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
} __attribute__((packed));

struct mwl8k_cmd_use_fixed_rate {
	struct	mwl8k_cmd_pkt header;
	__le32	action;
	struct mwl8k_rate_table rate_table;

	/* Unicast, Broadcast or Multicast */
	__le32	rate_type;
	__le32	reserved1;
	__le32	reserved2;
} __attribute__((packed));

static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
	u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
{
	struct mwl8k_cmd_use_fixed_rate *cmd;
	int count;
	int rc;

	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
	if (cmd == NULL)
		return -ENOMEM;

	cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
	cmd->header.length = cpu_to_le16(sizeof(*cmd));

	cmd->action = cpu_to_le32(action);
	cmd->rate_type = cpu_to_le32(rate_type);

	if (rate_table != NULL) {
L
Lennert Buytenhek 已提交
2343 2344 2345 2346
		/*
		 * Copy over each field manually so that endian
		 * conversion can be done.
		 */
2347 2348 2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359 2360 2361 2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372 2373 2374 2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385 2386 2387 2388 2389 2390 2391 2392 2393 2394 2395
		cmd->rate_table.allow_rate_drop =
				cpu_to_le32(rate_table->allow_rate_drop);
		cmd->rate_table.num_rates =
				cpu_to_le32(rate_table->num_rates);

		for (count = 0; count < rate_table->num_rates; count++) {
			struct mwl8k_rate_entry *dst =
				&cmd->rate_table.rate_entry[count];
			struct mwl8k_rate_entry *src =
				&rate_table->rate_entry[count];

			dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
			dst->enable_retry = cpu_to_le32(src->enable_retry);
			dst->rate = cpu_to_le32(src->rate);
			dst->retry_count = cpu_to_le32(src->retry_count);
		}
	}

	rc = mwl8k_post_cmd(hw, &cmd->header);
	kfree(cmd);

	return rc;
}


/*
 * Interrupt handling.
 */
static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
{
	struct ieee80211_hw *hw = dev_id;
	struct mwl8k_priv *priv = hw->priv;
	u32 status;

	status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
	iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);

	if (!status)
		return IRQ_NONE;

	if (status & MWL8K_A2H_INT_TX_DONE)
		tasklet_schedule(&priv->tx_reclaim_task);

	if (status & MWL8K_A2H_INT_RX_READY) {
		while (rxq_process(hw, 0, 1))
			rxq_refill(hw, 0, 1);
	}

	if (status & MWL8K_A2H_INT_OPC_DONE) {
2396
		if (priv->hostcmd_wait != NULL)
2397 2398 2399 2400
			complete(priv->hostcmd_wait);
	}

	if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2401
		if (!mutex_is_locked(&priv->fw_mutex) &&
2402
		    priv->radio_on && priv->pending_tx_pkts)
2403
			mwl8k_tx_start(priv);
2404 2405 2406 2407 2408 2409 2410 2411 2412 2413 2414 2415 2416 2417 2418 2419 2420
	}

	return IRQ_HANDLED;
}


/*
 * Core driver operations.
 */
static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
{
	struct mwl8k_priv *priv = hw->priv;
	int index = skb_get_queue_mapping(skb);
	int rc;

	if (priv->current_channel == NULL) {
		printk(KERN_DEBUG "%s: dropped TX frame since radio "
L
Lennert Buytenhek 已提交
2421
		       "disabled\n", wiphy_name(hw->wiphy));
2422 2423 2424 2425 2426 2427 2428 2429 2430 2431 2432 2433 2434 2435 2436 2437 2438 2439
		dev_kfree_skb(skb);
		return NETDEV_TX_OK;
	}

	rc = mwl8k_txq_xmit(hw, index, skb);

	return rc;
}

static int mwl8k_start(struct ieee80211_hw *hw)
{
	struct mwl8k_priv *priv = hw->priv;
	int rc;

	rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
			 IRQF_SHARED, MWL8K_NAME, hw);
	if (rc) {
		printk(KERN_ERR "%s: failed to register IRQ handler\n",
L
Lennert Buytenhek 已提交
2440
		       wiphy_name(hw->wiphy));
2441
		return -EIO;
2442 2443
	}

2444 2445 2446
	/* Enable tx reclaim tasklet */
	tasklet_enable(&priv->tx_reclaim_task);

2447
	/* Enable interrupts */
2448
	iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2449

2450 2451 2452
	rc = mwl8k_fw_lock(hw);
	if (!rc) {
		rc = mwl8k_cmd_802_11_radio_enable(hw);
2453

2454 2455
		if (!rc)
			rc = mwl8k_cmd_set_pre_scan(hw);
2456

2457 2458 2459 2460 2461 2462
		if (!rc)
			rc = mwl8k_cmd_set_post_scan(hw,
					"\x00\x00\x00\x00\x00\x00");

		if (!rc)
			rc = mwl8k_cmd_setrateadaptmode(hw, 0);
2463

2464 2465
		if (!rc)
			rc = mwl8k_set_wmm(hw, 0);
2466

2467 2468
		if (!rc)
			rc = mwl8k_enable_sniffer(hw, 0);
2469

2470 2471 2472 2473 2474 2475 2476 2477
		mwl8k_fw_unlock(hw);
	}

	if (rc) {
		iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
		free_irq(priv->pdev->irq, hw);
		tasklet_disable(&priv->tx_reclaim_task);
	}
2478 2479 2480 2481 2482 2483 2484 2485 2486

	return rc;
}

static void mwl8k_stop(struct ieee80211_hw *hw)
{
	struct mwl8k_priv *priv = hw->priv;
	int i;

2487
	mwl8k_cmd_802_11_radio_disable(hw);
2488 2489 2490 2491 2492 2493 2494 2495 2496 2497 2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508 2509 2510 2511 2512 2513 2514 2515 2516 2517 2518 2519 2520 2521 2522

	ieee80211_stop_queues(hw);

	/* Disable interrupts */
	iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
	free_irq(priv->pdev->irq, hw);

	/* Stop finalize join worker */
	cancel_work_sync(&priv->finalize_join_worker);
	if (priv->beacon_skb != NULL)
		dev_kfree_skb(priv->beacon_skb);

	/* Stop tx reclaim tasklet */
	tasklet_disable(&priv->tx_reclaim_task);

	/* Return all skbs to mac80211 */
	for (i = 0; i < MWL8K_TX_QUEUES; i++)
		mwl8k_txq_reclaim(hw, i, 1);
}

static int mwl8k_add_interface(struct ieee80211_hw *hw,
				struct ieee80211_if_init_conf *conf)
{
	struct mwl8k_priv *priv = hw->priv;
	struct mwl8k_vif *mwl8k_vif;

	/*
	 * We only support one active interface at a time.
	 */
	if (priv->vif != NULL)
		return -EBUSY;

	/*
	 * We only support managed interfaces for now.
	 */
2523
	if (conf->type != NL80211_IFTYPE_STATION)
2524 2525 2526 2527 2528 2529 2530
		return -EINVAL;

	/* Clean out driver private area */
	mwl8k_vif = MWL8K_VIF(conf->vif);
	memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));

	/* Save the mac address */
2531
	memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
2532 2533 2534 2535 2536

	/* Back pointer to parent config block */
	mwl8k_vif->priv = priv;

	/* Setup initial PHY parameters */
2537
	memcpy(mwl8k_vif->legacy_rates,
2538 2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 2552 2553 2554 2555 2556 2557 2558 2559 2560
		priv->rates, sizeof(mwl8k_vif->legacy_rates));
	mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);

	/* Set Initial sequence number to zero */
	mwl8k_vif->seqno = 0;

	priv->vif = conf->vif;
	priv->current_channel = NULL;

	return 0;
}

static void mwl8k_remove_interface(struct ieee80211_hw *hw,
				   struct ieee80211_if_init_conf *conf)
{
	struct mwl8k_priv *priv = hw->priv;

	if (priv->vif == NULL)
		return;

	priv->vif = NULL;
}

2561
static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
2562 2563 2564
{
	struct ieee80211_conf *conf = &hw->conf;
	struct mwl8k_priv *priv = hw->priv;
2565
	int rc;
2566

L
Lennert Buytenhek 已提交
2567 2568 2569
	if (conf->flags & IEEE80211_CONF_IDLE) {
		mwl8k_cmd_802_11_radio_disable(hw);
		priv->current_channel = NULL;
2570
		return 0;
L
Lennert Buytenhek 已提交
2571 2572
	}

2573 2574 2575
	rc = mwl8k_fw_lock(hw);
	if (rc)
		return rc;
2576

2577 2578 2579
	rc = mwl8k_cmd_802_11_radio_enable(hw);
	if (rc)
		goto out;
2580

2581 2582 2583 2584 2585
	rc = mwl8k_cmd_set_rf_channel(hw, conf->channel);
	if (rc)
		goto out;

	priv->current_channel = conf->channel;
2586 2587 2588

	if (conf->power_level > 18)
		conf->power_level = 18;
2589 2590 2591
	rc = mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level);
	if (rc)
		goto out;
2592 2593 2594 2595

	if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
		rc = -EINVAL;

2596 2597
out:
	mwl8k_fw_unlock(hw);
2598

2599
	return rc;
2600 2601
}

2602 2603 2604 2605
static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
				   struct ieee80211_vif *vif,
				   struct ieee80211_bss_conf *info,
				   u32 changed)
2606 2607 2608
{
	struct mwl8k_priv *priv = hw->priv;
	struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2609 2610 2611 2612 2613 2614 2615
	int rc;

	if (changed & BSS_CHANGED_BSSID)
		memcpy(mwl8k_vif->bssid, info->bssid, ETH_ALEN);

	if ((changed & BSS_CHANGED_ASSOC) == 0)
		return;
2616 2617 2618

	priv->capture_beacon = false;

2619
	rc = mwl8k_fw_lock(hw);
2620
	if (rc)
2621 2622
		return;

2623 2624 2625 2626 2627
	if (info->assoc) {
		memcpy(&mwl8k_vif->bss_info, info,
			sizeof(struct ieee80211_bss_conf));

		/* Install rates */
2628 2629 2630
		rc = mwl8k_update_rateset(hw, vif);
		if (rc)
			goto out;
2631 2632

		/* Turn on rate adaptation */
2633 2634 2635 2636
		rc = mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
			MWL8K_UCAST_RATE, NULL);
		if (rc)
			goto out;
2637 2638

		/* Set radio preamble */
2639 2640 2641
		rc = mwl8k_set_radio_preamble(hw, info->use_short_preamble);
		if (rc)
			goto out;
2642 2643

		/* Set slot time */
2644 2645 2646
		rc = mwl8k_cmd_set_slot(hw, info->use_short_slot);
		if (rc)
			goto out;
2647 2648

		/* Update peer rate info */
2649 2650 2651 2652
		rc = mwl8k_cmd_update_sta_db(hw, vif,
				MWL8K_STA_DB_MODIFY_ENTRY);
		if (rc)
			goto out;
2653 2654

		/* Set AID */
2655 2656 2657
		rc = mwl8k_cmd_set_aid(hw, vif);
		if (rc)
			goto out;
2658 2659 2660 2661 2662

		/*
		 * Finalize the join.  Tell rx handler to process
		 * next beacon from our BSSID.
		 */
2663
		memcpy(priv->capture_bssid, mwl8k_vif->bssid, ETH_ALEN);
2664 2665
		priv->capture_beacon = true;
	} else {
2666
		rc = mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
2667 2668
		memset(&mwl8k_vif->bss_info, 0,
			sizeof(struct ieee80211_bss_conf));
2669
		memset(mwl8k_vif->bssid, 0, ETH_ALEN);
2670 2671
	}

2672 2673
out:
	mwl8k_fw_unlock(hw);
2674 2675
}

2676 2677 2678 2679 2680
static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
				   int mc_count, struct dev_addr_list *mclist)
{
	struct mwl8k_cmd_pkt *cmd;

L
Lennert Buytenhek 已提交
2681 2682 2683 2684 2685 2686 2687 2688
	/*
	 * Synthesize and return a command packet that programs the
	 * hardware multicast address filter.  At this point we don't
	 * know whether FIF_ALLMULTI is being requested, but if it is,
	 * we'll end up throwing this packet away and creating a new
	 * one in mwl8k_configure_filter().
	 */
	cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
2689 2690 2691 2692

	return (unsigned long)cmd;
}

2693 2694 2695 2696 2697 2698
static void mwl8k_configure_filter(struct ieee80211_hw *hw,
				   unsigned int changed_flags,
				   unsigned int *total_flags,
				   u64 multicast)
{
	struct mwl8k_priv *priv = hw->priv;
L
Lennert Buytenhek 已提交
2699
	struct mwl8k_cmd_pkt *cmd;
2700

2701
	/* Clear unsupported feature flags */
L
Lennert Buytenhek 已提交
2702
	*total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
2703

2704 2705
	if (mwl8k_fw_lock(hw))
		return;
2706

2707 2708 2709
	if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
		if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
			mwl8k_cmd_set_pre_scan(hw);
2710
		else {
2711 2712 2713 2714 2715 2716
			u8 *bssid;

			bssid = "\x00\x00\x00\x00\x00\x00";
			if (priv->vif != NULL)
				bssid = MWL8K_VIF(priv->vif)->bssid;

2717
			mwl8k_cmd_set_post_scan(hw, bssid);
2718 2719 2720
		}
	}

L
Lennert Buytenhek 已提交
2721 2722 2723 2724 2725 2726 2727 2728 2729 2730 2731 2732 2733 2734 2735 2736
	cmd = (void *)(unsigned long)multicast;

	/*
	 * If FIF_ALLMULTI is being requested, throw away the command
	 * packet that ->prepare_multicast() built and replace it with
	 * a command packet that enables reception of all multicast
	 * packets.
	 */
	if (*total_flags & FIF_ALLMULTI) {
		kfree(cmd);
		cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
	}

	if (cmd != NULL) {
		mwl8k_post_cmd(hw, cmd);
		kfree(cmd);
2737
	}
2738

2739
	mwl8k_fw_unlock(hw);
2740 2741 2742 2743
}

static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
{
2744
	return mwl8k_rts_threshold(hw, MWL8K_CMD_SET, value);
2745 2746 2747 2748 2749
}

static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
			 const struct ieee80211_tx_queue_params *params)
{
2750
	struct mwl8k_priv *priv = hw->priv;
2751 2752
	int rc;

2753 2754 2755 2756
	rc = mwl8k_fw_lock(hw);
	if (!rc) {
		if (!priv->wmm_enabled)
			rc = mwl8k_set_wmm(hw, 1);
2757

2758 2759 2760 2761 2762 2763 2764 2765
		if (!rc)
			rc = mwl8k_set_edca_params(hw, queue,
						   params->cw_min,
						   params->cw_max,
						   params->aifs,
						   params->txop);

		mwl8k_fw_unlock(hw);
2766
	}
2767

2768 2769 2770 2771 2772 2773 2774 2775 2776 2777 2778 2779 2780 2781 2782 2783 2784 2785
	return rc;
}

static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
			      struct ieee80211_tx_queue_stats *stats)
{
	struct mwl8k_priv *priv = hw->priv;
	struct mwl8k_tx_queue *txq;
	int index;

	spin_lock_bh(&priv->tx_lock);
	for (index = 0; index < MWL8K_TX_QUEUES; index++) {
		txq = priv->txq + index;
		memcpy(&stats[index], &txq->tx_stats,
			sizeof(struct ieee80211_tx_queue_stats));
	}
	spin_unlock_bh(&priv->tx_lock);

2786
	return 0;
2787 2788 2789 2790 2791
}

static int mwl8k_get_stats(struct ieee80211_hw *hw,
			   struct ieee80211_low_level_stats *stats)
{
2792
	return mwl8k_cmd_802_11_get_stat(hw, stats);
2793 2794 2795 2796 2797 2798 2799 2800 2801 2802
}

static const struct ieee80211_ops mwl8k_ops = {
	.tx			= mwl8k_tx,
	.start			= mwl8k_start,
	.stop			= mwl8k_stop,
	.add_interface		= mwl8k_add_interface,
	.remove_interface	= mwl8k_remove_interface,
	.config			= mwl8k_config,
	.bss_info_changed	= mwl8k_bss_info_changed,
2803
	.prepare_multicast	= mwl8k_prepare_multicast,
2804 2805 2806 2807 2808 2809 2810 2811 2812 2813 2814 2815 2816 2817 2818 2819 2820
	.configure_filter	= mwl8k_configure_filter,
	.set_rts_threshold	= mwl8k_set_rts_threshold,
	.conf_tx		= mwl8k_conf_tx,
	.get_tx_stats		= mwl8k_get_tx_stats,
	.get_stats		= mwl8k_get_stats,
};

static void mwl8k_tx_reclaim_handler(unsigned long data)
{
	int i;
	struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
	struct mwl8k_priv *priv = hw->priv;

	spin_lock_bh(&priv->tx_lock);
	for (i = 0; i < MWL8K_TX_QUEUES; i++)
		mwl8k_txq_reclaim(hw, i, 0);

2821
	if (priv->tx_wait != NULL && !priv->pending_tx_pkts) {
2822 2823
		complete(priv->tx_wait);
		priv->tx_wait = NULL;
2824 2825 2826 2827 2828 2829 2830 2831 2832
	}
	spin_unlock_bh(&priv->tx_lock);
}

static void mwl8k_finalize_join_worker(struct work_struct *work)
{
	struct mwl8k_priv *priv =
		container_of(work, struct mwl8k_priv, finalize_join_worker);
	struct sk_buff *skb = priv->beacon_skb;
2833
	u8 dtim = MWL8K_VIF(priv->vif)->bss_info.dtim_period;
2834 2835 2836 2837 2838 2839 2840 2841 2842 2843

	mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
	dev_kfree_skb(skb);

	priv->beacon_skb = NULL;
}

static int __devinit mwl8k_probe(struct pci_dev *pdev,
				 const struct pci_device_id *id)
{
2844
	static int printed_version = 0;
2845 2846 2847 2848
	struct ieee80211_hw *hw;
	struct mwl8k_priv *priv;
	int rc;
	int i;
2849 2850 2851 2852 2853

	if (!printed_version) {
		printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
		printed_version = 1;
	}
2854 2855 2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871 2872 2873 2874 2875 2876 2877 2878 2879 2880

	rc = pci_enable_device(pdev);
	if (rc) {
		printk(KERN_ERR "%s: Cannot enable new PCI device\n",
		       MWL8K_NAME);
		return rc;
	}

	rc = pci_request_regions(pdev, MWL8K_NAME);
	if (rc) {
		printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
		       MWL8K_NAME);
		return rc;
	}

	pci_set_master(pdev);

	hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
	if (hw == NULL) {
		printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
		rc = -ENOMEM;
		goto err_free_reg;
	}

	priv = hw->priv;
	priv->hw = hw;
	priv->pdev = pdev;
2881
	priv->wmm_enabled = false;
2882 2883 2884 2885 2886 2887 2888
	priv->pending_tx_pkts = 0;

	SET_IEEE80211_DEV(hw, &pdev->dev);
	pci_set_drvdata(pdev, hw);

	priv->regs = pci_iomap(pdev, 1, 0x10000);
	if (priv->regs == NULL) {
L
Lennert Buytenhek 已提交
2889 2890
		printk(KERN_ERR "%s: Cannot map device memory\n",
		       wiphy_name(hw->wiphy));
2891 2892 2893 2894 2895 2896 2897 2898 2899 2900 2901 2902 2903 2904 2905 2906 2907 2908 2909 2910 2911 2912 2913 2914 2915
		goto err_iounmap;
	}

	memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
	priv->band.band = IEEE80211_BAND_2GHZ;
	priv->band.channels = priv->channels;
	priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
	priv->band.bitrates = priv->rates;
	priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
	hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;

	BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
	memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));

	/*
	 * Extra headroom is the size of the required DMA header
	 * minus the size of the smallest 802.11 frame (CTS frame).
	 */
	hw->extra_tx_headroom =
		sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);

	hw->channel_change_time = 10;

	hw->queues = MWL8K_TX_QUEUES;

2916
	hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
2917 2918

	/* Set rssi and noise values to dBm */
2919
	hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
2920 2921 2922 2923
	hw->vif_data_size = sizeof(struct mwl8k_vif);
	priv->vif = NULL;

	/* Set default radio state and preamble */
2924
	priv->radio_on = 0;
2925
	priv->radio_short_preamble = 0;
2926 2927 2928 2929 2930 2931 2932 2933 2934 2935 2936 2937 2938 2939 2940 2941 2942 2943 2944

	/* Finalize join worker */
	INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);

	/* TX reclaim tasklet */
	tasklet_init(&priv->tx_reclaim_task,
			mwl8k_tx_reclaim_handler, (unsigned long)hw);
	tasklet_disable(&priv->tx_reclaim_task);

	/* Power management cookie */
	priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
	if (priv->cookie == NULL)
		goto err_iounmap;

	rc = mwl8k_rxq_init(hw, 0);
	if (rc)
		goto err_iounmap;
	rxq_refill(hw, 0, INT_MAX);

2945 2946 2947 2948 2949
	mutex_init(&priv->fw_mutex);
	priv->fw_mutex_owner = NULL;
	priv->fw_mutex_depth = 0;
	priv->hostcmd_wait = NULL;

2950 2951
	spin_lock_init(&priv->tx_lock);

2952 2953
	priv->tx_wait = NULL;

2954 2955 2956 2957 2958 2959 2960
	for (i = 0; i < MWL8K_TX_QUEUES; i++) {
		rc = mwl8k_txq_init(hw, i);
		if (rc)
			goto err_free_queues;
	}

	iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2961
	iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2962 2963 2964 2965 2966 2967 2968
	iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
	iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);

	rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
			 IRQF_SHARED, MWL8K_NAME, hw);
	if (rc) {
		printk(KERN_ERR "%s: failed to register IRQ handler\n",
L
Lennert Buytenhek 已提交
2969
		       wiphy_name(hw->wiphy));
2970 2971 2972 2973 2974 2975 2976 2977 2978
		goto err_free_queues;
	}

	/* Reset firmware and hardware */
	mwl8k_hw_reset(priv);

	/* Ask userland hotplug daemon for the device firmware */
	rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
	if (rc) {
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		printk(KERN_ERR "%s: Firmware files not found\n",
		       wiphy_name(hw->wiphy));
2981 2982 2983 2984
		goto err_free_irq;
	}

	/* Load firmware into hardware */
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	rc = mwl8k_load_firmware(hw);
2986
	if (rc) {
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		printk(KERN_ERR "%s: Cannot start firmware\n",
		       wiphy_name(hw->wiphy));
2989 2990 2991 2992 2993 2994 2995 2996 2997 2998 2999
		goto err_stop_firmware;
	}

	/* Reclaim memory once firmware is successfully loaded */
	mwl8k_release_firmware(priv);

	/*
	 * Temporarily enable interrupts.  Initial firmware host
	 * commands use interrupts and avoids polling.  Disable
	 * interrupts when done.
	 */
3000
	iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3001 3002 3003 3004

	/* Get config data, mac addrs etc */
	rc = mwl8k_cmd_get_hw_spec(hw);
	if (rc) {
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		printk(KERN_ERR "%s: Cannot initialise firmware\n",
		       wiphy_name(hw->wiphy));
3007 3008 3009 3010
		goto err_stop_firmware;
	}

	/* Turn radio off */
3011
	rc = mwl8k_cmd_802_11_radio_disable(hw);
3012
	if (rc) {
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		printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
3014 3015 3016 3017 3018 3019 3020 3021 3022
		goto err_stop_firmware;
	}

	/* Disable interrupts */
	iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
	free_irq(priv->pdev->irq, hw);

	rc = ieee80211_register_hw(hw);
	if (rc) {
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		printk(KERN_ERR "%s: Cannot register device\n",
		       wiphy_name(hw->wiphy));
3025 3026 3027
		goto err_stop_firmware;
	}

3028 3029 3030 3031 3032
	printk(KERN_INFO "%s: 88w%u v%d, %pM, firmware version %u.%u.%u.%u\n",
	       wiphy_name(hw->wiphy), priv->part_num, priv->hw_rev,
	       hw->wiphy->perm_addr,
	       (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
	       (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
3033 3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066

	return 0;

err_stop_firmware:
	mwl8k_hw_reset(priv);
	mwl8k_release_firmware(priv);

err_free_irq:
	iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
	free_irq(priv->pdev->irq, hw);

err_free_queues:
	for (i = 0; i < MWL8K_TX_QUEUES; i++)
		mwl8k_txq_deinit(hw, i);
	mwl8k_rxq_deinit(hw, 0);

err_iounmap:
	if (priv->cookie != NULL)
		pci_free_consistent(priv->pdev, 4,
				priv->cookie, priv->cookie_dma);

	if (priv->regs != NULL)
		pci_iounmap(pdev, priv->regs);

	pci_set_drvdata(pdev, NULL);
	ieee80211_free_hw(hw);

err_free_reg:
	pci_release_regions(pdev);
	pci_disable_device(pdev);

	return rc;
}

3067
static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
3068 3069 3070 3071
{
	printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
}

3072
static void __devexit mwl8k_remove(struct pci_dev *pdev)
3073 3074 3075 3076 3077 3078 3079 3080 3081 3082 3083
{
	struct ieee80211_hw *hw = pci_get_drvdata(pdev);
	struct mwl8k_priv *priv;
	int i;

	if (hw == NULL)
		return;
	priv = hw->priv;

	ieee80211_stop_queues(hw);

3084 3085
	ieee80211_unregister_hw(hw);

3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096 3097 3098 3099 3100
	/* Remove tx reclaim tasklet */
	tasklet_kill(&priv->tx_reclaim_task);

	/* Stop hardware */
	mwl8k_hw_reset(priv);

	/* Return all skbs to mac80211 */
	for (i = 0; i < MWL8K_TX_QUEUES; i++)
		mwl8k_txq_reclaim(hw, i, 1);

	for (i = 0; i < MWL8K_TX_QUEUES; i++)
		mwl8k_txq_deinit(hw, i);

	mwl8k_rxq_deinit(hw, 0);

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3101
	pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
3102 3103 3104 3105 3106 3107 3108 3109 3110 3111 3112 3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124 3125 3126 3127 3128 3129

	pci_iounmap(pdev, priv->regs);
	pci_set_drvdata(pdev, NULL);
	ieee80211_free_hw(hw);
	pci_release_regions(pdev);
	pci_disable_device(pdev);
}

static struct pci_driver mwl8k_driver = {
	.name		= MWL8K_NAME,
	.id_table	= mwl8k_table,
	.probe		= mwl8k_probe,
	.remove		= __devexit_p(mwl8k_remove),
	.shutdown	= __devexit_p(mwl8k_shutdown),
};

static int __init mwl8k_init(void)
{
	return pci_register_driver(&mwl8k_driver);
}

static void __exit mwl8k_exit(void)
{
	pci_unregister_driver(&mwl8k_driver);
}

module_init(mwl8k_init);
module_exit(mwl8k_exit);
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3130 3131 3132 3133 3134

MODULE_DESCRIPTION(MWL8K_DESC);
MODULE_VERSION(MWL8K_VERSION);
MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
MODULE_LICENSE("GPL");