hns3_debugfs.c 30.2 KB
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// SPDX-License-Identifier: GPL-2.0+
/* Copyright (c) 2018-2019 Hisilicon Limited. */

#include <linux/debugfs.h>
#include <linux/device.h>

#include "hnae3.h"
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#include "hns3_debugfs.h"
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#include "hns3_enet.h"

static struct dentry *hns3_dbgfs_root;

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static struct hns3_dbg_dentry_info hns3_dbg_dentry[] = {
	{
		.name = "tm"
	},
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	{
		.name = "tx_bd_info"
	},
	{
		.name = "rx_bd_info"
	},
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	{
		.name = "mac_list"
	},
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	{
		.name = "reg"
	},
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	{
		.name = "queue"
	},
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	{
		.name = "fd"
	},
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	/* keep common at the bottom and add new directory above */
	{
		.name = "common"
	},
};

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static int hns3_dbg_bd_file_init(struct hnae3_handle *handle, unsigned int cmd);
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static int hns3_dbg_common_file_init(struct hnae3_handle *handle,
				     unsigned int cmd);

static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = {
	{
		.name = "tm_nodes",
		.cmd = HNAE3_DBG_CMD_TM_NODES,
		.dentry = HNS3_DBG_DENTRY_TM,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
	{
		.name = "tm_priority",
		.cmd = HNAE3_DBG_CMD_TM_PRI,
		.dentry = HNS3_DBG_DENTRY_TM,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
	{
		.name = "tm_qset",
		.cmd = HNAE3_DBG_CMD_TM_QSET,
		.dentry = HNS3_DBG_DENTRY_TM,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
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	{
		.name = "tm_map",
		.cmd = HNAE3_DBG_CMD_TM_MAP,
		.dentry = HNS3_DBG_DENTRY_TM,
		.buf_len = HNS3_DBG_READ_LEN_1MB,
		.init = hns3_dbg_common_file_init,
	},
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	{
		.name = "tm_pg",
		.cmd = HNAE3_DBG_CMD_TM_PG,
		.dentry = HNS3_DBG_DENTRY_TM,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
	{
		.name = "tm_port",
		.cmd = HNAE3_DBG_CMD_TM_PORT,
		.dentry = HNS3_DBG_DENTRY_TM,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
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	{
		.name = "tc_sch_info",
		.cmd = HNAE3_DBG_CMD_TC_SCH_INFO,
		.dentry = HNS3_DBG_DENTRY_TM,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
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	{
		.name = "dev_info",
		.cmd = HNAE3_DBG_CMD_DEV_INFO,
		.dentry = HNS3_DBG_DENTRY_COMMON,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
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	{
		.name = "tx_bd_queue",
		.cmd = HNAE3_DBG_CMD_TX_BD,
		.dentry = HNS3_DBG_DENTRY_TX_BD,
		.buf_len = HNS3_DBG_READ_LEN_4MB,
		.init = hns3_dbg_bd_file_init,
	},
	{
		.name = "rx_bd_queue",
		.cmd = HNAE3_DBG_CMD_RX_BD,
		.dentry = HNS3_DBG_DENTRY_RX_BD,
		.buf_len = HNS3_DBG_READ_LEN_4MB,
		.init = hns3_dbg_bd_file_init,
	},
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	{
		.name = "uc",
		.cmd = HNAE3_DBG_CMD_MAC_UC,
		.dentry = HNS3_DBG_DENTRY_MAC,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
	{
		.name = "mc",
		.cmd = HNAE3_DBG_CMD_MAC_MC,
		.dentry = HNS3_DBG_DENTRY_MAC,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
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	{
		.name = "mng_tbl",
		.cmd = HNAE3_DBG_CMD_MNG_TBL,
		.dentry = HNS3_DBG_DENTRY_COMMON,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
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	{
		.name = "loopback",
		.cmd = HNAE3_DBG_CMD_LOOPBACK,
		.dentry = HNS3_DBG_DENTRY_COMMON,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
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	{
		.name = "interrupt_info",
		.cmd = HNAE3_DBG_CMD_INTERRUPT_INFO,
		.dentry = HNS3_DBG_DENTRY_COMMON,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
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	{
		.name = "reset_info",
		.cmd = HNAE3_DBG_CMD_RESET_INFO,
		.dentry = HNS3_DBG_DENTRY_COMMON,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
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	{
		.name = "imp_info",
		.cmd = HNAE3_DBG_CMD_IMP_INFO,
		.dentry = HNS3_DBG_DENTRY_COMMON,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
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	{
		.name = "ncl_config",
		.cmd = HNAE3_DBG_CMD_NCL_CONFIG,
		.dentry = HNS3_DBG_DENTRY_COMMON,
		.buf_len = HNS3_DBG_READ_LEN_128KB,
		.init = hns3_dbg_common_file_init,
	},
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	{
		.name = "bios_common",
		.cmd = HNAE3_DBG_CMD_REG_BIOS_COMMON,
		.dentry = HNS3_DBG_DENTRY_REG,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
	{
		.name = "ssu",
		.cmd = HNAE3_DBG_CMD_REG_SSU,
		.dentry = HNS3_DBG_DENTRY_REG,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
	{
		.name = "igu_egu",
		.cmd = HNAE3_DBG_CMD_REG_IGU_EGU,
		.dentry = HNS3_DBG_DENTRY_REG,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
	{
		.name = "rpu",
		.cmd = HNAE3_DBG_CMD_REG_RPU,
		.dentry = HNS3_DBG_DENTRY_REG,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
	{
		.name = "ncsi",
		.cmd = HNAE3_DBG_CMD_REG_NCSI,
		.dentry = HNS3_DBG_DENTRY_REG,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
	{
		.name = "rtc",
		.cmd = HNAE3_DBG_CMD_REG_RTC,
		.dentry = HNS3_DBG_DENTRY_REG,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
	{
		.name = "ppp",
		.cmd = HNAE3_DBG_CMD_REG_PPP,
		.dentry = HNS3_DBG_DENTRY_REG,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
	{
		.name = "rcb",
		.cmd = HNAE3_DBG_CMD_REG_RCB,
		.dentry = HNS3_DBG_DENTRY_REG,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
	{
		.name = "tqp",
		.cmd = HNAE3_DBG_CMD_REG_TQP,
		.dentry = HNS3_DBG_DENTRY_REG,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
	{
		.name = "mac",
		.cmd = HNAE3_DBG_CMD_REG_MAC,
		.dentry = HNS3_DBG_DENTRY_REG,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
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	{
		.name = "dcb",
		.cmd = HNAE3_DBG_CMD_REG_DCB,
		.dentry = HNS3_DBG_DENTRY_REG,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
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	{
		.name = "queue_map",
		.cmd = HNAE3_DBG_CMD_QUEUE_MAP,
		.dentry = HNS3_DBG_DENTRY_QUEUE,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
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	{
		.name = "rx_queue_info",
		.cmd = HNAE3_DBG_CMD_RX_QUEUE_INFO,
		.dentry = HNS3_DBG_DENTRY_QUEUE,
		.buf_len = HNS3_DBG_READ_LEN_1MB,
		.init = hns3_dbg_common_file_init,
	},
	{
		.name = "tx_queue_info",
		.cmd = HNAE3_DBG_CMD_TX_QUEUE_INFO,
		.dentry = HNS3_DBG_DENTRY_QUEUE,
		.buf_len = HNS3_DBG_READ_LEN_1MB,
		.init = hns3_dbg_common_file_init,
	},
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	{
		.name = "fd_tcam",
		.cmd = HNAE3_DBG_CMD_FD_TCAM,
		.dentry = HNS3_DBG_DENTRY_FD,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
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};

static struct hns3_dbg_cap_info hns3_dbg_cap[] = {
	{
		.name = "support FD",
		.cap_bit = HNAE3_DEV_SUPPORT_FD_B,
	}, {
		.name = "support GRO",
		.cap_bit = HNAE3_DEV_SUPPORT_GRO_B,
	}, {
		.name = "support FEC",
		.cap_bit = HNAE3_DEV_SUPPORT_FEC_B,
	}, {
		.name = "support UDP GSO",
		.cap_bit = HNAE3_DEV_SUPPORT_UDP_GSO_B,
	}, {
		.name = "support PTP",
		.cap_bit = HNAE3_DEV_SUPPORT_PTP_B,
	}, {
		.name = "support INT QL",
		.cap_bit = HNAE3_DEV_SUPPORT_INT_QL_B,
	}, {
		.name = "support HW TX csum",
		.cap_bit = HNAE3_DEV_SUPPORT_HW_TX_CSUM_B,
	}, {
		.name = "support UDP tunnel csum",
		.cap_bit = HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B,
	}, {
		.name = "support TX push",
		.cap_bit = HNAE3_DEV_SUPPORT_TX_PUSH_B,
	}, {
		.name = "support imp-controlled PHY",
		.cap_bit = HNAE3_DEV_SUPPORT_PHY_IMP_B,
	}, {
		.name = "support rxd advanced layout",
		.cap_bit = HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B,
	},
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};

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static void hns3_dbg_fill_content(char *content, u16 len,
				  const struct hns3_dbg_item *items,
				  const char **result, u16 size)
{
	char *pos = content;
	u16 i;

	memset(content, ' ', len);
	for (i = 0; i < size; i++) {
		if (result)
			strncpy(pos, result[i], strlen(result[i]));
		else
			strncpy(pos, items[i].name, strlen(items[i].name));

		pos += strlen(items[i].name) + items[i].interval;
	}

	*pos++ = '\n';
	*pos++ = '\0';
}

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static const struct hns3_dbg_item rx_queue_info_items[] = {
	{ "QUEUE_ID", 2 },
	{ "BD_NUM", 2 },
	{ "BD_LEN", 2 },
	{ "TAIL", 2 },
	{ "HEAD", 2 },
	{ "FBDNUM", 2 },
	{ "PKTNUM", 2 },
	{ "RING_EN", 2 },
	{ "RX_RING_EN", 2 },
	{ "BASE_ADDR", 10 },
};

static void hns3_dump_rx_queue_info(struct hns3_enet_ring *ring,
				    struct hnae3_ae_dev *ae_dev, char **result,
				    u32 index)
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{
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	u32 base_add_l, base_add_h;
	u32 j = 0;

	sprintf(result[j++], "%8u", index);

	sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base +
		HNS3_RING_RX_RING_BD_NUM_REG));

	sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base +
		HNS3_RING_RX_RING_BD_LEN_REG));

	sprintf(result[j++], "%4u", readl_relaxed(ring->tqp->io_base +
		HNS3_RING_RX_RING_TAIL_REG));

	sprintf(result[j++], "%4u", readl_relaxed(ring->tqp->io_base +
		HNS3_RING_RX_RING_HEAD_REG));

	sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base +
		HNS3_RING_RX_RING_FBDNUM_REG));

	sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base +
		HNS3_RING_RX_RING_PKTNUM_RECORD_REG));

	sprintf(result[j++], "%7s", readl_relaxed(ring->tqp->io_base +
		HNS3_RING_EN_REG) ? "on" : "off");

	if (hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev))
		sprintf(result[j++], "%10s", readl_relaxed(ring->tqp->io_base +
			HNS3_RING_RX_EN_REG) ? "on" : "off");
	else
		sprintf(result[j++], "%10s", "NA");

	base_add_h = readl_relaxed(ring->tqp->io_base +
					HNS3_RING_RX_RING_BASEADDR_H_REG);
	base_add_l = readl_relaxed(ring->tqp->io_base +
					HNS3_RING_RX_RING_BASEADDR_L_REG);
	sprintf(result[j++], "0x%08x%08x", base_add_h, base_add_l);
}

static int hns3_dbg_rx_queue_info(struct hnae3_handle *h,
				  char *buf, int len)
{
	char data_str[ARRAY_SIZE(rx_queue_info_items)][HNS3_DBG_DATA_STR_LEN];
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	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h->pdev);
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	char *result[ARRAY_SIZE(rx_queue_info_items)];
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	struct hns3_nic_priv *priv = h->priv;
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	char content[HNS3_DBG_INFO_LEN];
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	struct hns3_enet_ring *ring;
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	int pos = 0;
	u32 i;
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	if (!priv->ring) {
		dev_err(&h->pdev->dev, "priv->ring is NULL\n");
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		return -EFAULT;
	}

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	for (i = 0; i < ARRAY_SIZE(rx_queue_info_items); i++)
		result[i] = &data_str[i][0];
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	hns3_dbg_fill_content(content, sizeof(content), rx_queue_info_items,
			      NULL, ARRAY_SIZE(rx_queue_info_items));
	pos += scnprintf(buf + pos, len - pos, "%s", content);
	for (i = 0; i < h->kinfo.num_tqps; i++) {
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		/* Each cycle needs to determine whether the instance is reset,
		 * to prevent reference to invalid memory. And need to ensure
		 * that the following code is executed within 100ms.
		 */
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		if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) ||
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		    test_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
			return -EPERM;

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		ring = &priv->ring[(u32)(i + h->kinfo.num_tqps)];
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		hns3_dump_rx_queue_info(ring, ae_dev, result, i);
		hns3_dbg_fill_content(content, sizeof(content),
				      rx_queue_info_items,
				      (const char **)result,
				      ARRAY_SIZE(rx_queue_info_items));
		pos += scnprintf(buf + pos, len - pos, "%s", content);
	}

	return 0;
}

static const struct hns3_dbg_item tx_queue_info_items[] = {
	{ "QUEUE_ID", 2 },
	{ "BD_NUM", 2 },
	{ "TC", 2 },
	{ "TAIL", 2 },
	{ "HEAD", 2 },
	{ "FBDNUM", 2 },
	{ "OFFSET", 2 },
	{ "PKTNUM", 2 },
	{ "RING_EN", 2 },
	{ "TX_RING_EN", 2 },
	{ "BASE_ADDR", 10 },
};

static void hns3_dump_tx_queue_info(struct hns3_enet_ring *ring,
				    struct hnae3_ae_dev *ae_dev, char **result,
				    u32 index)
{
	u32 base_add_l, base_add_h;
	u32 j = 0;
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	sprintf(result[j++], "%8u", index);
	sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base +
		HNS3_RING_TX_RING_BD_NUM_REG));
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	sprintf(result[j++], "%2u", readl_relaxed(ring->tqp->io_base +
		HNS3_RING_TX_RING_TC_REG));
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	sprintf(result[j++], "%4u", readl_relaxed(ring->tqp->io_base +
		HNS3_RING_TX_RING_TAIL_REG));
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	sprintf(result[j++], "%4u", readl_relaxed(ring->tqp->io_base +
		HNS3_RING_TX_RING_HEAD_REG));
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	sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base +
		HNS3_RING_TX_RING_FBDNUM_REG));
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	sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base +
		HNS3_RING_TX_RING_OFFSET_REG));
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	sprintf(result[j++], "%6u", readl_relaxed(ring->tqp->io_base +
		HNS3_RING_TX_RING_PKTNUM_RECORD_REG));
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	sprintf(result[j++], "%7s", readl_relaxed(ring->tqp->io_base +
		HNS3_RING_EN_REG) ? "on" : "off");

	if (hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev))
		sprintf(result[j++], "%10s", readl_relaxed(ring->tqp->io_base +
			HNS3_RING_TX_EN_REG) ? "on" : "off");
	else
		sprintf(result[j++], "%10s", "NA");

	base_add_h = readl_relaxed(ring->tqp->io_base +
					HNS3_RING_TX_RING_BASEADDR_H_REG);
	base_add_l = readl_relaxed(ring->tqp->io_base +
					HNS3_RING_TX_RING_BASEADDR_L_REG);
	sprintf(result[j++], "0x%08x%08x", base_add_h, base_add_l);
}

static int hns3_dbg_tx_queue_info(struct hnae3_handle *h,
				  char *buf, int len)
{
	char data_str[ARRAY_SIZE(tx_queue_info_items)][HNS3_DBG_DATA_STR_LEN];
	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h->pdev);
	char *result[ARRAY_SIZE(tx_queue_info_items)];
	struct hns3_nic_priv *priv = h->priv;
	char content[HNS3_DBG_INFO_LEN];
	struct hns3_enet_ring *ring;
	int pos = 0;
	u32 i;

	if (!priv->ring) {
		dev_err(&h->pdev->dev, "priv->ring is NULL\n");
		return -EFAULT;
	}

	for (i = 0; i < ARRAY_SIZE(tx_queue_info_items); i++)
		result[i] = &data_str[i][0];

	hns3_dbg_fill_content(content, sizeof(content), tx_queue_info_items,
			      NULL, ARRAY_SIZE(tx_queue_info_items));
	pos += scnprintf(buf + pos, len - pos, "%s", content);

	for (i = 0; i < h->kinfo.num_tqps; i++) {
		/* Each cycle needs to determine whether the instance is reset,
		 * to prevent reference to invalid memory. And need to ensure
		 * that the following code is executed within 100ms.
		 */
		if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) ||
		    test_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
			return -EPERM;

		ring = &priv->ring[i];
		hns3_dump_tx_queue_info(ring, ae_dev, result, i);
		hns3_dbg_fill_content(content, sizeof(content),
				      tx_queue_info_items,
				      (const char **)result,
				      ARRAY_SIZE(tx_queue_info_items));
		pos += scnprintf(buf + pos, len - pos, "%s", content);
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	}

	return 0;
}

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static const struct hns3_dbg_item queue_map_items[] = {
	{ "local_queue_id", 2 },
	{ "global_queue_id", 2 },
	{ "vector_id", 2 },
};

static int hns3_dbg_queue_map(struct hnae3_handle *h, char *buf, int len)
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{
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	char data_str[ARRAY_SIZE(queue_map_items)][HNS3_DBG_DATA_STR_LEN];
	char *result[ARRAY_SIZE(queue_map_items)];
551
	struct hns3_nic_priv *priv = h->priv;
552 553 554 555
	char content[HNS3_DBG_INFO_LEN];
	int pos = 0;
	int j;
	u32 i;
556 557 558 559

	if (!h->ae_algo->ops->get_global_queue_id)
		return -EOPNOTSUPP;

560 561
	for (i = 0; i < ARRAY_SIZE(queue_map_items); i++)
		result[i] = &data_str[i][0];
562

563 564 565 566
	hns3_dbg_fill_content(content, sizeof(content), queue_map_items,
			      NULL, ARRAY_SIZE(queue_map_items));
	pos += scnprintf(buf + pos, len - pos, "%s", content);
	for (i = 0; i < h->kinfo.num_tqps; i++) {
567
		if (!priv->ring || !priv->ring[i].tqp_vector)
568
			continue;
569 570 571 572 573 574 575 576 577 578
		j = 0;
		sprintf(result[j++], "%u", i);
		sprintf(result[j++], "%u",
			h->ae_algo->ops->get_global_queue_id(h, i));
		sprintf(result[j++], "%u",
			priv->ring[i].tqp_vector->vector_irq);
		hns3_dbg_fill_content(content, sizeof(content), queue_map_items,
				      (const char **)result,
				      ARRAY_SIZE(queue_map_items));
		pos += scnprintf(buf + pos, len - pos, "%s", content);
579 580 581 582 583
	}

	return 0;
}

584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600
static const struct hns3_dbg_item rx_bd_info_items[] = {
	{ "BD_IDX", 3 },
	{ "L234_INFO", 2 },
	{ "PKT_LEN", 3 },
	{ "SIZE", 4 },
	{ "RSS_HASH", 4 },
	{ "FD_ID", 2 },
	{ "VLAN_TAG", 2 },
	{ "O_DM_VLAN_ID_FB", 2 },
	{ "OT_VLAN_TAG", 2 },
	{ "BD_BASE_INFO", 2 },
	{ "PTYPE", 2 },
	{ "HW_CSUM", 2 },
};

static void hns3_dump_rx_bd_info(struct hns3_nic_priv *priv,
				 struct hns3_desc *desc, char **result, int idx)
601
{
602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632
	unsigned int j = 0;

	sprintf(result[j++], "%5d", idx);
	sprintf(result[j++], "%#x", le32_to_cpu(desc->rx.l234_info));
	sprintf(result[j++], "%7u", le16_to_cpu(desc->rx.pkt_len));
	sprintf(result[j++], "%4u", le16_to_cpu(desc->rx.size));
	sprintf(result[j++], "%#x", le32_to_cpu(desc->rx.rss_hash));
	sprintf(result[j++], "%5u", le16_to_cpu(desc->rx.fd_id));
	sprintf(result[j++], "%8u", le16_to_cpu(desc->rx.vlan_tag));
	sprintf(result[j++], "%15u", le16_to_cpu(desc->rx.o_dm_vlan_id_fb));
	sprintf(result[j++], "%11u", le16_to_cpu(desc->rx.ot_vlan_tag));
	sprintf(result[j++], "%#x", le32_to_cpu(desc->rx.bd_base_info));
	if (test_bit(HNS3_NIC_STATE_RXD_ADV_LAYOUT_ENABLE, &priv->state)) {
		u32 ol_info = le32_to_cpu(desc->rx.ol_info);

		sprintf(result[j++], "%5lu", hnae3_get_field(ol_info,
							     HNS3_RXD_PTYPE_M,
							     HNS3_RXD_PTYPE_S));
		sprintf(result[j++], "%7u", le16_to_cpu(desc->csum));
	} else {
		sprintf(result[j++], "NA");
		sprintf(result[j++], "NA");
	}
}

static int hns3_dbg_rx_bd_info(struct hns3_dbg_data *d, char *buf, int len)
{
	char data_str[ARRAY_SIZE(rx_bd_info_items)][HNS3_DBG_DATA_STR_LEN];
	struct hns3_nic_priv *priv = d->handle->priv;
	char *result[ARRAY_SIZE(rx_bd_info_items)];
	char content[HNS3_DBG_INFO_LEN];
633
	struct hns3_enet_ring *ring;
634 635 636
	struct hns3_desc *desc;
	unsigned int i;
	int pos = 0;
637

638 639 640
	if (d->qid >= d->handle->kinfo.num_tqps) {
		dev_err(&d->handle->pdev->dev,
			"queue%u is not in use\n", d->qid);
641 642 643
		return -EINVAL;
	}

644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661
	for (i = 0; i < ARRAY_SIZE(rx_bd_info_items); i++)
		result[i] = &data_str[i][0];

	pos += scnprintf(buf + pos, len - pos,
			  "Queue %u rx bd info:\n", d->qid);
	hns3_dbg_fill_content(content, sizeof(content), rx_bd_info_items,
			      NULL, ARRAY_SIZE(rx_bd_info_items));
	pos += scnprintf(buf + pos, len - pos, "%s", content);

	ring = &priv->ring[d->qid + d->handle->kinfo.num_tqps];
	for (i = 0; i < ring->desc_num; i++) {
		desc = &ring->desc[i];

		hns3_dump_rx_bd_info(priv, desc, result, i);
		hns3_dbg_fill_content(content, sizeof(content),
				      rx_bd_info_items, (const char **)result,
				      ARRAY_SIZE(rx_bd_info_items));
		pos += scnprintf(buf + pos, len - pos, "%s", content);
662 663
	}

664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679
	return 0;
}

static const struct hns3_dbg_item tx_bd_info_items[] = {
	{ "BD_IDX", 5 },
	{ "ADDRESS", 2 },
	{ "VLAN_TAG", 2 },
	{ "SIZE", 2 },
	{ "T_CS_VLAN_TSO", 2 },
	{ "OT_VLAN_TAG", 3 },
	{ "TV", 2 },
	{ "OLT_VLAN_LEN", 2},
	{ "PAYLEN_OL4CS", 2},
	{ "BD_FE_SC_VLD", 2},
	{ "MSS_HW_CSUM", 0},
};
680

681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714
static void hns3_dump_tx_bd_info(struct hns3_nic_priv *priv,
				 struct hns3_desc *desc, char **result, int idx)
{
	unsigned int j = 0;

	sprintf(result[j++], "%6d", idx);
	sprintf(result[j++], "%#llx", le64_to_cpu(desc->addr));
	sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.vlan_tag));
	sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.send_size));
	sprintf(result[j++], "%#x",
		le32_to_cpu(desc->tx.type_cs_vlan_tso_len));
	sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.outer_vlan_tag));
	sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.tv));
	sprintf(result[j++], "%10u",
		le32_to_cpu(desc->tx.ol_type_vlan_len_msec));
	sprintf(result[j++], "%#x", le32_to_cpu(desc->tx.paylen_ol4cs));
	sprintf(result[j++], "%#x", le16_to_cpu(desc->tx.bdtp_fe_sc_vld_ra_ri));
	sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.mss_hw_csum));
}

static int hns3_dbg_tx_bd_info(struct hns3_dbg_data *d, char *buf, int len)
{
	char data_str[ARRAY_SIZE(tx_bd_info_items)][HNS3_DBG_DATA_STR_LEN];
	struct hns3_nic_priv *priv = d->handle->priv;
	char *result[ARRAY_SIZE(tx_bd_info_items)];
	char content[HNS3_DBG_INFO_LEN];
	struct hns3_enet_ring *ring;
	struct hns3_desc *desc;
	unsigned int i;
	int pos = 0;

	if (d->qid >= d->handle->kinfo.num_tqps) {
		dev_err(&d->handle->pdev->dev,
			"queue%u is not in use\n", d->qid);
715 716 717
		return -EINVAL;
	}

718 719 720 721 722 723 724 725
	for (i = 0; i < ARRAY_SIZE(tx_bd_info_items); i++)
		result[i] = &data_str[i][0];

	pos += scnprintf(buf + pos, len - pos,
			  "Queue %u tx bd info:\n", d->qid);
	hns3_dbg_fill_content(content, sizeof(content), tx_bd_info_items,
			      NULL, ARRAY_SIZE(tx_bd_info_items));
	pos += scnprintf(buf + pos, len - pos, "%s", content);
726

727 728 729 730 731 732 733 734 735 736
	ring = &priv->ring[d->qid];
	for (i = 0; i < ring->desc_num; i++) {
		desc = &ring->desc[i];

		hns3_dump_tx_bd_info(priv, desc, result, i);
		hns3_dbg_fill_content(content, sizeof(content),
				      tx_bd_info_items, (const char **)result,
				      ARRAY_SIZE(tx_bd_info_items));
		pos += scnprintf(buf + pos, len - pos, "%s", content);
	}
737 738 739 740

	return 0;
}

741 742 743
static void hns3_dbg_help(struct hnae3_handle *h)
{
	dev_info(&h->pdev->dev, "available commands\n");
744 745 746 747

	if (!hns3_is_phys_func(h->pdev))
		return;

748
	dev_info(&h->pdev->dev, "dump qos pause cfg\n");
749
	dev_info(&h->pdev->dev, "dump qos pri map\n");
750
	dev_info(&h->pdev->dev, "dump qos buf cfg\n");
751
	dev_info(&h->pdev->dev, "dump mac tnl status\n");
752
	dev_info(&h->pdev->dev, "dump qs shaper [qs id]\n");
753 754
}

755 756
static void
hns3_dbg_dev_caps(struct hnae3_handle *h, char *buf, int len, int *pos)
757 758
{
	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h->pdev);
759 760 761 762 763 764 765 766 767 768 769 770 771
	static const char * const str[] = {"no", "yes"};
	unsigned long *caps = ae_dev->caps;
	u32 i, state;

	*pos += scnprintf(buf + *pos, len - *pos, "dev capability:\n");

	for (i = 0; i < ARRAY_SIZE(hns3_dbg_cap); i++) {
		state = test_bit(hns3_dbg_cap[i].cap_bit, caps);
		*pos += scnprintf(buf + *pos, len - *pos, "%s: %s\n",
				  hns3_dbg_cap[i].name, str[state]);
	}

	*pos += scnprintf(buf + *pos, len - *pos, "\n");
772 773
}

774 775
static void
hns3_dbg_dev_specs(struct hnae3_handle *h, char *buf, int len, int *pos)
776 777 778 779
{
	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h->pdev);
	struct hnae3_dev_specs *dev_specs = &ae_dev->dev_specs;
	struct hnae3_knic_private_info *kinfo = &h->kinfo;
780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826

	*pos += scnprintf(buf + *pos, len - *pos, "dev_spec:\n");
	*pos += scnprintf(buf + *pos, len - *pos, "MAC entry num: %u\n",
			  dev_specs->mac_entry_num);
	*pos += scnprintf(buf + *pos, len - *pos, "MNG entry num: %u\n",
			  dev_specs->mng_entry_num);
	*pos += scnprintf(buf + *pos, len - *pos, "MAX non tso bd num: %u\n",
			  dev_specs->max_non_tso_bd_num);
	*pos += scnprintf(buf + *pos, len - *pos, "RSS ind tbl size: %u\n",
			  dev_specs->rss_ind_tbl_size);
	*pos += scnprintf(buf + *pos, len - *pos, "RSS key size: %u\n",
			  dev_specs->rss_key_size);
	*pos += scnprintf(buf + *pos, len - *pos, "RSS size: %u\n",
			  kinfo->rss_size);
	*pos += scnprintf(buf + *pos, len - *pos, "Allocated RSS size: %u\n",
			  kinfo->req_rss_size);
	*pos += scnprintf(buf + *pos, len - *pos,
			  "Task queue pairs numbers: %u\n",
			  kinfo->num_tqps);
	*pos += scnprintf(buf + *pos, len - *pos, "RX buffer length: %u\n",
			  kinfo->rx_buf_len);
	*pos += scnprintf(buf + *pos, len - *pos, "Desc num per TX queue: %u\n",
			  kinfo->num_tx_desc);
	*pos += scnprintf(buf + *pos, len - *pos, "Desc num per RX queue: %u\n",
			  kinfo->num_rx_desc);
	*pos += scnprintf(buf + *pos, len - *pos,
			  "Total number of enabled TCs: %u\n",
			  kinfo->tc_info.num_tc);
	*pos += scnprintf(buf + *pos, len - *pos, "MAX INT QL: %u\n",
			  dev_specs->int_ql_max);
	*pos += scnprintf(buf + *pos, len - *pos, "MAX INT GL: %u\n",
			  dev_specs->max_int_gl);
	*pos += scnprintf(buf + *pos, len - *pos, "MAX TM RATE: %u\n",
			  dev_specs->max_tm_rate);
	*pos += scnprintf(buf + *pos, len - *pos, "MAX QSET number: %u\n",
			  dev_specs->max_qset_num);
}

static int hns3_dbg_dev_info(struct hnae3_handle *h, char *buf, int len)
{
	int pos = 0;

	hns3_dbg_dev_caps(h, buf, len, &pos);

	hns3_dbg_dev_specs(h, buf, len, &pos);

	return 0;
827 828
}

829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845
static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
				 size_t count, loff_t *ppos)
{
	int uncopy_bytes;
	char *buf;
	int len;

	if (*ppos != 0)
		return 0;

	if (count < HNS3_DBG_READ_LEN)
		return -ENOSPC;

	buf = kzalloc(HNS3_DBG_READ_LEN, GFP_KERNEL);
	if (!buf)
		return -ENOMEM;

846 847
	len = scnprintf(buf, HNS3_DBG_READ_LEN, "%s\n",
			"Please echo help to cmd to get help information");
848 849 850 851 852 853 854 855 856 857
	uncopy_bytes = copy_to_user(buffer, buf, len);

	kfree(buf);

	if (uncopy_bytes)
		return -EFAULT;

	return (*ppos = len);
}

858 859 860 861 862 863 864 865 866 867 868 869 870 871
static int hns3_dbg_check_cmd(struct hnae3_handle *handle, char *cmd_buf)
{
	int ret = 0;

	if (strncmp(cmd_buf, "help", 4) == 0)
		hns3_dbg_help(handle);
	else if (handle->ae_algo->ops->dbg_run_cmd)
		ret = handle->ae_algo->ops->dbg_run_cmd(handle, cmd_buf);
	else
		ret = -EOPNOTSUPP;

	return ret;
}

872 873 874 875
static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer,
				  size_t count, loff_t *ppos)
{
	struct hnae3_handle *handle = filp->private_data;
876
	struct hns3_nic_priv *priv  = handle->priv;
877 878
	char *cmd_buf, *cmd_buf_tmp;
	int uncopied_bytes;
879
	int ret;
880 881 882 883

	if (*ppos != 0)
		return 0;

884
	/* Judge if the instance is being reset. */
885
	if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) ||
886 887 888
	    test_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
		return 0;

889 890 891
	if (count > HNS3_DBG_WRITE_LEN)
		return -ENOSPC;

892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909
	cmd_buf = kzalloc(count + 1, GFP_KERNEL);
	if (!cmd_buf)
		return count;

	uncopied_bytes = copy_from_user(cmd_buf, buffer, count);
	if (uncopied_bytes) {
		kfree(cmd_buf);
		return -EFAULT;
	}

	cmd_buf[count] = '\0';

	cmd_buf_tmp = strchr(cmd_buf, '\n');
	if (cmd_buf_tmp) {
		*cmd_buf_tmp = '\0';
		count = cmd_buf_tmp - cmd_buf + 1;
	}

910
	ret = hns3_dbg_check_cmd(handle, cmd_buf);
911 912 913 914 915 916 917 918 919
	if (ret)
		hns3_dbg_help(handle);

	kfree(cmd_buf);
	cmd_buf = NULL;

	return count;
}

920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936
static int hns3_dbg_get_cmd_index(struct hnae3_handle *handle,
				  const unsigned char *name, u32 *index)
{
	u32 i;

	for (i = 0; i < ARRAY_SIZE(hns3_dbg_cmd); i++) {
		if (!strncmp(name, hns3_dbg_cmd[i].name,
			     strlen(hns3_dbg_cmd[i].name))) {
			*index = i;
			return 0;
		}
	}

	dev_err(&handle->pdev->dev, "unknown command(%s)\n", name);
	return -EINVAL;
}

937
static const struct hns3_dbg_func hns3_dbg_cmd_func[] = {
938 939 940 941
	{
		.cmd = HNAE3_DBG_CMD_QUEUE_MAP,
		.dbg_dump = hns3_dbg_queue_map,
	},
942 943 944 945
	{
		.cmd = HNAE3_DBG_CMD_DEV_INFO,
		.dbg_dump = hns3_dbg_dev_info,
	},
946 947 948 949 950 951 952 953
	{
		.cmd = HNAE3_DBG_CMD_TX_BD,
		.dbg_dump_bd = hns3_dbg_tx_bd_info,
	},
	{
		.cmd = HNAE3_DBG_CMD_RX_BD,
		.dbg_dump_bd = hns3_dbg_rx_bd_info,
	},
954 955 956 957 958 959 960 961
	{
		.cmd = HNAE3_DBG_CMD_RX_QUEUE_INFO,
		.dbg_dump = hns3_dbg_rx_queue_info,
	},
	{
		.cmd = HNAE3_DBG_CMD_TX_QUEUE_INFO,
		.dbg_dump = hns3_dbg_tx_queue_info,
	},
962 963
};

964
static int hns3_dbg_read_cmd(struct hns3_dbg_data *dbg_data,
965 966
			     enum hnae3_dbg_cmd cmd, char *buf, int len)
{
967 968
	const struct hnae3_ae_ops *ops = dbg_data->handle->ae_algo->ops;
	const struct hns3_dbg_func *cmd_func;
969 970 971
	u32 i;

	for (i = 0; i < ARRAY_SIZE(hns3_dbg_cmd_func); i++) {
972 973 974 975 976 977 978 979 980
		if (cmd == hns3_dbg_cmd_func[i].cmd) {
			cmd_func = &hns3_dbg_cmd_func[i];
			if (cmd_func->dbg_dump)
				return cmd_func->dbg_dump(dbg_data->handle, buf,
							  len);
			else
				return cmd_func->dbg_dump_bd(dbg_data, buf,
							     len);
		}
981
	}
982 983 984 985

	if (!ops->dbg_read_cmd)
		return -EOPNOTSUPP;

986
	return ops->dbg_read_cmd(dbg_data->handle, cmd, buf, len);
987 988
}

989 990 991
static ssize_t hns3_dbg_read(struct file *filp, char __user *buffer,
			     size_t count, loff_t *ppos)
{
992 993
	struct hns3_dbg_data *dbg_data = filp->private_data;
	struct hnae3_handle *handle = dbg_data->handle;
994 995
	struct hns3_nic_priv *priv = handle->priv;
	ssize_t size = 0;
996 997 998 999
	char **save_buf;
	char *read_buf;
	u32 index;
	int ret;
1000

1001 1002 1003 1004
	ret = hns3_dbg_get_cmd_index(handle, filp->f_path.dentry->d_iname,
				     &index);
	if (ret)
		return ret;
1005

1006
	save_buf = &hns3_dbg_cmd[index].buf;
1007

1008 1009 1010
	if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) ||
	    test_bit(HNS3_NIC_STATE_RESETTING, &priv->state)) {
		ret = -EBUSY;
1011 1012 1013
		goto out;
	}

1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026
	if (*save_buf) {
		read_buf = *save_buf;
	} else {
		read_buf = kvzalloc(hns3_dbg_cmd[index].buf_len, GFP_KERNEL);
		if (!read_buf)
			return -ENOMEM;

		/* save the buffer addr until the last read operation */
		*save_buf = read_buf;
	}

	/* get data ready for the first time to read */
	if (!*ppos) {
1027
		ret = hns3_dbg_read_cmd(dbg_data, hns3_dbg_cmd[index].cmd,
1028 1029 1030 1031 1032
					read_buf, hns3_dbg_cmd[index].buf_len);
		if (ret)
			goto out;
	}

1033 1034
	size = simple_read_from_buffer(buffer, count, ppos, read_buf,
				       strlen(read_buf));
1035 1036
	if (size > 0)
		return size;
1037 1038

out:
1039 1040 1041 1042 1043 1044 1045
	/* free the buffer for the last read operation */
	if (*save_buf) {
		kvfree(*save_buf);
		*save_buf = NULL;
	}

	return ret;
1046 1047
}

1048 1049 1050 1051 1052 1053 1054
static const struct file_operations hns3_dbg_cmd_fops = {
	.owner = THIS_MODULE,
	.open  = simple_open,
	.read  = hns3_dbg_cmd_read,
	.write = hns3_dbg_cmd_write,
};

1055 1056 1057 1058 1059 1060
static const struct file_operations hns3_dbg_fops = {
	.owner = THIS_MODULE,
	.open  = simple_open,
	.read  = hns3_dbg_read,
};

1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087
static int hns3_dbg_bd_file_init(struct hnae3_handle *handle, u32 cmd)
{
	struct dentry *entry_dir;
	struct hns3_dbg_data *data;
	u16 max_queue_num;
	unsigned int i;

	entry_dir = hns3_dbg_dentry[hns3_dbg_cmd[cmd].dentry].dentry;
	max_queue_num = hns3_get_max_available_channels(handle);
	data = devm_kzalloc(&handle->pdev->dev, max_queue_num * sizeof(*data),
			    GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	for (i = 0; i < max_queue_num; i++) {
		char name[HNS3_DBG_FILE_NAME_LEN];

		data[i].handle = handle;
		data[i].qid = i;
		sprintf(name, "%s%u", hns3_dbg_cmd[cmd].name, i);
		debugfs_create_file(name, 0400, entry_dir, &data[i],
				    &hns3_dbg_fops);
	}

	return 0;
}

1088 1089 1090
static int
hns3_dbg_common_file_init(struct hnae3_handle *handle, u32 cmd)
{
1091
	struct hns3_dbg_data *data;
1092 1093
	struct dentry *entry_dir;

1094 1095 1096 1097 1098
	data = devm_kzalloc(&handle->pdev->dev, sizeof(*data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	data->handle = handle;
1099 1100
	entry_dir = hns3_dbg_dentry[hns3_dbg_cmd[cmd].dentry].dentry;
	debugfs_create_file(hns3_dbg_cmd[cmd].name, 0400, entry_dir,
1101
			    data, &hns3_dbg_fops);
1102 1103 1104 1105 1106

	return 0;
}

int hns3_dbg_init(struct hnae3_handle *handle)
1107
{
1108
	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
1109
	const char *name = pci_name(handle->pdev);
1110 1111
	int ret;
	u32 i;
1112

1113 1114 1115
	hns3_dbg_dentry[HNS3_DBG_DENTRY_COMMON].dentry =
				debugfs_create_dir(name, hns3_dbgfs_root);
	handle->hnae3_dbgfs = hns3_dbg_dentry[HNS3_DBG_DENTRY_COMMON].dentry;
1116

1117 1118
	debugfs_create_file("cmd", 0600, handle->hnae3_dbgfs, handle,
			    &hns3_dbg_cmd_fops);
1119

1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151
	for (i = 0; i < HNS3_DBG_DENTRY_COMMON; i++)
		hns3_dbg_dentry[i].dentry =
			debugfs_create_dir(hns3_dbg_dentry[i].name,
					   handle->hnae3_dbgfs);

	for (i = 0; i < ARRAY_SIZE(hns3_dbg_cmd); i++) {
		if (hns3_dbg_cmd[i].cmd == HNAE3_DBG_CMD_TM_NODES &&
		    ae_dev->dev_version <= HNAE3_DEVICE_VERSION_V2)
			continue;

		if (!hns3_dbg_cmd[i].init) {
			dev_err(&handle->pdev->dev,
				"cmd %s lack of init func\n",
				hns3_dbg_cmd[i].name);
			ret = -EINVAL;
			goto out;
		}

		ret = hns3_dbg_cmd[i].init(handle, i);
		if (ret) {
			dev_err(&handle->pdev->dev, "failed to init cmd %s\n",
				hns3_dbg_cmd[i].name);
			goto out;
		}
	}

	return 0;

out:
	debugfs_remove_recursive(handle->hnae3_dbgfs);
	handle->hnae3_dbgfs = NULL;
	return ret;
1152 1153 1154 1155
}

void hns3_dbg_uninit(struct hnae3_handle *handle)
{
1156 1157 1158 1159 1160 1161 1162 1163
	u32 i;

	for (i = 0; i < ARRAY_SIZE(hns3_dbg_cmd); i++)
		if (hns3_dbg_cmd[i].buf) {
			kvfree(hns3_dbg_cmd[i].buf);
			hns3_dbg_cmd[i].buf = NULL;
		}

1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177
	debugfs_remove_recursive(handle->hnae3_dbgfs);
	handle->hnae3_dbgfs = NULL;
}

void hns3_dbg_register_debugfs(const char *debugfs_dir_name)
{
	hns3_dbgfs_root = debugfs_create_dir(debugfs_dir_name, NULL);
}

void hns3_dbg_unregister_debugfs(void)
{
	debugfs_remove_recursive(hns3_dbgfs_root);
	hns3_dbgfs_root = NULL;
}