hns3_debugfs.c 25.3 KB
Newer Older
1 2 3 4 5 6 7
// SPDX-License-Identifier: GPL-2.0+
/* Copyright (c) 2018-2019 Hisilicon Limited. */

#include <linux/debugfs.h>
#include <linux/device.h>

#include "hnae3.h"
8
#include "hns3_debugfs.h"
9 10 11 12
#include "hns3_enet.h"

static struct dentry *hns3_dbgfs_root;

13 14 15 16
static struct hns3_dbg_dentry_info hns3_dbg_dentry[] = {
	{
		.name = "tm"
	},
17 18 19 20 21 22
	{
		.name = "tx_bd_info"
	},
	{
		.name = "rx_bd_info"
	},
23 24 25
	{
		.name = "mac_list"
	},
26 27 28 29 30 31
	/* keep common at the bottom and add new directory above */
	{
		.name = "common"
	},
};

32
static int hns3_dbg_bd_file_init(struct hnae3_handle *handle, unsigned int cmd);
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57
static int hns3_dbg_common_file_init(struct hnae3_handle *handle,
				     unsigned int cmd);

static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = {
	{
		.name = "tm_nodes",
		.cmd = HNAE3_DBG_CMD_TM_NODES,
		.dentry = HNS3_DBG_DENTRY_TM,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
	{
		.name = "tm_priority",
		.cmd = HNAE3_DBG_CMD_TM_PRI,
		.dentry = HNS3_DBG_DENTRY_TM,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
	{
		.name = "tm_qset",
		.cmd = HNAE3_DBG_CMD_TM_QSET,
		.dentry = HNS3_DBG_DENTRY_TM,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
58 59 60 61 62 63 64
	{
		.name = "dev_info",
		.cmd = HNAE3_DBG_CMD_DEV_INFO,
		.dentry = HNS3_DBG_DENTRY_COMMON,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
65 66 67 68 69 70 71 72 73 74 75 76 77 78
	{
		.name = "tx_bd_queue",
		.cmd = HNAE3_DBG_CMD_TX_BD,
		.dentry = HNS3_DBG_DENTRY_TX_BD,
		.buf_len = HNS3_DBG_READ_LEN_4MB,
		.init = hns3_dbg_bd_file_init,
	},
	{
		.name = "rx_bd_queue",
		.cmd = HNAE3_DBG_CMD_RX_BD,
		.dentry = HNS3_DBG_DENTRY_RX_BD,
		.buf_len = HNS3_DBG_READ_LEN_4MB,
		.init = hns3_dbg_bd_file_init,
	},
79 80 81 82 83 84 85 86 87 88 89 90 91 92
	{
		.name = "uc",
		.cmd = HNAE3_DBG_CMD_MAC_UC,
		.dentry = HNS3_DBG_DENTRY_MAC,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
	{
		.name = "mc",
		.cmd = HNAE3_DBG_CMD_MAC_MC,
		.dentry = HNS3_DBG_DENTRY_MAC,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
93 94 95 96 97 98 99
	{
		.name = "mng_tbl",
		.cmd = HNAE3_DBG_CMD_MNG_TBL,
		.dentry = HNS3_DBG_DENTRY_COMMON,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
100 101 102 103 104 105 106
	{
		.name = "loopback",
		.cmd = HNAE3_DBG_CMD_LOOPBACK,
		.dentry = HNS3_DBG_DENTRY_COMMON,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
107 108 109 110 111 112 113
	{
		.name = "interrupt_info",
		.cmd = HNAE3_DBG_CMD_INTERRUPT_INFO,
		.dentry = HNS3_DBG_DENTRY_COMMON,
		.buf_len = HNS3_DBG_READ_LEN,
		.init = hns3_dbg_common_file_init,
	},
114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150
};

static struct hns3_dbg_cap_info hns3_dbg_cap[] = {
	{
		.name = "support FD",
		.cap_bit = HNAE3_DEV_SUPPORT_FD_B,
	}, {
		.name = "support GRO",
		.cap_bit = HNAE3_DEV_SUPPORT_GRO_B,
	}, {
		.name = "support FEC",
		.cap_bit = HNAE3_DEV_SUPPORT_FEC_B,
	}, {
		.name = "support UDP GSO",
		.cap_bit = HNAE3_DEV_SUPPORT_UDP_GSO_B,
	}, {
		.name = "support PTP",
		.cap_bit = HNAE3_DEV_SUPPORT_PTP_B,
	}, {
		.name = "support INT QL",
		.cap_bit = HNAE3_DEV_SUPPORT_INT_QL_B,
	}, {
		.name = "support HW TX csum",
		.cap_bit = HNAE3_DEV_SUPPORT_HW_TX_CSUM_B,
	}, {
		.name = "support UDP tunnel csum",
		.cap_bit = HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B,
	}, {
		.name = "support TX push",
		.cap_bit = HNAE3_DEV_SUPPORT_TX_PUSH_B,
	}, {
		.name = "support imp-controlled PHY",
		.cap_bit = HNAE3_DEV_SUPPORT_PHY_IMP_B,
	}, {
		.name = "support rxd advanced layout",
		.cap_bit = HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B,
	},
151 152
};

153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173
static void hns3_dbg_fill_content(char *content, u16 len,
				  const struct hns3_dbg_item *items,
				  const char **result, u16 size)
{
	char *pos = content;
	u16 i;

	memset(content, ' ', len);
	for (i = 0; i < size; i++) {
		if (result)
			strncpy(pos, result[i], strlen(result[i]));
		else
			strncpy(pos, items[i].name, strlen(items[i].name));

		pos += strlen(items[i].name) + items[i].interval;
	}

	*pos++ = '\n';
	*pos++ = '\0';
}

174 175
static int hns3_dbg_queue_info(struct hnae3_handle *h,
			       const char *cmd_buf)
176
{
177
	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h->pdev);
178 179 180 181
	struct hns3_nic_priv *priv = h->priv;
	struct hns3_enet_ring *ring;
	u32 base_add_l, base_add_h;
	u32 queue_num, queue_max;
182
	u32 value, i;
183 184
	int cnt;

185 186
	if (!priv->ring) {
		dev_err(&h->pdev->dev, "priv->ring is NULL\n");
187 188 189 190 191 192 193 194 195 196 197 198 199 200
		return -EFAULT;
	}

	queue_max = h->kinfo.num_tqps;
	cnt = kstrtouint(&cmd_buf[11], 0, &queue_num);
	if (cnt)
		queue_num = 0;
	else
		queue_max = queue_num + 1;

	dev_info(&h->pdev->dev, "queue info\n");

	if (queue_num >= h->kinfo.num_tqps) {
		dev_err(&h->pdev->dev,
201
			"Queue number(%u) is out of range(0-%u)\n", queue_num,
202 203 204 205 206 207 208 209 210
			h->kinfo.num_tqps - 1);
		return -EINVAL;
	}

	for (i = queue_num; i < queue_max; i++) {
		/* Each cycle needs to determine whether the instance is reset,
		 * to prevent reference to invalid memory. And need to ensure
		 * that the following code is executed within 100ms.
		 */
211
		if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) ||
212 213 214
		    test_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
			return -EPERM;

215
		ring = &priv->ring[(u32)(i + h->kinfo.num_tqps)];
216 217 218 219
		base_add_h = readl_relaxed(ring->tqp->io_base +
					   HNS3_RING_RX_RING_BASEADDR_H_REG);
		base_add_l = readl_relaxed(ring->tqp->io_base +
					   HNS3_RING_RX_RING_BASEADDR_L_REG);
220
		dev_info(&h->pdev->dev, "RX(%u) BASE ADD: 0x%08x%08x\n", i,
221 222 223 224
			 base_add_h, base_add_l);

		value = readl_relaxed(ring->tqp->io_base +
				      HNS3_RING_RX_RING_BD_NUM_REG);
225
		dev_info(&h->pdev->dev, "RX(%u) RING BD NUM: %u\n", i, value);
226 227 228

		value = readl_relaxed(ring->tqp->io_base +
				      HNS3_RING_RX_RING_BD_LEN_REG);
229
		dev_info(&h->pdev->dev, "RX(%u) RING BD LEN: %u\n", i, value);
230 231 232

		value = readl_relaxed(ring->tqp->io_base +
				      HNS3_RING_RX_RING_TAIL_REG);
233
		dev_info(&h->pdev->dev, "RX(%u) RING TAIL: %u\n", i, value);
234 235 236

		value = readl_relaxed(ring->tqp->io_base +
				      HNS3_RING_RX_RING_HEAD_REG);
237
		dev_info(&h->pdev->dev, "RX(%u) RING HEAD: %u\n", i, value);
238 239 240

		value = readl_relaxed(ring->tqp->io_base +
				      HNS3_RING_RX_RING_FBDNUM_REG);
241
		dev_info(&h->pdev->dev, "RX(%u) RING FBDNUM: %u\n", i, value);
242 243 244

		value = readl_relaxed(ring->tqp->io_base +
				      HNS3_RING_RX_RING_PKTNUM_RECORD_REG);
245
		dev_info(&h->pdev->dev, "RX(%u) RING PKTNUM: %u\n", i, value);
246

247
		ring = &priv->ring[i];
248 249 250 251
		base_add_h = readl_relaxed(ring->tqp->io_base +
					   HNS3_RING_TX_RING_BASEADDR_H_REG);
		base_add_l = readl_relaxed(ring->tqp->io_base +
					   HNS3_RING_TX_RING_BASEADDR_L_REG);
252
		dev_info(&h->pdev->dev, "TX(%u) BASE ADD: 0x%08x%08x\n", i,
253 254 255 256
			 base_add_h, base_add_l);

		value = readl_relaxed(ring->tqp->io_base +
				      HNS3_RING_TX_RING_BD_NUM_REG);
257
		dev_info(&h->pdev->dev, "TX(%u) RING BD NUM: %u\n", i, value);
258 259 260

		value = readl_relaxed(ring->tqp->io_base +
				      HNS3_RING_TX_RING_TC_REG);
261
		dev_info(&h->pdev->dev, "TX(%u) RING TC: %u\n", i, value);
262 263 264

		value = readl_relaxed(ring->tqp->io_base +
				      HNS3_RING_TX_RING_TAIL_REG);
265
		dev_info(&h->pdev->dev, "TX(%u) RING TAIL: %u\n", i, value);
266 267 268

		value = readl_relaxed(ring->tqp->io_base +
				      HNS3_RING_TX_RING_HEAD_REG);
269
		dev_info(&h->pdev->dev, "TX(%u) RING HEAD: %u\n", i, value);
270 271 272

		value = readl_relaxed(ring->tqp->io_base +
				      HNS3_RING_TX_RING_FBDNUM_REG);
273
		dev_info(&h->pdev->dev, "TX(%u) RING FBDNUM: %u\n", i, value);
274 275 276

		value = readl_relaxed(ring->tqp->io_base +
				      HNS3_RING_TX_RING_OFFSET_REG);
277
		dev_info(&h->pdev->dev, "TX(%u) RING OFFSET: %u\n", i, value);
278 279 280

		value = readl_relaxed(ring->tqp->io_base +
				      HNS3_RING_TX_RING_PKTNUM_RECORD_REG);
281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299
		dev_info(&h->pdev->dev, "TX(%u) RING PKTNUM: %u\n", i, value);

		value = readl_relaxed(ring->tqp->io_base + HNS3_RING_EN_REG);
		dev_info(&h->pdev->dev, "TX/RX(%u) RING EN: %s\n", i,
			 value ? "enable" : "disable");

		if (hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev)) {
			value = readl_relaxed(ring->tqp->io_base +
					      HNS3_RING_TX_EN_REG);
			dev_info(&h->pdev->dev, "TX(%u) RING EN: %s\n", i,
				 value ? "enable" : "disable");

			value = readl_relaxed(ring->tqp->io_base +
					      HNS3_RING_RX_EN_REG);
			dev_info(&h->pdev->dev, "RX(%u) RING EN: %s\n", i,
				 value ? "enable" : "disable");
		}

		dev_info(&h->pdev->dev, "\n");
300 301 302 303 304
	}

	return 0;
}

305 306 307 308 309 310 311 312 313 314 315 316 317 318 319
static int hns3_dbg_queue_map(struct hnae3_handle *h)
{
	struct hns3_nic_priv *priv = h->priv;
	int i;

	if (!h->ae_algo->ops->get_global_queue_id)
		return -EOPNOTSUPP;

	dev_info(&h->pdev->dev, "map info for queue id and vector id\n");
	dev_info(&h->pdev->dev,
		 "local queue id | global queue id | vector id\n");
	for (i = 0; i < h->kinfo.num_tqps; i++) {
		u16 global_qid;

		global_qid = h->ae_algo->ops->get_global_queue_id(h, i);
320
		if (!priv->ring || !priv->ring[i].tqp_vector)
321 322 323
			continue;

		dev_info(&h->pdev->dev,
324
			 "      %4d            %4u            %4d\n",
325
			 i, global_qid, priv->ring[i].tqp_vector->vector_irq);
326 327 328 329 330
	}

	return 0;
}

331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347
static const struct hns3_dbg_item rx_bd_info_items[] = {
	{ "BD_IDX", 3 },
	{ "L234_INFO", 2 },
	{ "PKT_LEN", 3 },
	{ "SIZE", 4 },
	{ "RSS_HASH", 4 },
	{ "FD_ID", 2 },
	{ "VLAN_TAG", 2 },
	{ "O_DM_VLAN_ID_FB", 2 },
	{ "OT_VLAN_TAG", 2 },
	{ "BD_BASE_INFO", 2 },
	{ "PTYPE", 2 },
	{ "HW_CSUM", 2 },
};

static void hns3_dump_rx_bd_info(struct hns3_nic_priv *priv,
				 struct hns3_desc *desc, char **result, int idx)
348
{
349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379
	unsigned int j = 0;

	sprintf(result[j++], "%5d", idx);
	sprintf(result[j++], "%#x", le32_to_cpu(desc->rx.l234_info));
	sprintf(result[j++], "%7u", le16_to_cpu(desc->rx.pkt_len));
	sprintf(result[j++], "%4u", le16_to_cpu(desc->rx.size));
	sprintf(result[j++], "%#x", le32_to_cpu(desc->rx.rss_hash));
	sprintf(result[j++], "%5u", le16_to_cpu(desc->rx.fd_id));
	sprintf(result[j++], "%8u", le16_to_cpu(desc->rx.vlan_tag));
	sprintf(result[j++], "%15u", le16_to_cpu(desc->rx.o_dm_vlan_id_fb));
	sprintf(result[j++], "%11u", le16_to_cpu(desc->rx.ot_vlan_tag));
	sprintf(result[j++], "%#x", le32_to_cpu(desc->rx.bd_base_info));
	if (test_bit(HNS3_NIC_STATE_RXD_ADV_LAYOUT_ENABLE, &priv->state)) {
		u32 ol_info = le32_to_cpu(desc->rx.ol_info);

		sprintf(result[j++], "%5lu", hnae3_get_field(ol_info,
							     HNS3_RXD_PTYPE_M,
							     HNS3_RXD_PTYPE_S));
		sprintf(result[j++], "%7u", le16_to_cpu(desc->csum));
	} else {
		sprintf(result[j++], "NA");
		sprintf(result[j++], "NA");
	}
}

static int hns3_dbg_rx_bd_info(struct hns3_dbg_data *d, char *buf, int len)
{
	char data_str[ARRAY_SIZE(rx_bd_info_items)][HNS3_DBG_DATA_STR_LEN];
	struct hns3_nic_priv *priv = d->handle->priv;
	char *result[ARRAY_SIZE(rx_bd_info_items)];
	char content[HNS3_DBG_INFO_LEN];
380
	struct hns3_enet_ring *ring;
381 382 383
	struct hns3_desc *desc;
	unsigned int i;
	int pos = 0;
384

385 386 387
	if (d->qid >= d->handle->kinfo.num_tqps) {
		dev_err(&d->handle->pdev->dev,
			"queue%u is not in use\n", d->qid);
388 389 390
		return -EINVAL;
	}

391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408
	for (i = 0; i < ARRAY_SIZE(rx_bd_info_items); i++)
		result[i] = &data_str[i][0];

	pos += scnprintf(buf + pos, len - pos,
			  "Queue %u rx bd info:\n", d->qid);
	hns3_dbg_fill_content(content, sizeof(content), rx_bd_info_items,
			      NULL, ARRAY_SIZE(rx_bd_info_items));
	pos += scnprintf(buf + pos, len - pos, "%s", content);

	ring = &priv->ring[d->qid + d->handle->kinfo.num_tqps];
	for (i = 0; i < ring->desc_num; i++) {
		desc = &ring->desc[i];

		hns3_dump_rx_bd_info(priv, desc, result, i);
		hns3_dbg_fill_content(content, sizeof(content),
				      rx_bd_info_items, (const char **)result,
				      ARRAY_SIZE(rx_bd_info_items));
		pos += scnprintf(buf + pos, len - pos, "%s", content);
409 410
	}

411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426
	return 0;
}

static const struct hns3_dbg_item tx_bd_info_items[] = {
	{ "BD_IDX", 5 },
	{ "ADDRESS", 2 },
	{ "VLAN_TAG", 2 },
	{ "SIZE", 2 },
	{ "T_CS_VLAN_TSO", 2 },
	{ "OT_VLAN_TAG", 3 },
	{ "TV", 2 },
	{ "OLT_VLAN_LEN", 2},
	{ "PAYLEN_OL4CS", 2},
	{ "BD_FE_SC_VLD", 2},
	{ "MSS_HW_CSUM", 0},
};
427

428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461
static void hns3_dump_tx_bd_info(struct hns3_nic_priv *priv,
				 struct hns3_desc *desc, char **result, int idx)
{
	unsigned int j = 0;

	sprintf(result[j++], "%6d", idx);
	sprintf(result[j++], "%#llx", le64_to_cpu(desc->addr));
	sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.vlan_tag));
	sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.send_size));
	sprintf(result[j++], "%#x",
		le32_to_cpu(desc->tx.type_cs_vlan_tso_len));
	sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.outer_vlan_tag));
	sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.tv));
	sprintf(result[j++], "%10u",
		le32_to_cpu(desc->tx.ol_type_vlan_len_msec));
	sprintf(result[j++], "%#x", le32_to_cpu(desc->tx.paylen_ol4cs));
	sprintf(result[j++], "%#x", le16_to_cpu(desc->tx.bdtp_fe_sc_vld_ra_ri));
	sprintf(result[j++], "%5u", le16_to_cpu(desc->tx.mss_hw_csum));
}

static int hns3_dbg_tx_bd_info(struct hns3_dbg_data *d, char *buf, int len)
{
	char data_str[ARRAY_SIZE(tx_bd_info_items)][HNS3_DBG_DATA_STR_LEN];
	struct hns3_nic_priv *priv = d->handle->priv;
	char *result[ARRAY_SIZE(tx_bd_info_items)];
	char content[HNS3_DBG_INFO_LEN];
	struct hns3_enet_ring *ring;
	struct hns3_desc *desc;
	unsigned int i;
	int pos = 0;

	if (d->qid >= d->handle->kinfo.num_tqps) {
		dev_err(&d->handle->pdev->dev,
			"queue%u is not in use\n", d->qid);
462 463 464
		return -EINVAL;
	}

465 466 467 468 469 470 471 472
	for (i = 0; i < ARRAY_SIZE(tx_bd_info_items); i++)
		result[i] = &data_str[i][0];

	pos += scnprintf(buf + pos, len - pos,
			  "Queue %u tx bd info:\n", d->qid);
	hns3_dbg_fill_content(content, sizeof(content), tx_bd_info_items,
			      NULL, ARRAY_SIZE(tx_bd_info_items));
	pos += scnprintf(buf + pos, len - pos, "%s", content);
473

474 475 476 477 478 479 480 481 482 483
	ring = &priv->ring[d->qid];
	for (i = 0; i < ring->desc_num; i++) {
		desc = &ring->desc[i];

		hns3_dump_tx_bd_info(priv, desc, result, i);
		hns3_dbg_fill_content(content, sizeof(content),
				      tx_bd_info_items, (const char **)result,
				      ARRAY_SIZE(tx_bd_info_items));
		pos += scnprintf(buf + pos, len - pos, "%s", content);
	}
484 485 486 487

	return 0;
}

488 489
static void hns3_dbg_help(struct hnae3_handle *h)
{
490 491 492 493
#define HNS3_DBG_BUF_LEN 256

	char printf_buf[HNS3_DBG_BUF_LEN];

494
	dev_info(&h->pdev->dev, "available commands\n");
495
	dev_info(&h->pdev->dev, "queue info <number>\n");
496
	dev_info(&h->pdev->dev, "queue map\n");
497 498 499 500

	if (!hns3_is_phys_func(h->pdev))
		return;

501
	dev_info(&h->pdev->dev, "dump fd tcam\n");
502
	dev_info(&h->pdev->dev, "dump tc\n");
503
	dev_info(&h->pdev->dev, "dump tm map <q_num>\n");
504
	dev_info(&h->pdev->dev, "dump tm\n");
505
	dev_info(&h->pdev->dev, "dump qos pause cfg\n");
506
	dev_info(&h->pdev->dev, "dump qos pri map\n");
507
	dev_info(&h->pdev->dev, "dump qos buf cfg\n");
508
	dev_info(&h->pdev->dev, "dump reset info\n");
509
	dev_info(&h->pdev->dev, "dump m7 info\n");
510
	dev_info(&h->pdev->dev, "dump ncl_config <offset> <length>(in hex)\n");
511
	dev_info(&h->pdev->dev, "dump mac tnl status\n");
512
	dev_info(&h->pdev->dev, "dump qs shaper [qs id]\n");
513 514

	memset(printf_buf, 0, HNS3_DBG_BUF_LEN);
515
	strncat(printf_buf, "dump reg [[bios common] [ssu <port_id>]",
516 517
		HNS3_DBG_BUF_LEN - 1);
	strncat(printf_buf + strlen(printf_buf),
518
		" [igu egu <port_id>] [rpu <tc_queue_num>]",
519 520
		HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
	strncat(printf_buf + strlen(printf_buf),
521
		" [rtc] [ppp] [rcb] [tqp <queue_num>] [mac]]\n",
522 523
		HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
	dev_info(&h->pdev->dev, "%s", printf_buf);
524 525

	memset(printf_buf, 0, HNS3_DBG_BUF_LEN);
526
	strncat(printf_buf, "dump reg dcb <port_id> <pri_id> <pg_id>",
527
		HNS3_DBG_BUF_LEN - 1);
528
	strncat(printf_buf + strlen(printf_buf), " <rq_id> <nq_id> <qset_id>\n",
529 530
		HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
	dev_info(&h->pdev->dev, "%s", printf_buf);
531 532
}

533 534
static void
hns3_dbg_dev_caps(struct hnae3_handle *h, char *buf, int len, int *pos)
535 536
{
	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h->pdev);
537 538 539 540 541 542 543 544 545 546 547 548 549
	static const char * const str[] = {"no", "yes"};
	unsigned long *caps = ae_dev->caps;
	u32 i, state;

	*pos += scnprintf(buf + *pos, len - *pos, "dev capability:\n");

	for (i = 0; i < ARRAY_SIZE(hns3_dbg_cap); i++) {
		state = test_bit(hns3_dbg_cap[i].cap_bit, caps);
		*pos += scnprintf(buf + *pos, len - *pos, "%s: %s\n",
				  hns3_dbg_cap[i].name, str[state]);
	}

	*pos += scnprintf(buf + *pos, len - *pos, "\n");
550 551
}

552 553
static void
hns3_dbg_dev_specs(struct hnae3_handle *h, char *buf, int len, int *pos)
554 555 556 557
{
	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h->pdev);
	struct hnae3_dev_specs *dev_specs = &ae_dev->dev_specs;
	struct hnae3_knic_private_info *kinfo = &h->kinfo;
558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604

	*pos += scnprintf(buf + *pos, len - *pos, "dev_spec:\n");
	*pos += scnprintf(buf + *pos, len - *pos, "MAC entry num: %u\n",
			  dev_specs->mac_entry_num);
	*pos += scnprintf(buf + *pos, len - *pos, "MNG entry num: %u\n",
			  dev_specs->mng_entry_num);
	*pos += scnprintf(buf + *pos, len - *pos, "MAX non tso bd num: %u\n",
			  dev_specs->max_non_tso_bd_num);
	*pos += scnprintf(buf + *pos, len - *pos, "RSS ind tbl size: %u\n",
			  dev_specs->rss_ind_tbl_size);
	*pos += scnprintf(buf + *pos, len - *pos, "RSS key size: %u\n",
			  dev_specs->rss_key_size);
	*pos += scnprintf(buf + *pos, len - *pos, "RSS size: %u\n",
			  kinfo->rss_size);
	*pos += scnprintf(buf + *pos, len - *pos, "Allocated RSS size: %u\n",
			  kinfo->req_rss_size);
	*pos += scnprintf(buf + *pos, len - *pos,
			  "Task queue pairs numbers: %u\n",
			  kinfo->num_tqps);
	*pos += scnprintf(buf + *pos, len - *pos, "RX buffer length: %u\n",
			  kinfo->rx_buf_len);
	*pos += scnprintf(buf + *pos, len - *pos, "Desc num per TX queue: %u\n",
			  kinfo->num_tx_desc);
	*pos += scnprintf(buf + *pos, len - *pos, "Desc num per RX queue: %u\n",
			  kinfo->num_rx_desc);
	*pos += scnprintf(buf + *pos, len - *pos,
			  "Total number of enabled TCs: %u\n",
			  kinfo->tc_info.num_tc);
	*pos += scnprintf(buf + *pos, len - *pos, "MAX INT QL: %u\n",
			  dev_specs->int_ql_max);
	*pos += scnprintf(buf + *pos, len - *pos, "MAX INT GL: %u\n",
			  dev_specs->max_int_gl);
	*pos += scnprintf(buf + *pos, len - *pos, "MAX TM RATE: %u\n",
			  dev_specs->max_tm_rate);
	*pos += scnprintf(buf + *pos, len - *pos, "MAX QSET number: %u\n",
			  dev_specs->max_qset_num);
}

static int hns3_dbg_dev_info(struct hnae3_handle *h, char *buf, int len)
{
	int pos = 0;

	hns3_dbg_dev_caps(h, buf, len, &pos);

	hns3_dbg_dev_specs(h, buf, len, &pos);

	return 0;
605 606
}

607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623
static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
				 size_t count, loff_t *ppos)
{
	int uncopy_bytes;
	char *buf;
	int len;

	if (*ppos != 0)
		return 0;

	if (count < HNS3_DBG_READ_LEN)
		return -ENOSPC;

	buf = kzalloc(HNS3_DBG_READ_LEN, GFP_KERNEL);
	if (!buf)
		return -ENOMEM;

624 625
	len = scnprintf(buf, HNS3_DBG_READ_LEN, "%s\n",
			"Please echo help to cmd to get help information");
626 627 628 629 630 631 632 633 634 635
	uncopy_bytes = copy_to_user(buffer, buf, len);

	kfree(buf);

	if (uncopy_bytes)
		return -EFAULT;

	return (*ppos = len);
}

636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653
static int hns3_dbg_check_cmd(struct hnae3_handle *handle, char *cmd_buf)
{
	int ret = 0;

	if (strncmp(cmd_buf, "help", 4) == 0)
		hns3_dbg_help(handle);
	else if (strncmp(cmd_buf, "queue info", 10) == 0)
		ret = hns3_dbg_queue_info(handle, cmd_buf);
	else if (strncmp(cmd_buf, "queue map", 9) == 0)
		ret = hns3_dbg_queue_map(handle);
	else if (handle->ae_algo->ops->dbg_run_cmd)
		ret = handle->ae_algo->ops->dbg_run_cmd(handle, cmd_buf);
	else
		ret = -EOPNOTSUPP;

	return ret;
}

654 655 656 657
static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer,
				  size_t count, loff_t *ppos)
{
	struct hnae3_handle *handle = filp->private_data;
658
	struct hns3_nic_priv *priv  = handle->priv;
659 660
	char *cmd_buf, *cmd_buf_tmp;
	int uncopied_bytes;
661
	int ret;
662 663 664 665

	if (*ppos != 0)
		return 0;

666
	/* Judge if the instance is being reset. */
667
	if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) ||
668 669 670
	    test_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
		return 0;

671 672 673
	if (count > HNS3_DBG_WRITE_LEN)
		return -ENOSPC;

674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691
	cmd_buf = kzalloc(count + 1, GFP_KERNEL);
	if (!cmd_buf)
		return count;

	uncopied_bytes = copy_from_user(cmd_buf, buffer, count);
	if (uncopied_bytes) {
		kfree(cmd_buf);
		return -EFAULT;
	}

	cmd_buf[count] = '\0';

	cmd_buf_tmp = strchr(cmd_buf, '\n');
	if (cmd_buf_tmp) {
		*cmd_buf_tmp = '\0';
		count = cmd_buf_tmp - cmd_buf + 1;
	}

692
	ret = hns3_dbg_check_cmd(handle, cmd_buf);
693 694 695 696 697 698 699 700 701
	if (ret)
		hns3_dbg_help(handle);

	kfree(cmd_buf);
	cmd_buf = NULL;

	return count;
}

702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718
static int hns3_dbg_get_cmd_index(struct hnae3_handle *handle,
				  const unsigned char *name, u32 *index)
{
	u32 i;

	for (i = 0; i < ARRAY_SIZE(hns3_dbg_cmd); i++) {
		if (!strncmp(name, hns3_dbg_cmd[i].name,
			     strlen(hns3_dbg_cmd[i].name))) {
			*index = i;
			return 0;
		}
	}

	dev_err(&handle->pdev->dev, "unknown command(%s)\n", name);
	return -EINVAL;
}

719 720 721 722 723
static const struct hns3_dbg_func hns3_dbg_cmd_func[] = {
	{
		.cmd = HNAE3_DBG_CMD_DEV_INFO,
		.dbg_dump = hns3_dbg_dev_info,
	},
724 725 726 727 728 729 730 731
	{
		.cmd = HNAE3_DBG_CMD_TX_BD,
		.dbg_dump_bd = hns3_dbg_tx_bd_info,
	},
	{
		.cmd = HNAE3_DBG_CMD_RX_BD,
		.dbg_dump_bd = hns3_dbg_rx_bd_info,
	},
732 733
};

734
static int hns3_dbg_read_cmd(struct hns3_dbg_data *dbg_data,
735 736
			     enum hnae3_dbg_cmd cmd, char *buf, int len)
{
737 738
	const struct hnae3_ae_ops *ops = dbg_data->handle->ae_algo->ops;
	const struct hns3_dbg_func *cmd_func;
739 740 741
	u32 i;

	for (i = 0; i < ARRAY_SIZE(hns3_dbg_cmd_func); i++) {
742 743 744 745 746 747 748 749 750
		if (cmd == hns3_dbg_cmd_func[i].cmd) {
			cmd_func = &hns3_dbg_cmd_func[i];
			if (cmd_func->dbg_dump)
				return cmd_func->dbg_dump(dbg_data->handle, buf,
							  len);
			else
				return cmd_func->dbg_dump_bd(dbg_data, buf,
							     len);
		}
751
	}
752 753 754 755

	if (!ops->dbg_read_cmd)
		return -EOPNOTSUPP;

756
	return ops->dbg_read_cmd(dbg_data->handle, cmd, buf, len);
757 758
}

759 760 761
static ssize_t hns3_dbg_read(struct file *filp, char __user *buffer,
			     size_t count, loff_t *ppos)
{
762 763
	struct hns3_dbg_data *dbg_data = filp->private_data;
	struct hnae3_handle *handle = dbg_data->handle;
764 765
	struct hns3_nic_priv *priv = handle->priv;
	ssize_t size = 0;
766 767 768 769
	char **save_buf;
	char *read_buf;
	u32 index;
	int ret;
770

771 772 773 774
	ret = hns3_dbg_get_cmd_index(handle, filp->f_path.dentry->d_iname,
				     &index);
	if (ret)
		return ret;
775

776
	save_buf = &hns3_dbg_cmd[index].buf;
777

778 779 780
	if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) ||
	    test_bit(HNS3_NIC_STATE_RESETTING, &priv->state)) {
		ret = -EBUSY;
781 782 783
		goto out;
	}

784 785 786 787 788 789 790 791 792 793 794 795 796
	if (*save_buf) {
		read_buf = *save_buf;
	} else {
		read_buf = kvzalloc(hns3_dbg_cmd[index].buf_len, GFP_KERNEL);
		if (!read_buf)
			return -ENOMEM;

		/* save the buffer addr until the last read operation */
		*save_buf = read_buf;
	}

	/* get data ready for the first time to read */
	if (!*ppos) {
797
		ret = hns3_dbg_read_cmd(dbg_data, hns3_dbg_cmd[index].cmd,
798 799 800 801 802
					read_buf, hns3_dbg_cmd[index].buf_len);
		if (ret)
			goto out;
	}

803 804
	size = simple_read_from_buffer(buffer, count, ppos, read_buf,
				       strlen(read_buf));
805 806
	if (size > 0)
		return size;
807 808

out:
809 810 811 812 813 814 815
	/* free the buffer for the last read operation */
	if (*save_buf) {
		kvfree(*save_buf);
		*save_buf = NULL;
	}

	return ret;
816 817
}

818 819 820 821 822 823 824
static const struct file_operations hns3_dbg_cmd_fops = {
	.owner = THIS_MODULE,
	.open  = simple_open,
	.read  = hns3_dbg_cmd_read,
	.write = hns3_dbg_cmd_write,
};

825 826 827 828 829 830
static const struct file_operations hns3_dbg_fops = {
	.owner = THIS_MODULE,
	.open  = simple_open,
	.read  = hns3_dbg_read,
};

831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857
static int hns3_dbg_bd_file_init(struct hnae3_handle *handle, u32 cmd)
{
	struct dentry *entry_dir;
	struct hns3_dbg_data *data;
	u16 max_queue_num;
	unsigned int i;

	entry_dir = hns3_dbg_dentry[hns3_dbg_cmd[cmd].dentry].dentry;
	max_queue_num = hns3_get_max_available_channels(handle);
	data = devm_kzalloc(&handle->pdev->dev, max_queue_num * sizeof(*data),
			    GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	for (i = 0; i < max_queue_num; i++) {
		char name[HNS3_DBG_FILE_NAME_LEN];

		data[i].handle = handle;
		data[i].qid = i;
		sprintf(name, "%s%u", hns3_dbg_cmd[cmd].name, i);
		debugfs_create_file(name, 0400, entry_dir, &data[i],
				    &hns3_dbg_fops);
	}

	return 0;
}

858 859 860
static int
hns3_dbg_common_file_init(struct hnae3_handle *handle, u32 cmd)
{
861
	struct hns3_dbg_data *data;
862 863
	struct dentry *entry_dir;

864 865 866 867 868
	data = devm_kzalloc(&handle->pdev->dev, sizeof(*data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	data->handle = handle;
869 870
	entry_dir = hns3_dbg_dentry[hns3_dbg_cmd[cmd].dentry].dentry;
	debugfs_create_file(hns3_dbg_cmd[cmd].name, 0400, entry_dir,
871
			    data, &hns3_dbg_fops);
872 873 874 875 876

	return 0;
}

int hns3_dbg_init(struct hnae3_handle *handle)
877
{
878
	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
879
	const char *name = pci_name(handle->pdev);
880 881
	int ret;
	u32 i;
882

883 884 885
	hns3_dbg_dentry[HNS3_DBG_DENTRY_COMMON].dentry =
				debugfs_create_dir(name, hns3_dbgfs_root);
	handle->hnae3_dbgfs = hns3_dbg_dentry[HNS3_DBG_DENTRY_COMMON].dentry;
886

887 888
	debugfs_create_file("cmd", 0600, handle->hnae3_dbgfs, handle,
			    &hns3_dbg_cmd_fops);
889

890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921
	for (i = 0; i < HNS3_DBG_DENTRY_COMMON; i++)
		hns3_dbg_dentry[i].dentry =
			debugfs_create_dir(hns3_dbg_dentry[i].name,
					   handle->hnae3_dbgfs);

	for (i = 0; i < ARRAY_SIZE(hns3_dbg_cmd); i++) {
		if (hns3_dbg_cmd[i].cmd == HNAE3_DBG_CMD_TM_NODES &&
		    ae_dev->dev_version <= HNAE3_DEVICE_VERSION_V2)
			continue;

		if (!hns3_dbg_cmd[i].init) {
			dev_err(&handle->pdev->dev,
				"cmd %s lack of init func\n",
				hns3_dbg_cmd[i].name);
			ret = -EINVAL;
			goto out;
		}

		ret = hns3_dbg_cmd[i].init(handle, i);
		if (ret) {
			dev_err(&handle->pdev->dev, "failed to init cmd %s\n",
				hns3_dbg_cmd[i].name);
			goto out;
		}
	}

	return 0;

out:
	debugfs_remove_recursive(handle->hnae3_dbgfs);
	handle->hnae3_dbgfs = NULL;
	return ret;
922 923 924 925
}

void hns3_dbg_uninit(struct hnae3_handle *handle)
{
926 927 928 929 930 931 932 933
	u32 i;

	for (i = 0; i < ARRAY_SIZE(hns3_dbg_cmd); i++)
		if (hns3_dbg_cmd[i].buf) {
			kvfree(hns3_dbg_cmd[i].buf);
			hns3_dbg_cmd[i].buf = NULL;
		}

934 935 936 937 938 939 940 941 942 943 944 945 946 947
	debugfs_remove_recursive(handle->hnae3_dbgfs);
	handle->hnae3_dbgfs = NULL;
}

void hns3_dbg_register_debugfs(const char *debugfs_dir_name)
{
	hns3_dbgfs_root = debugfs_create_dir(debugfs_dir_name, NULL);
}

void hns3_dbg_unregister_debugfs(void)
{
	debugfs_remove_recursive(hns3_dbgfs_root);
	hns3_dbgfs_root = NULL;
}