exynos-adc.txt 1.7 KB
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Samsung Exynos Analog to Digital Converter bindings

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The devicetree bindings are for the new ADC driver written for
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Exynos4 and upward SoCs from Samsung.

New driver handles the following
1. Supports ADC IF found on EXYNOS4412/EXYNOS5250
   and future SoCs from Samsung
2. Add ADC driver under iio/adc framework
3. Also adds the Documentation for device tree bindings

Required properties:
- compatible:		Must be "samsung,exynos-adc-v1"
				for exynos4412/5250 controllers.
			Must be "samsung,exynos-adc-v2" for
				future controllers.
- reg:			Contains ADC register address range (base address and
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			length) and the address of the phy enable register.
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- interrupts: 		Contains the interrupt information for the timer. The
			format is being dependent on which interrupt controller
			the Samsung device uses.
- #io-channel-cells = <1>; As ADC has multiple outputs
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- clocks		From common clock binding: handle to adc clock.
- clock-names		From common clock binding: Shall be "adc".
- vdd-supply		VDD input supply.
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Note: child nodes can be added for auto probing from device tree.

Example: adding device info in dtsi file

adc: adc@12D10000 {
	compatible = "samsung,exynos-adc-v1";
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	reg = <0x12D10000 0x100>, <0x10040718 0x4>;
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	interrupts = <0 106 0>;
	#io-channel-cells = <1>;
	io-channel-ranges;
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	clocks = <&clock 303>;
	clock-names = "adc";

	vdd-supply = <&buck5_reg>;
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};


Example: Adding child nodes in dts file

adc@12D10000 {

	/* NTC thermistor is a hwmon device */
	ncp15wb473@0 {
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		compatible = "murata,ncp15wb473";
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		pullup-uv = <1800000>;
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		pullup-ohm = <47000>;
		pulldown-ohm = <0>;
		io-channels = <&adc 4>;
	};
};

Note: Does not apply to ADC driver under arch/arm/plat-samsung/
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Note: The child node can be added under the adc node or separately.