freesync.c 37.5 KB
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/*
 * Copyright 2016 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

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#include <linux/slab.h>

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#include "dm_services.h"
#include "dc.h"
#include "mod_freesync.h"
#include "core_types.h"

#define MOD_FREESYNC_MAX_CONCURRENT_STREAMS  32

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#define MIN_REFRESH_RANGE_IN_US 10000000
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/* Refresh rate ramp at a fixed rate of 65 Hz/second */
#define STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME ((1000 / 60) * 65)
/* Number of elements in the render times cache array */
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#define RENDER_TIMES_MAX_COUNT 10
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/* Threshold to exit BTR (to avoid frequent enter-exits at the lower limit) */
#define BTR_EXIT_MARGIN 2000
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/* Threshold to change BTR multiplier (to avoid frequent changes) */
#define BTR_DRIFT_MARGIN 2000
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/*Threshold to exit fixed refresh rate*/
#define FIXED_REFRESH_EXIT_MARGIN_IN_HZ 4
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/* Number of consecutive frames to check before entering/exiting fixed refresh*/
#define FIXED_REFRESH_ENTER_FRAME_COUNT 5
#define FIXED_REFRESH_EXIT_FRAME_COUNT 5
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struct core_freesync {
	struct mod_freesync public;
	struct dc *dc;
};

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void setFieldWithMask(unsigned char *dest, unsigned int mask, unsigned int value)
{
	unsigned int shift = 0;

	if (!mask || !dest)
		return;

	while (!((mask >> shift) & 1))
		shift++;

	//reset
	*dest = *dest & ~mask;
	//set
	//dont let value span past mask
	value = value & (mask >> shift);
	//insert value
	*dest = *dest | (value << shift);
}

// VTEM Byte Offset
#define VRR_VTEM_PB0		0
#define VRR_VTEM_PB1		1
#define VRR_VTEM_PB2		2
#define VRR_VTEM_PB3		3
#define VRR_VTEM_PB4		4
#define VRR_VTEM_PB5		5
#define VRR_VTEM_PB6		6

#define VRR_VTEM_MD0		7
#define VRR_VTEM_MD1		8
#define VRR_VTEM_MD2		9
#define VRR_VTEM_MD3		10


// VTEM Byte Masks
//PB0
#define MASK__VRR_VTEM_PB0__RESERVED0  0x01
#define MASK__VRR_VTEM_PB0__SYNC       0x02
#define MASK__VRR_VTEM_PB0__VFR        0x04
#define MASK__VRR_VTEM_PB0__AFR        0x08
#define MASK__VRR_VTEM_PB0__DS_TYPE    0x30
	//0: Periodic pseudo-static EM Data Set
	//1: Periodic dynamic EM Data Set
	//2: Unique EM Data Set
	//3: Reserved
#define MASK__VRR_VTEM_PB0__END        0x40
#define MASK__VRR_VTEM_PB0__NEW        0x80

//PB1
#define MASK__VRR_VTEM_PB1__RESERVED1 0xFF

//PB2
#define MASK__VRR_VTEM_PB2__ORGANIZATION_ID 0xFF
	//0: This is a Vendor Specific EM Data Set
	//1: This EM Data Set is defined by This Specification (HDMI 2.1 r102.clean)
	//2: This EM Data Set is defined by CTA-861-G
	//3: This EM Data Set is defined by VESA
//PB3
#define MASK__VRR_VTEM_PB3__DATA_SET_TAG_MSB    0xFF
//PB4
#define MASK__VRR_VTEM_PB4__DATA_SET_TAG_LSB    0xFF
//PB5
#define MASK__VRR_VTEM_PB5__DATA_SET_LENGTH_MSB 0xFF
//PB6
#define MASK__VRR_VTEM_PB6__DATA_SET_LENGTH_LSB 0xFF



//PB7-27 (20 bytes):
//PB7 = MD0
#define MASK__VRR_VTEM_MD0__VRR_EN         0x01
#define MASK__VRR_VTEM_MD0__M_CONST        0x02
#define MASK__VRR_VTEM_MD0__RESERVED2      0x0C
#define MASK__VRR_VTEM_MD0__FVA_FACTOR_M1  0xF0

//MD1
#define MASK__VRR_VTEM_MD1__BASE_VFRONT    0xFF

//MD2
#define MASK__VRR_VTEM_MD2__BASE_REFRESH_RATE_98  0x03
#define MASK__VRR_VTEM_MD2__RB                    0x04
#define MASK__VRR_VTEM_MD2__RESERVED3             0xF8

//MD3
#define MASK__VRR_VTEM_MD3__BASE_REFRESH_RATE_07  0xFF


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#define MOD_FREESYNC_TO_CORE(mod_freesync)\
		container_of(mod_freesync, struct core_freesync, public)

struct mod_freesync *mod_freesync_create(struct dc *dc)
{
	struct core_freesync *core_freesync =
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			kzalloc(sizeof(struct core_freesync), GFP_KERNEL);
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	if (core_freesync == NULL)
		goto fail_alloc_context;

	if (dc == NULL)
		goto fail_construct;

	core_freesync->dc = dc;
	return &core_freesync->public;

fail_construct:
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	kfree(core_freesync);
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fail_alloc_context:
	return NULL;
}

void mod_freesync_destroy(struct mod_freesync *mod_freesync)
{
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	struct core_freesync *core_freesync = NULL;
	if (mod_freesync == NULL)
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		return;
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	core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
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	kfree(core_freesync);
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}

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#if 0 /* unused currently */
static unsigned int calc_refresh_in_uhz_from_duration(
		unsigned int duration_in_ns)
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{
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	unsigned int refresh_in_uhz =
			((unsigned int)(div64_u64((1000000000ULL * 1000000),
					duration_in_ns)));
	return refresh_in_uhz;
}
#endif
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static unsigned int calc_duration_in_us_from_refresh_in_uhz(
		unsigned int refresh_in_uhz)
{
	unsigned int duration_in_us =
			((unsigned int)(div64_u64((1000000000ULL * 1000),
					refresh_in_uhz)));
	return duration_in_us;
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}

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static unsigned int calc_duration_in_us_from_v_total(
		const struct dc_stream_state *stream,
		const struct mod_vrr_params *in_vrr,
		unsigned int v_total)
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{
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	unsigned int duration_in_us =
			(unsigned int)(div64_u64(((unsigned long long)(v_total)
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				* 10000) * stream->timing.h_total,
					stream->timing.pix_clk_100hz));
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	return duration_in_us;
}
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static unsigned int calc_v_total_from_refresh(
		const struct dc_stream_state *stream,
		unsigned int refresh_in_uhz)
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{
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	unsigned int v_total = stream->timing.v_total;
	unsigned int frame_duration_in_ns;
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	frame_duration_in_ns =
			((unsigned int)(div64_u64((1000000000ULL * 1000000),
					refresh_in_uhz)));
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	v_total = div64_u64(div64_u64(((unsigned long long)(
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			frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)),
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			stream->timing.h_total), 1000000);
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	/* v_total cannot be less than nominal */
	if (v_total < stream->timing.v_total) {
		ASSERT(v_total < stream->timing.v_total);
		v_total = stream->timing.v_total;
	}
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	return v_total;
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}

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static unsigned int calc_v_total_from_duration(
		const struct dc_stream_state *stream,
		const struct mod_vrr_params *vrr,
		unsigned int duration_in_us)
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{
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	unsigned int v_total = 0;
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	if (duration_in_us < vrr->min_duration_in_us)
		duration_in_us = vrr->min_duration_in_us;
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	if (duration_in_us > vrr->max_duration_in_us)
		duration_in_us = vrr->max_duration_in_us;
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	v_total = div64_u64(div64_u64(((unsigned long long)(
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				duration_in_us) * (stream->timing.pix_clk_100hz / 10)),
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				stream->timing.h_total), 1000);
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	/* v_total cannot be less than nominal */
	if (v_total < stream->timing.v_total) {
		ASSERT(v_total < stream->timing.v_total);
		v_total = stream->timing.v_total;
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	}

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	return v_total;
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}

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static void update_v_total_for_static_ramp(
		struct core_freesync *core_freesync,
		const struct dc_stream_state *stream,
		struct mod_vrr_params *in_out_vrr)
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{
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	unsigned int v_total = 0;
	unsigned int current_duration_in_us =
			calc_duration_in_us_from_v_total(
				stream, in_out_vrr,
				in_out_vrr->adjust.v_total_max);
	unsigned int target_duration_in_us =
			calc_duration_in_us_from_refresh_in_uhz(
				in_out_vrr->fixed.target_refresh_in_uhz);
	bool ramp_direction_is_up = (current_duration_in_us >
				target_duration_in_us) ? true : false;
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	/* Calc ratio between new and current frame duration with 3 digit */
	unsigned int frame_duration_ratio = div64_u64(1000000,
		(1000 +  div64_u64(((unsigned long long)(
		STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME) *
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		current_duration_in_us),
		1000000)));
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	/* Calculate delta between new and current frame duration in us */
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	unsigned int frame_duration_delta = div64_u64(((unsigned long long)(
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		current_duration_in_us) *
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		(1000 - frame_duration_ratio)), 1000);

	/* Adjust frame duration delta based on ratio between current and
	 * standard frame duration (frame duration at 60 Hz refresh rate).
	 */
	unsigned int ramp_rate_interpolated = div64_u64(((unsigned long long)(
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		frame_duration_delta) * current_duration_in_us), 16666);
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	/* Going to a higher refresh rate (lower frame duration) */
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	if (ramp_direction_is_up) {
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		/* reduce frame duration */
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		current_duration_in_us -= ramp_rate_interpolated;
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		/* adjust for frame duration below min */
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		if (current_duration_in_us <= target_duration_in_us) {
			in_out_vrr->fixed.ramping_active = false;
			in_out_vrr->fixed.ramping_done = true;
			current_duration_in_us =
				calc_duration_in_us_from_refresh_in_uhz(
				in_out_vrr->fixed.target_refresh_in_uhz);
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		}
	/* Going to a lower refresh rate (larger frame duration) */
	} else {
		/* increase frame duration */
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		current_duration_in_us += ramp_rate_interpolated;
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		/* adjust for frame duration above max */
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		if (current_duration_in_us >= target_duration_in_us) {
			in_out_vrr->fixed.ramping_active = false;
			in_out_vrr->fixed.ramping_done = true;
			current_duration_in_us =
				calc_duration_in_us_from_refresh_in_uhz(
				in_out_vrr->fixed.target_refresh_in_uhz);
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		}
	}

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	v_total = div64_u64(div64_u64(((unsigned long long)(
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			current_duration_in_us) * (stream->timing.pix_clk_100hz / 10)),
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				stream->timing.h_total), 1000);
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	in_out_vrr->adjust.v_total_min = v_total;
	in_out_vrr->adjust.v_total_max = v_total;
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}

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static void apply_below_the_range(struct core_freesync *core_freesync,
		const struct dc_stream_state *stream,
		unsigned int last_render_time_in_us,
		struct mod_vrr_params *in_out_vrr)
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{
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	unsigned int inserted_frame_duration_in_us = 0;
	unsigned int mid_point_frames_ceil = 0;
	unsigned int mid_point_frames_floor = 0;
	unsigned int frame_time_in_us = 0;
	unsigned int delta_from_mid_point_in_us_1 = 0xFFFFFFFF;
	unsigned int delta_from_mid_point_in_us_2 = 0xFFFFFFFF;
	unsigned int frames_to_insert = 0;
	unsigned int min_frame_duration_in_ns = 0;
	unsigned int max_render_time_in_us = in_out_vrr->max_duration_in_us;
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	unsigned int delta_from_mid_point_delta_in_us;
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	min_frame_duration_in_ns = ((unsigned int) (div64_u64(
		(1000000000ULL * 1000000),
		in_out_vrr->max_refresh_in_uhz)));
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	/* Program BTR */
	if (last_render_time_in_us + BTR_EXIT_MARGIN < max_render_time_in_us) {
		/* Exit Below the Range */
		if (in_out_vrr->btr.btr_active) {
			in_out_vrr->btr.frame_counter = 0;
			in_out_vrr->btr.btr_active = false;
		}
	} else if (last_render_time_in_us > max_render_time_in_us) {
		/* Enter Below the Range */
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		in_out_vrr->btr.btr_active = true;
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	}
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	/* BTR set to "not active" so disengage */
	if (!in_out_vrr->btr.btr_active) {
		in_out_vrr->btr.inserted_duration_in_us = 0;
		in_out_vrr->btr.frames_to_insert = 0;
		in_out_vrr->btr.frame_counter = 0;
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		/* Restore FreeSync */
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		in_out_vrr->adjust.v_total_min =
			calc_v_total_from_refresh(stream,
				in_out_vrr->max_refresh_in_uhz);
		in_out_vrr->adjust.v_total_max =
			calc_v_total_from_refresh(stream,
				in_out_vrr->min_refresh_in_uhz);
	/* BTR set to "active" so engage */
	} else {
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		/* Calculate number of midPoint frames that could fit within
		 * the render time interval- take ceil of this value
		 */
		mid_point_frames_ceil = (last_render_time_in_us +
				in_out_vrr->btr.mid_point_in_us - 1) /
					in_out_vrr->btr.mid_point_in_us;
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		if (mid_point_frames_ceil > 0) {
			frame_time_in_us = last_render_time_in_us /
				mid_point_frames_ceil;
			delta_from_mid_point_in_us_1 =
				(in_out_vrr->btr.mid_point_in_us >
				frame_time_in_us) ?
				(in_out_vrr->btr.mid_point_in_us - frame_time_in_us) :
				(frame_time_in_us - in_out_vrr->btr.mid_point_in_us);
		}
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		/* Calculate number of midPoint frames that could fit within
		 * the render time interval- take floor of this value
		 */
		mid_point_frames_floor = last_render_time_in_us /
				in_out_vrr->btr.mid_point_in_us;
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		if (mid_point_frames_floor > 0) {
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			frame_time_in_us = last_render_time_in_us /
				mid_point_frames_floor;
			delta_from_mid_point_in_us_2 =
				(in_out_vrr->btr.mid_point_in_us >
				frame_time_in_us) ?
				(in_out_vrr->btr.mid_point_in_us - frame_time_in_us) :
				(frame_time_in_us - in_out_vrr->btr.mid_point_in_us);
		}
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		/* Choose number of frames to insert based on how close it
		 * can get to the mid point of the variable range.
		 */
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		if (delta_from_mid_point_in_us_1 < delta_from_mid_point_in_us_2) {
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			frames_to_insert = mid_point_frames_ceil;
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			delta_from_mid_point_delta_in_us = delta_from_mid_point_in_us_2 -
					delta_from_mid_point_in_us_1;
		} else {
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			frames_to_insert = mid_point_frames_floor;
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			delta_from_mid_point_delta_in_us = delta_from_mid_point_in_us_1 -
					delta_from_mid_point_in_us_2;
		}

		/* Prefer current frame multiplier when BTR is enabled unless it drifts
		 * too far from the midpoint
		 */
		if (in_out_vrr->btr.frames_to_insert != 0 &&
				delta_from_mid_point_delta_in_us < BTR_DRIFT_MARGIN) {
			if (((last_render_time_in_us / in_out_vrr->btr.frames_to_insert) <
					in_out_vrr->max_duration_in_us) &&
				((last_render_time_in_us / in_out_vrr->btr.frames_to_insert) >
					in_out_vrr->min_duration_in_us))
				frames_to_insert = in_out_vrr->btr.frames_to_insert;
		}
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		/* Either we've calculated the number of frames to insert,
		 * or we need to insert min duration frames
		 */
		if (frames_to_insert > 0)
			inserted_frame_duration_in_us = last_render_time_in_us /
							frames_to_insert;
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		if (inserted_frame_duration_in_us < in_out_vrr->min_duration_in_us)
			inserted_frame_duration_in_us = in_out_vrr->min_duration_in_us;
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		/* Cache the calculated variables */
		in_out_vrr->btr.inserted_duration_in_us =
			inserted_frame_duration_in_us;
		in_out_vrr->btr.frames_to_insert = frames_to_insert;
		in_out_vrr->btr.frame_counter = frames_to_insert;
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	}
}

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static void apply_fixed_refresh(struct core_freesync *core_freesync,
		const struct dc_stream_state *stream,
		unsigned int last_render_time_in_us,
		struct mod_vrr_params *in_out_vrr)
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{
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	bool update = false;
	unsigned int max_render_time_in_us = in_out_vrr->max_duration_in_us;
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	//Compute the exit refresh rate and exit frame duration
	unsigned int exit_refresh_rate_in_milli_hz = ((1000000000/max_render_time_in_us)
			+ (1000*FIXED_REFRESH_EXIT_MARGIN_IN_HZ));
	unsigned int exit_frame_duration_in_us = 1000000000/exit_refresh_rate_in_milli_hz;

	if (last_render_time_in_us < exit_frame_duration_in_us) {
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		/* Exit Fixed Refresh mode */
		if (in_out_vrr->fixed.fixed_active) {
			in_out_vrr->fixed.frame_counter++;
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			if (in_out_vrr->fixed.frame_counter >
					FIXED_REFRESH_EXIT_FRAME_COUNT) {
				in_out_vrr->fixed.frame_counter = 0;
				in_out_vrr->fixed.fixed_active = false;
				in_out_vrr->fixed.target_refresh_in_uhz = 0;
				update = true;
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			}
		}
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	} else if (last_render_time_in_us > max_render_time_in_us) {
		/* Enter Fixed Refresh mode */
		if (!in_out_vrr->fixed.fixed_active) {
			in_out_vrr->fixed.frame_counter++;
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			if (in_out_vrr->fixed.frame_counter >
					FIXED_REFRESH_ENTER_FRAME_COUNT) {
				in_out_vrr->fixed.frame_counter = 0;
				in_out_vrr->fixed.fixed_active = true;
				in_out_vrr->fixed.target_refresh_in_uhz =
						in_out_vrr->max_refresh_in_uhz;
				update = true;
			}
		}
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	}

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	if (update) {
		if (in_out_vrr->fixed.fixed_active) {
			in_out_vrr->adjust.v_total_min =
				calc_v_total_from_refresh(
				stream, in_out_vrr->max_refresh_in_uhz);
			in_out_vrr->adjust.v_total_max =
					in_out_vrr->adjust.v_total_min;
		} else {
			in_out_vrr->adjust.v_total_min =
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				calc_v_total_from_refresh(stream,
					in_out_vrr->max_refresh_in_uhz);
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			in_out_vrr->adjust.v_total_max =
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				calc_v_total_from_refresh(stream,
					in_out_vrr->min_refresh_in_uhz);
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		}
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	}
}

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static bool vrr_settings_require_update(struct core_freesync *core_freesync,
		struct mod_freesync_config *in_config,
		unsigned int min_refresh_in_uhz,
		unsigned int max_refresh_in_uhz,
		struct mod_vrr_params *in_vrr)
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{
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	if (in_vrr->state != in_config->state) {
		return true;
	} else if (in_vrr->state == VRR_STATE_ACTIVE_FIXED &&
			in_vrr->fixed.target_refresh_in_uhz !=
					in_config->min_refresh_in_uhz) {
		return true;
	} else if (in_vrr->min_refresh_in_uhz != min_refresh_in_uhz) {
		return true;
	} else if (in_vrr->max_refresh_in_uhz != max_refresh_in_uhz) {
		return true;
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	}

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	return false;
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}

bool mod_freesync_get_vmin_vmax(struct mod_freesync *mod_freesync,
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		const struct dc_stream_state *stream,
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		unsigned int *vmin,
		unsigned int *vmax)
{
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	*vmin = stream->adjust.v_total_min;
	*vmax = stream->adjust.v_total_max;
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	return true;
}

bool mod_freesync_get_v_position(struct mod_freesync *mod_freesync,
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		struct dc_stream_state *stream,
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		unsigned int *nom_v_pos,
		unsigned int *v_pos)
{
	struct core_freesync *core_freesync = NULL;
	struct crtc_position position;

	if (mod_freesync == NULL)
		return false;

	core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);

558 559 560
	if (dc_stream_get_crtc_position(core_freesync->dc, &stream, 1,
					&position.vertical_count,
					&position.nominal_vcount)) {
561

562 563
		*nom_v_pos = position.nominal_vcount;
		*v_pos = position.vertical_count;
564 565 566 567 568 569 570

		return true;
	}

	return false;
}

571 572 573 574 575 576 577 578
static void build_vrr_infopacket_header_vtem(enum signal_type signal,
		struct dc_info_packet *infopacket)
{
	// HEADER

	// HB0, HB1, HB2 indicates PacketType VTEMPacket
	infopacket->hb0 = 0x7F;
	infopacket->hb1 = 0xC0;
579 580 581 582 583 584 585 586
	infopacket->hb2 = 0x00; //sequence_index

	setFieldWithMask(&infopacket->sb[VRR_VTEM_PB0], MASK__VRR_VTEM_PB0__VFR, 1);
	setFieldWithMask(&infopacket->sb[VRR_VTEM_PB2], MASK__VRR_VTEM_PB2__ORGANIZATION_ID, 1);
	setFieldWithMask(&infopacket->sb[VRR_VTEM_PB3], MASK__VRR_VTEM_PB3__DATA_SET_TAG_MSB, 0);
	setFieldWithMask(&infopacket->sb[VRR_VTEM_PB4], MASK__VRR_VTEM_PB4__DATA_SET_TAG_LSB, 1);
	setFieldWithMask(&infopacket->sb[VRR_VTEM_PB5], MASK__VRR_VTEM_PB5__DATA_SET_LENGTH_MSB, 0);
	setFieldWithMask(&infopacket->sb[VRR_VTEM_PB6], MASK__VRR_VTEM_PB6__DATA_SET_LENGTH_LSB, 4);
587 588
}

589 590 591
static void build_vrr_infopacket_header_v1(enum signal_type signal,
		struct dc_info_packet *infopacket,
		unsigned int *payload_size)
592
{
593
	if (dc_is_hdmi_signal(signal)) {
594

595
		/* HEADER */
596

597 598 599 600
		/* HB0  = Packet Type = 0x83 (Source Product
		 *	  Descriptor InfoFrame)
		 */
		infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD;
601

602 603
		/* HB1  = Version = 0x01 */
		infopacket->hb1 = 0x01;
604

605 606
		/* HB2  = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x08] */
		infopacket->hb2 = 0x08;
607

608
		*payload_size = 0x08;
609

610
	} else if (dc_is_dp_signal(signal)) {
611

612
		/* HEADER */
613

614 615 616 617
		/* HB0  = Secondary-data Packet ID = 0 - Only non-zero
		 *	  when used to associate audio related info packets
		 */
		infopacket->hb0 = 0x00;
618

619 620 621 622
		/* HB1  = Packet Type = 0x83 (Source Product
		 *	  Descriptor InfoFrame)
		 */
		infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD;
623

624 625 626 627
		/* HB2  = [Bits 7:0 = Least significant eight bits -
		 *	  For INFOFRAME, the value must be 1Bh]
		 */
		infopacket->hb2 = 0x1B;
628

629 630 631 632
		/* HB3  = [Bits 7:2 = INFOFRAME SDP Version Number = 0x1]
		 *	  [Bits 1:0 = Most significant two bits = 0x00]
		 */
		infopacket->hb3 = 0x04;
633

634
		*payload_size = 0x1B;
635
	}
636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657
}

static void build_vrr_infopacket_header_v2(enum signal_type signal,
		struct dc_info_packet *infopacket,
		unsigned int *payload_size)
{
	if (dc_is_hdmi_signal(signal)) {

		/* HEADER */

		/* HB0  = Packet Type = 0x83 (Source Product
		 *	  Descriptor InfoFrame)
		 */
		infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD;

		/* HB1  = Version = 0x02 */
		infopacket->hb1 = 0x02;

		/* HB2  = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x09] */
		infopacket->hb2 = 0x09;

		*payload_size = 0x0A;
658

659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686
	} else if (dc_is_dp_signal(signal)) {

		/* HEADER */

		/* HB0  = Secondary-data Packet ID = 0 - Only non-zero
		 *	  when used to associate audio related info packets
		 */
		infopacket->hb0 = 0x00;

		/* HB1  = Packet Type = 0x83 (Source Product
		 *	  Descriptor InfoFrame)
		 */
		infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD;

		/* HB2  = [Bits 7:0 = Least significant eight bits -
		 *	  For INFOFRAME, the value must be 1Bh]
		 */
		infopacket->hb2 = 0x1B;

		/* HB3  = [Bits 7:2 = INFOFRAME SDP Version Number = 0x2]
		 *	  [Bits 1:0 = Most significant two bits = 0x00]
		 */
		infopacket->hb3 = 0x08;

		*payload_size = 0x1B;
	}
}

687 688 689 690 691 692 693
static void build_vrr_vtem_infopacket_data(const struct dc_stream_state *stream,
		const struct mod_vrr_params *vrr,
		struct dc_info_packet *infopacket)
{
	unsigned int fieldRateInHz;

	if (vrr->state == VRR_STATE_ACTIVE_VARIABLE ||
694 695
				vrr->state == VRR_STATE_ACTIVE_FIXED) {
		setFieldWithMask(&infopacket->sb[VRR_VTEM_MD0], MASK__VRR_VTEM_MD0__VRR_EN, 1);
696
	} else {
697
		setFieldWithMask(&infopacket->sb[VRR_VTEM_MD0], MASK__VRR_VTEM_MD0__VRR_EN, 0);
698 699 700
	}

	if (!stream->timing.vic) {
701 702 703
		setFieldWithMask(&infopacket->sb[VRR_VTEM_MD1], MASK__VRR_VTEM_MD1__BASE_VFRONT,
				stream->timing.v_front_porch);

704 705 706 707 708

		/* TODO: In dal2, we check mode flags for a reduced blanking timing.
		 * Need a way to relay that information to this function.
		 * if("ReducedBlanking")
		 * {
709
		 *   setFieldWithMask(&infopacket->sb[VRR_VTEM_MD2], MASK__VRR_VTEM_MD2__RB, 1;
710 711
		 * }
		 */
712 713

		//TODO: DAL2 does FixPoint and rounding. Here we might need to account for that
714
		fieldRateInHz = (stream->timing.pix_clk_100hz * 100)/
715
			(stream->timing.h_total * stream->timing.v_total);
716

717 718 719 720
		setFieldWithMask(&infopacket->sb[VRR_VTEM_MD2],  MASK__VRR_VTEM_MD2__BASE_REFRESH_RATE_98,
				fieldRateInHz >> 8);
		setFieldWithMask(&infopacket->sb[VRR_VTEM_MD3], MASK__VRR_VTEM_MD3__BASE_REFRESH_RATE_07,
				fieldRateInHz);
721 722 723 724 725

	}
	infopacket->valid = true;
}

726 727 728
static void build_vrr_infopacket_data(const struct mod_vrr_params *vrr,
		struct dc_info_packet *infopacket)
{
729 730
	/* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */
	infopacket->sb[1] = 0x1A;
731

732 733
	/* PB2 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 1) */
	infopacket->sb[2] = 0x00;
734

735 736
	/* PB3 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 2) */
	infopacket->sb[3] = 0x00;
737

738
	/* PB4 = Reserved */
739

740
	/* PB5 = Reserved */
741

742
	/* PB6 = [Bits 7:3 = Reserved] */
743

744 745 746
	/* PB6 = [Bit 0 = FreeSync Supported] */
	if (vrr->state != VRR_STATE_UNSUPPORTED)
		infopacket->sb[6] |= 0x01;
747

748 749 750 751
	/* PB6 = [Bit 1 = FreeSync Enabled] */
	if (vrr->state != VRR_STATE_DISABLED &&
			vrr->state != VRR_STATE_UNSUPPORTED)
		infopacket->sb[6] |= 0x02;
752

753 754 755 756
	/* PB6 = [Bit 2 = FreeSync Active] */
	if (vrr->state == VRR_STATE_ACTIVE_VARIABLE ||
			vrr->state == VRR_STATE_ACTIVE_FIXED)
		infopacket->sb[6] |= 0x04;
757

758 759
	/* PB7 = FreeSync Minimum refresh rate (Hz) */
	infopacket->sb[7] = (unsigned char)(vrr->min_refresh_in_uhz / 1000000);
760

761 762 763 764
	/* PB8 = FreeSync Maximum refresh rate (Hz)
	 * Note: We should never go above the field rate of the mode timing set.
	 */
	infopacket->sb[8] = (unsigned char)(vrr->max_refresh_in_uhz / 1000000);
765 766


767 768 769 770 771 772 773 774
	//FreeSync HDR
	infopacket->sb[9] = 0;
	infopacket->sb[10] = 0;
}

static void build_vrr_infopacket_fs2_data(enum color_transfer_func app_tf,
		struct dc_info_packet *infopacket)
{
775
	if (app_tf != TRANSFER_FUNC_UNKNOWN) {
776 777 778 779
		infopacket->valid = true;

		infopacket->sb[6] |= 0x08;  // PB6 = [Bit 3 = Native Color Active]

780
		if (app_tf == TRANSFER_FUNC_GAMMA_22) {
781 782 783 784 785 786 787 788
			infopacket->sb[9] |= 0x04;  // PB6 = [Bit 2 = Gamma 2.2 EOTF Active]
		}
	}
}

static void build_vrr_infopacket_checksum(unsigned int *payload_size,
		struct dc_info_packet *infopacket)
{
789
	/* Calculate checksum */
790 791 792
	unsigned int idx = 0;
	unsigned char checksum = 0;

793 794 795 796
	checksum += infopacket->hb0;
	checksum += infopacket->hb1;
	checksum += infopacket->hb2;
	checksum += infopacket->hb3;
797

798
	for (idx = 1; idx <= *payload_size; idx++)
799
		checksum += infopacket->sb[idx];
800

801 802
	/* PB0 = Checksum (one byte complement) */
	infopacket->sb[0] = (unsigned char)(0x100 - checksum);
803

804 805
	infopacket->valid = true;
}
806

807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822
static void build_vrr_infopacket_v1(enum signal_type signal,
		const struct mod_vrr_params *vrr,
		struct dc_info_packet *infopacket)
{
	/* SPD info packet for FreeSync */
	unsigned int payload_size = 0;

	build_vrr_infopacket_header_v1(signal, infopacket, &payload_size);
	build_vrr_infopacket_data(vrr, infopacket);
	build_vrr_infopacket_checksum(&payload_size, infopacket);

	infopacket->valid = true;
}

static void build_vrr_infopacket_v2(enum signal_type signal,
		const struct mod_vrr_params *vrr,
823
		enum color_transfer_func app_tf,
824 825 826 827 828 829 830
		struct dc_info_packet *infopacket)
{
	unsigned int payload_size = 0;

	build_vrr_infopacket_header_v2(signal, infopacket, &payload_size);
	build_vrr_infopacket_data(vrr, infopacket);

831
	build_vrr_infopacket_fs2_data(app_tf, infopacket);
832 833 834 835 836 837

	build_vrr_infopacket_checksum(&payload_size, infopacket);

	infopacket->valid = true;
}

838 839 840 841 842 843
static void build_vrr_infopacket_vtem(const struct dc_stream_state *stream,
		const struct mod_vrr_params *vrr,
		struct dc_info_packet *infopacket)
{
	//VTEM info packet for HdmiVrr

844 845
	memset(infopacket, 0, sizeof(struct dc_info_packet));

846 847 848 849 850 851 852
	//VTEM Packet is structured differently
	build_vrr_infopacket_header_vtem(stream->signal, infopacket);
	build_vrr_vtem_infopacket_data(stream, vrr, infopacket);

	infopacket->valid = true;
}

853 854 855 856
void mod_freesync_build_vrr_infopacket(struct mod_freesync *mod_freesync,
		const struct dc_stream_state *stream,
		const struct mod_vrr_params *vrr,
		enum vrr_packet_type packet_type,
857
		enum color_transfer_func app_tf,
858 859
		struct dc_info_packet *infopacket)
{
860 861 862
	/* SPD info packet for FreeSync
	 * VTEM info packet for HdmiVRR
	 * Check if Freesync is supported. Return if false. If true,
863 864
	 * set the corresponding bit in the info packet
	 */
865
	if (!vrr->supported || (!vrr->send_info_frame && packet_type != PACKET_TYPE_VTEM))
866 867 868
		return;

	switch (packet_type) {
869
	case PACKET_TYPE_FS2:
870 871
		build_vrr_infopacket_v2(stream->signal, vrr, app_tf, infopacket);
		break;
872 873 874
	case PACKET_TYPE_VTEM:
		build_vrr_infopacket_vtem(stream, vrr, infopacket);
		break;
875 876
	case PACKET_TYPE_VRR:
	case PACKET_TYPE_FS1:
877 878 879 880 881
	default:
		build_vrr_infopacket_v1(stream->signal, vrr, infopacket);
	}
}

882 883 884 885 886 887 888 889 890 891
void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync,
		const struct dc_stream_state *stream,
		struct mod_freesync_config *in_config,
		struct mod_vrr_params *in_out_vrr)
{
	struct core_freesync *core_freesync = NULL;
	unsigned long long nominal_field_rate_in_uhz = 0;
	unsigned int refresh_range = 0;
	unsigned int min_refresh_in_uhz = 0;
	unsigned int max_refresh_in_uhz = 0;
892

893 894
	if (mod_freesync == NULL)
		return;
895

896
	core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
897

898
	/* Calculate nominal field rate for stream */
899 900
	nominal_field_rate_in_uhz =
			mod_freesync_calc_nominal_field_rate(stream);
901 902 903 904 905 906 907 908 909 910 911 912 913 914 915

	min_refresh_in_uhz = in_config->min_refresh_in_uhz;
	max_refresh_in_uhz = in_config->max_refresh_in_uhz;

	// Don't allow min > max
	if (min_refresh_in_uhz > max_refresh_in_uhz)
		min_refresh_in_uhz = max_refresh_in_uhz;

	// Full range may be larger than current video timing, so cap at nominal
	if (max_refresh_in_uhz > nominal_field_rate_in_uhz)
		max_refresh_in_uhz = nominal_field_rate_in_uhz;

	// Full range may be larger than current video timing, so cap at nominal
	if (min_refresh_in_uhz > nominal_field_rate_in_uhz)
		min_refresh_in_uhz = nominal_field_rate_in_uhz;
916

917 918 919 920
	if (!vrr_settings_require_update(core_freesync,
			in_config, min_refresh_in_uhz, max_refresh_in_uhz,
			in_out_vrr))
		return;
921

922
	in_out_vrr->state = in_config->state;
923
	in_out_vrr->send_info_frame = in_config->vsif_supported;
924

925
	if (in_config->state == VRR_STATE_UNSUPPORTED) {
926 927
		in_out_vrr->state = VRR_STATE_UNSUPPORTED;
		in_out_vrr->supported = false;
928 929 930 931 932
		in_out_vrr->adjust.v_total_min = stream->timing.v_total;
		in_out_vrr->adjust.v_total_max = stream->timing.v_total;

		return;

933 934 935 936 937
	} else {
		in_out_vrr->min_refresh_in_uhz = min_refresh_in_uhz;
		in_out_vrr->max_duration_in_us =
				calc_duration_in_us_from_refresh_in_uhz(
						min_refresh_in_uhz);
938

939 940 941 942
		in_out_vrr->max_refresh_in_uhz = max_refresh_in_uhz;
		in_out_vrr->min_duration_in_us =
				calc_duration_in_us_from_refresh_in_uhz(
						max_refresh_in_uhz);
943

944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984
		refresh_range = in_out_vrr->max_refresh_in_uhz -
				in_out_vrr->min_refresh_in_uhz;

		in_out_vrr->supported = true;
	}

	in_out_vrr->fixed.ramping_active = in_config->ramping;

	in_out_vrr->btr.btr_enabled = in_config->btr;
	if (in_out_vrr->max_refresh_in_uhz <
			2 * in_out_vrr->min_refresh_in_uhz)
		in_out_vrr->btr.btr_enabled = false;
	in_out_vrr->btr.btr_active = false;
	in_out_vrr->btr.inserted_duration_in_us = 0;
	in_out_vrr->btr.frames_to_insert = 0;
	in_out_vrr->btr.frame_counter = 0;
	in_out_vrr->btr.mid_point_in_us =
			in_out_vrr->min_duration_in_us +
				(in_out_vrr->max_duration_in_us -
				in_out_vrr->min_duration_in_us) / 2;

	if (in_out_vrr->state == VRR_STATE_UNSUPPORTED) {
		in_out_vrr->adjust.v_total_min = stream->timing.v_total;
		in_out_vrr->adjust.v_total_max = stream->timing.v_total;
	} else if (in_out_vrr->state == VRR_STATE_DISABLED) {
		in_out_vrr->adjust.v_total_min = stream->timing.v_total;
		in_out_vrr->adjust.v_total_max = stream->timing.v_total;
	} else if (in_out_vrr->state == VRR_STATE_INACTIVE) {
		in_out_vrr->adjust.v_total_min = stream->timing.v_total;
		in_out_vrr->adjust.v_total_max = stream->timing.v_total;
	} else if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE &&
			refresh_range >= MIN_REFRESH_RANGE_IN_US) {
		in_out_vrr->adjust.v_total_min =
			calc_v_total_from_refresh(stream,
				in_out_vrr->max_refresh_in_uhz);
		in_out_vrr->adjust.v_total_max =
			calc_v_total_from_refresh(stream,
				in_out_vrr->min_refresh_in_uhz);
	} else if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED) {
		in_out_vrr->fixed.target_refresh_in_uhz =
				in_out_vrr->min_refresh_in_uhz;
985 986 987 988 989
		if (in_out_vrr->fixed.ramping_active &&
				in_out_vrr->fixed.fixed_active) {
			/* Do not update vtotals if ramping is already active
			 * in order to continue ramp from current refresh.
			 */
990 991 992 993 994 995 996 997 998 999 1000 1001 1002
			in_out_vrr->fixed.fixed_active = true;
		} else {
			in_out_vrr->fixed.fixed_active = true;
			in_out_vrr->adjust.v_total_min =
				calc_v_total_from_refresh(stream,
					in_out_vrr->fixed.target_refresh_in_uhz);
			in_out_vrr->adjust.v_total_max =
				in_out_vrr->adjust.v_total_min;
		}
	} else {
		in_out_vrr->state = VRR_STATE_INACTIVE;
		in_out_vrr->adjust.v_total_min = stream->timing.v_total;
		in_out_vrr->adjust.v_total_max = stream->timing.v_total;
1003 1004 1005
	}
}

1006 1007 1008 1009 1010
void mod_freesync_handle_preflip(struct mod_freesync *mod_freesync,
		const struct dc_plane_state *plane,
		const struct dc_stream_state *stream,
		unsigned int curr_time_stamp_in_us,
		struct mod_vrr_params *in_out_vrr)
1011
{
1012 1013 1014
	struct core_freesync *core_freesync = NULL;
	unsigned int last_render_time_in_us = 0;
	unsigned int average_render_time_in_us = 0;
1015

1016
	if (mod_freesync == NULL)
1017 1018
		return;

1019
	core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1020

1021 1022 1023 1024
	if (in_out_vrr->supported &&
			in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE) {
		unsigned int i = 0;
		unsigned int oldest_index = plane->time.index + 1;
1025

1026 1027
		if (oldest_index >= DC_PLANE_UPDATE_TIMES_MAX)
			oldest_index = 0;
1028

1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054
		last_render_time_in_us = curr_time_stamp_in_us -
				plane->time.prev_update_time_in_us;

		// Sum off all entries except oldest one
		for (i = 0; i < DC_PLANE_UPDATE_TIMES_MAX; i++) {
			average_render_time_in_us +=
					plane->time.time_elapsed_in_us[i];
		}
		average_render_time_in_us -=
				plane->time.time_elapsed_in_us[oldest_index];

		// Add render time for current flip
		average_render_time_in_us += last_render_time_in_us;
		average_render_time_in_us /= DC_PLANE_UPDATE_TIMES_MAX;

		if (in_out_vrr->btr.btr_enabled) {
			apply_below_the_range(core_freesync,
					stream,
					last_render_time_in_us,
					in_out_vrr);
		} else {
			apply_fixed_refresh(core_freesync,
				stream,
				last_render_time_in_us,
				in_out_vrr);
		}
1055 1056 1057 1058

	}
}

1059 1060 1061
void mod_freesync_handle_v_update(struct mod_freesync *mod_freesync,
		const struct dc_stream_state *stream,
		struct mod_vrr_params *in_out_vrr)
1062
{
1063 1064
	struct core_freesync *core_freesync = NULL;

1065
	if ((mod_freesync == NULL) || (stream == NULL) || (in_out_vrr == NULL))
1066 1067 1068
		return;

	core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1069

1070 1071
	if (in_out_vrr->supported == false)
		return;
1072

1073
	/* Below the Range Logic */
1074

1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093
	/* Only execute if in fullscreen mode */
	if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE &&
					in_out_vrr->btr.btr_active) {
		/* TODO: pass in flag for Pre-DCE12 ASIC
		 * in order for frame variable duration to take affect,
		 * it needs to be done one VSYNC early, which is at
		 * frameCounter == 1.
		 * For DCE12 and newer updates to V_TOTAL_MIN/MAX
		 * will take affect on current frame
		 */
		if (in_out_vrr->btr.frames_to_insert ==
				in_out_vrr->btr.frame_counter) {
			in_out_vrr->adjust.v_total_min =
				calc_v_total_from_duration(stream,
				in_out_vrr,
				in_out_vrr->btr.inserted_duration_in_us);
			in_out_vrr->adjust.v_total_max =
				in_out_vrr->adjust.v_total_min;
		}
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		if (in_out_vrr->btr.frame_counter > 0)
			in_out_vrr->btr.frame_counter--;
1097

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		/* Restore FreeSync */
		if (in_out_vrr->btr.frame_counter == 0) {
			in_out_vrr->adjust.v_total_min =
				calc_v_total_from_refresh(stream,
				in_out_vrr->max_refresh_in_uhz);
			in_out_vrr->adjust.v_total_max =
				calc_v_total_from_refresh(stream,
				in_out_vrr->min_refresh_in_uhz);
1106
		}
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	}

	/* If in fullscreen freesync mode or in video, do not program
	 * static screen ramp values
	 */
	if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE)
		in_out_vrr->fixed.ramping_active = false;
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	/* Gradual Static Screen Ramping Logic */
	/* Execute if ramp is active and user enabled freesync static screen*/
	if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED &&
				in_out_vrr->fixed.ramping_active) {
		update_v_total_for_static_ramp(
				core_freesync, stream, in_out_vrr);
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	}
}
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void mod_freesync_get_settings(struct mod_freesync *mod_freesync,
1125
		const struct mod_vrr_params *vrr,
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		unsigned int *v_total_min, unsigned int *v_total_max,
		unsigned int *event_triggers,
		unsigned int *window_min, unsigned int *window_max,
		unsigned int *lfc_mid_point_in_us,
		unsigned int *inserted_frames,
		unsigned int *inserted_duration_in_us)
{
	struct core_freesync *core_freesync = NULL;

	if (mod_freesync == NULL)
		return;

	core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);

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	if (vrr->supported) {
		*v_total_min = vrr->adjust.v_total_min;
		*v_total_max = vrr->adjust.v_total_max;
		*event_triggers = 0;
		*lfc_mid_point_in_us = vrr->btr.mid_point_in_us;
		*inserted_frames = vrr->btr.frames_to_insert;
		*inserted_duration_in_us = vrr->btr.inserted_duration_in_us;
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	}
}

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unsigned long long mod_freesync_calc_nominal_field_rate(
			const struct dc_stream_state *stream)
{
	unsigned long long nominal_field_rate_in_uhz = 0;

	/* Calculate nominal field rate for stream */
1156
	nominal_field_rate_in_uhz = stream->timing.pix_clk_100hz / 10;
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	nominal_field_rate_in_uhz *= 1000ULL * 1000ULL * 1000ULL;
	nominal_field_rate_in_uhz = div_u64(nominal_field_rate_in_uhz,
						stream->timing.h_total);
	nominal_field_rate_in_uhz = div_u64(nominal_field_rate_in_uhz,
						stream->timing.v_total);

	return nominal_field_rate_in_uhz;
}

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bool mod_freesync_is_valid_range(struct mod_freesync *mod_freesync,
		const struct dc_stream_state *stream,
		uint32_t min_refresh_cap_in_uhz,
		uint32_t max_refresh_cap_in_uhz,
		uint32_t min_refresh_request_in_uhz,
		uint32_t max_refresh_request_in_uhz)
{
	/* Calculate nominal field rate for stream */
	unsigned long long nominal_field_rate_in_uhz =
1175
			mod_freesync_calc_nominal_field_rate(stream);
1176

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	/* Typically nominal refresh calculated can have some fractional part.
	 * Allow for some rounding error of actual video timing by taking floor
	 * of caps and request. Round the nominal refresh rate.
	 *
	 * Dividing will convert everything to units in Hz although input
	 * variable name is in uHz!
	 *
	 * Also note, this takes care of rounding error on the nominal refresh
	 * so by rounding error we only expect it to be off by a small amount,
	 * such as < 0.1 Hz. i.e. 143.9xxx or 144.1xxx.
	 *
	 * Example 1. Caps    Min = 40 Hz, Max = 144 Hz
	 *            Request Min = 40 Hz, Max = 144 Hz
	 *                    Nominal = 143.5x Hz rounded to 144 Hz
	 *            This function should allow this as valid request
	 *
	 * Example 2. Caps    Min = 40 Hz, Max = 144 Hz
	 *            Request Min = 40 Hz, Max = 144 Hz
	 *                    Nominal = 144.4x Hz rounded to 144 Hz
	 *            This function should allow this as valid request
	 *
	 * Example 3. Caps    Min = 40 Hz, Max = 144 Hz
	 *            Request Min = 40 Hz, Max = 144 Hz
	 *                    Nominal = 120.xx Hz rounded to 120 Hz
	 *            This function should return NOT valid since the requested
	 *            max is greater than current timing's nominal
	 *
	 * Example 4. Caps    Min = 40 Hz, Max = 120 Hz
	 *            Request Min = 40 Hz, Max = 120 Hz
	 *                    Nominal = 144.xx Hz rounded to 144 Hz
	 *            This function should return NOT valid since the nominal
	 *            is greater than the capability's max refresh
1209
	 */
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	nominal_field_rate_in_uhz =
			div_u64(nominal_field_rate_in_uhz + 500000, 1000000);
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	min_refresh_cap_in_uhz /= 1000000;
	max_refresh_cap_in_uhz /= 1000000;
	min_refresh_request_in_uhz /= 1000000;
	max_refresh_request_in_uhz /= 1000000;

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	// Check nominal is within range
	if (nominal_field_rate_in_uhz > max_refresh_cap_in_uhz ||
		nominal_field_rate_in_uhz < min_refresh_cap_in_uhz)
		return false;

	// If nominal is less than max, limit the max allowed refresh rate
	if (nominal_field_rate_in_uhz < max_refresh_cap_in_uhz)
		max_refresh_cap_in_uhz = nominal_field_rate_in_uhz;

	// Don't allow min > max
	if (min_refresh_request_in_uhz > max_refresh_request_in_uhz)
		return false;

	// Check min is within range
	if (min_refresh_request_in_uhz > max_refresh_cap_in_uhz ||
		min_refresh_request_in_uhz < min_refresh_cap_in_uhz)
		return false;

	// Check max is within range
	if (max_refresh_request_in_uhz > max_refresh_cap_in_uhz ||
		max_refresh_request_in_uhz < min_refresh_cap_in_uhz)
		return false;

	// For variable range, check for at least 10 Hz range
	if ((max_refresh_request_in_uhz != min_refresh_request_in_uhz) &&
1242
		(max_refresh_request_in_uhz - min_refresh_request_in_uhz < 10))
1243 1244 1245 1246 1247
		return false;

	return true;
}