intel_panel.c 69.0 KB
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/*
 * Copyright © 2006-2010 Intel Corporation
 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Eric Anholt <eric@anholt.net>
 *      Dave Airlie <airlied@linux.ie>
 *      Jesse Barnes <jesse.barnes@intel.com>
 *      Chris Wilson <chris@chris-wilson.co.uk>
 */

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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

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#include <linux/kernel.h>
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#include <linux/moduleparam.h>
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#include <linux/pwm.h>
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#include "intel_connector.h"
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#include "intel_display_types.h"
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#include "intel_dp_aux_backlight.h"
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#include "intel_dsi_dcs_backlight.h"
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#include "intel_panel.h"
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void
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intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
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		       struct drm_display_mode *adjusted_mode)
{
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	drm_mode_copy(adjusted_mode, fixed_mode);
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	drm_mode_set_crtcinfo(adjusted_mode, 0);
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}

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static bool is_downclock_mode(const struct drm_display_mode *downclock_mode,
			      const struct drm_display_mode *fixed_mode)
{
	return drm_mode_match(downclock_mode, fixed_mode,
			      DRM_MODE_MATCH_TIMINGS |
			      DRM_MODE_MATCH_FLAGS |
			      DRM_MODE_MATCH_3D_FLAGS) &&
		downclock_mode->clock < fixed_mode->clock;
}

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struct drm_display_mode *
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intel_panel_edid_downclock_mode(struct intel_connector *connector,
				const struct drm_display_mode *fixed_mode)
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{
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	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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	const struct drm_display_mode *scan, *best_mode = NULL;
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	struct drm_display_mode *downclock_mode;
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	int best_clock = fixed_mode->clock;
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	list_for_each_entry(scan, &connector->base.probed_modes, head) {
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		/*
		 * If one mode has the same resolution with the fixed_panel
		 * mode while they have the different refresh rate, it means
		 * that the reduced downclock is found. In such
		 * case we can set the different FPx0/1 to dynamically select
		 * between low and high frequency.
		 */
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		if (is_downclock_mode(scan, fixed_mode) &&
		    scan->clock < best_clock) {
			/*
			 * The downclock is already found. But we
			 * expect to find the lower downclock.
			 */
			best_clock = scan->clock;
			best_mode = scan;
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		}
	}

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	if (!best_mode)
		return NULL;

	downclock_mode = drm_mode_duplicate(&dev_priv->drm, best_mode);
	if (!downclock_mode)
		return NULL;

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	drm_dbg_kms(&dev_priv->drm,
		    "[CONNECTOR:%d:%s] using downclock mode from EDID: ",
		    connector->base.base.id, connector->base.name);
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	drm_mode_debug_printmodeline(downclock_mode);
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	return downclock_mode;
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}

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struct drm_display_mode *
intel_panel_edid_fixed_mode(struct intel_connector *connector)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	const struct drm_display_mode *scan;
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	struct drm_display_mode *fixed_mode;

	if (list_empty(&connector->base.probed_modes))
		return NULL;
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	/* prefer fixed mode from EDID if available */
	list_for_each_entry(scan, &connector->base.probed_modes, head) {
		if ((scan->type & DRM_MODE_TYPE_PREFERRED) == 0)
			continue;

		fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan);
		if (!fixed_mode)
			return NULL;

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		drm_dbg_kms(&dev_priv->drm,
			    "[CONNECTOR:%d:%s] using preferred mode from EDID: ",
			    connector->base.base.id, connector->base.name);
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		drm_mode_debug_printmodeline(fixed_mode);

		return fixed_mode;
	}

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	scan = list_first_entry(&connector->base.probed_modes,
				typeof(*scan), head);

	fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan);
	if (!fixed_mode)
		return NULL;

	fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;

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	drm_dbg_kms(&dev_priv->drm,
		    "[CONNECTOR:%d:%s] using first mode from EDID: ",
		    connector->base.base.id, connector->base.name);
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	drm_mode_debug_printmodeline(fixed_mode);

	return fixed_mode;
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}

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struct drm_display_mode *
intel_panel_vbt_fixed_mode(struct intel_connector *connector)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct drm_display_info *info = &connector->base.display_info;
	struct drm_display_mode *fixed_mode;

	if (!dev_priv->vbt.lfp_lvds_vbt_mode)
		return NULL;

	fixed_mode = drm_mode_duplicate(&dev_priv->drm,
					dev_priv->vbt.lfp_lvds_vbt_mode);
	if (!fixed_mode)
		return NULL;

	fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;

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	drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s] using mode from VBT: ",
		    connector->base.base.id, connector->base.name);
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	drm_mode_debug_printmodeline(fixed_mode);

	info->width_mm = fixed_mode->width_mm;
	info->height_mm = fixed_mode->height_mm;

	return fixed_mode;
}

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/* adjusted_mode has been preset to be the panel's fixed mode */
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int intel_pch_panel_fitting(struct intel_crtc_state *crtc_state,
			    const struct drm_connector_state *conn_state)
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{
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	const struct drm_display_mode *adjusted_mode =
		&crtc_state->hw.adjusted_mode;
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	int x, y, width, height;
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	/* Native modes don't need fitting */
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	if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w &&
	    adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h &&
	    crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
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		return 0;
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	switch (conn_state->scaling_mode) {
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	case DRM_MODE_SCALE_CENTER:
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		width = crtc_state->pipe_src_w;
		height = crtc_state->pipe_src_h;
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		x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
		y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
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		break;

	case DRM_MODE_SCALE_ASPECT:
		/* Scale but preserve the aspect ratio */
		{
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			u32 scaled_width = adjusted_mode->crtc_hdisplay
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				* crtc_state->pipe_src_h;
			u32 scaled_height = crtc_state->pipe_src_w
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				* adjusted_mode->crtc_vdisplay;
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			if (scaled_width > scaled_height) { /* pillar */
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				width = scaled_height / crtc_state->pipe_src_h;
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				if (width & 1)
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					width++;
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				x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
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				y = 0;
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				height = adjusted_mode->crtc_vdisplay;
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			} else if (scaled_width < scaled_height) { /* letter */
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				height = scaled_width / crtc_state->pipe_src_w;
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				if (height & 1)
				    height++;
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				y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
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				x = 0;
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				width = adjusted_mode->crtc_hdisplay;
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			} else {
				x = y = 0;
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				width = adjusted_mode->crtc_hdisplay;
				height = adjusted_mode->crtc_vdisplay;
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			}
		}
		break;

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	case DRM_MODE_SCALE_NONE:
		WARN_ON(adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w);
		WARN_ON(adjusted_mode->crtc_vdisplay != crtc_state->pipe_src_h);
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		fallthrough;
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	case DRM_MODE_SCALE_FULLSCREEN:
		x = y = 0;
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		width = adjusted_mode->crtc_hdisplay;
		height = adjusted_mode->crtc_vdisplay;
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		break;
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	default:
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		MISSING_CASE(conn_state->scaling_mode);
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		return -EINVAL;
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	}

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	drm_rect_init(&crtc_state->pch_pfit.dst,
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		      x, y, width, height);
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	crtc_state->pch_pfit.enabled = true;
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	return 0;
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}
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static void
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centre_horizontally(struct drm_display_mode *adjusted_mode,
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		    int width)
{
	u32 border, sync_pos, blank_width, sync_width;

	/* keep the hsync and hblank widths constant */
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	sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
	blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
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	sync_pos = (blank_width - sync_width + 1) / 2;

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	border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
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	border += border & 1; /* make the border even */

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	adjusted_mode->crtc_hdisplay = width;
	adjusted_mode->crtc_hblank_start = width + border;
	adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
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	adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
	adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
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}

static void
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centre_vertically(struct drm_display_mode *adjusted_mode,
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		  int height)
{
	u32 border, sync_pos, blank_width, sync_width;

	/* keep the vsync and vblank widths constant */
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	sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
	blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
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	sync_pos = (blank_width - sync_width + 1) / 2;

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	border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
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	adjusted_mode->crtc_vdisplay = height;
	adjusted_mode->crtc_vblank_start = height + border;
	adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
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	adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
	adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
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}

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static u32 panel_fitter_scaling(u32 source, u32 target)
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{
	/*
	 * Floating point operation is not supported. So the FACTOR
	 * is defined, which can avoid the floating point computation
	 * when calculating the panel ratio.
	 */
#define ACCURACY 12
#define FACTOR (1 << ACCURACY)
	u32 ratio = source * FACTOR / target;
	return (FACTOR * ratio + FACTOR/2) / FACTOR;
}

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static void i965_scale_aspect(struct intel_crtc_state *crtc_state,
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			      u32 *pfit_control)
{
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	const struct drm_display_mode *adjusted_mode =
		&crtc_state->hw.adjusted_mode;
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	u32 scaled_width = adjusted_mode->crtc_hdisplay *
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		crtc_state->pipe_src_h;
	u32 scaled_height = crtc_state->pipe_src_w *
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		adjusted_mode->crtc_vdisplay;
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	/* 965+ is easy, it does everything in hw */
	if (scaled_width > scaled_height)
		*pfit_control |= PFIT_ENABLE |
			PFIT_SCALING_PILLAR;
	else if (scaled_width < scaled_height)
		*pfit_control |= PFIT_ENABLE |
			PFIT_SCALING_LETTER;
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	else if (adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w)
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		*pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
}

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static void i9xx_scale_aspect(struct intel_crtc_state *crtc_state,
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			      u32 *pfit_control, u32 *pfit_pgm_ratios,
			      u32 *border)
{
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	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
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	u32 scaled_width = adjusted_mode->crtc_hdisplay *
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		crtc_state->pipe_src_h;
	u32 scaled_height = crtc_state->pipe_src_w *
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		adjusted_mode->crtc_vdisplay;
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	u32 bits;

	/*
	 * For earlier chips we have to calculate the scaling
	 * ratio by hand and program it into the
	 * PFIT_PGM_RATIO register
	 */
	if (scaled_width > scaled_height) { /* pillar */
		centre_horizontally(adjusted_mode,
				    scaled_height /
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				    crtc_state->pipe_src_h);
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		*border = LVDS_BORDER_ENABLE;
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		if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay) {
			bits = panel_fitter_scaling(crtc_state->pipe_src_h,
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						    adjusted_mode->crtc_vdisplay);
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			*pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
					     bits << PFIT_VERT_SCALE_SHIFT);
			*pfit_control |= (PFIT_ENABLE |
					  VERT_INTERP_BILINEAR |
					  HORIZ_INTERP_BILINEAR);
		}
	} else if (scaled_width < scaled_height) { /* letter */
		centre_vertically(adjusted_mode,
				  scaled_width /
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				  crtc_state->pipe_src_w);
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		*border = LVDS_BORDER_ENABLE;
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		if (crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) {
			bits = panel_fitter_scaling(crtc_state->pipe_src_w,
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						    adjusted_mode->crtc_hdisplay);
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			*pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
					     bits << PFIT_VERT_SCALE_SHIFT);
			*pfit_control |= (PFIT_ENABLE |
					  VERT_INTERP_BILINEAR |
					  HORIZ_INTERP_BILINEAR);
		}
	} else {
		/* Aspects match, Let hw scale both directions */
		*pfit_control |= (PFIT_ENABLE |
				  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
				  VERT_INTERP_BILINEAR |
				  HORIZ_INTERP_BILINEAR);
	}
}

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int intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state,
			     const struct drm_connector_state *conn_state)
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{
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	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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	u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
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	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
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	/* Native modes don't need fitting */
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	if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w &&
	    adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h)
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		goto out;

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	switch (conn_state->scaling_mode) {
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	case DRM_MODE_SCALE_CENTER:
		/*
		 * For centered modes, we have to calculate border widths &
		 * heights and modify the values programmed into the CRTC.
		 */
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		centre_horizontally(adjusted_mode, crtc_state->pipe_src_w);
		centre_vertically(adjusted_mode, crtc_state->pipe_src_h);
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		border = LVDS_BORDER_ENABLE;
		break;
	case DRM_MODE_SCALE_ASPECT:
		/* Scale but preserve the aspect ratio */
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		if (DISPLAY_VER(dev_priv) >= 4)
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			i965_scale_aspect(crtc_state, &pfit_control);
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		else
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			i9xx_scale_aspect(crtc_state, &pfit_control,
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					  &pfit_pgm_ratios, &border);
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		break;
	case DRM_MODE_SCALE_FULLSCREEN:
		/*
		 * Full scaling, even if it changes the aspect ratio.
		 * Fortunately this is all done for us in hw.
		 */
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		if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay ||
		    crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) {
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			pfit_control |= PFIT_ENABLE;
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			if (DISPLAY_VER(dev_priv) >= 4)
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				pfit_control |= PFIT_SCALING_AUTO;
			else
				pfit_control |= (VERT_AUTO_SCALE |
						 VERT_INTERP_BILINEAR |
						 HORIZ_AUTO_SCALE |
						 HORIZ_INTERP_BILINEAR);
		}
		break;
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	default:
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		MISSING_CASE(conn_state->scaling_mode);
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		return -EINVAL;
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	}

	/* 965+ wants fuzzy fitting */
	/* FIXME: handle multiple panels by failing gracefully */
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	if (DISPLAY_VER(dev_priv) >= 4)
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		pfit_control |= PFIT_PIPE(crtc->pipe) | PFIT_FILTER_FUZZY;
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out:
	if ((pfit_control & PFIT_ENABLE) == 0) {
		pfit_control = 0;
		pfit_pgm_ratios = 0;
	}

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	/* Make sure pre-965 set dither correctly for 18bpp panels. */
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	if (DISPLAY_VER(dev_priv) < 4 && crtc_state->pipe_bpp == 18)
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		pfit_control |= PANEL_8TO6_DITHER_ENABLE;

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	crtc_state->gmch_pfit.control = pfit_control;
	crtc_state->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
	crtc_state->gmch_pfit.lvds_border_bits = border;
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	return 0;
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}

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/**
 * scale - scale values from one range to another
 * @source_val: value in range [@source_min..@source_max]
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 * @source_min: minimum legal value for @source_val
 * @source_max: maximum legal value for @source_val
 * @target_min: corresponding target value for @source_min
 * @target_max: corresponding target value for @source_max
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 *
 * Return @source_val in range [@source_min..@source_max] scaled to range
 * [@target_min..@target_max].
 */
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static u32 scale(u32 source_val,
		 u32 source_min, u32 source_max,
		 u32 target_min, u32 target_max)
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{
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	u64 target_val;
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	WARN_ON(source_min > source_max);
	WARN_ON(target_min > target_max);

	/* defensive */
	source_val = clamp(source_val, source_min, source_max);

	/* avoid overflows */
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	target_val = mul_u32_u32(source_val - source_min,
				 target_max - target_min);
	target_val = DIV_ROUND_CLOSEST_ULL(target_val, source_max - source_min);
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	target_val += target_min;

	return target_val;
}

/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
 * to [hw_min..hw_max]. */
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static u32 clamp_user_to_hw(struct intel_connector *connector,
			    u32 user_level, u32 user_max)
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{
	struct intel_panel *panel = &connector->panel;
	u32 hw_level;

	hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
	hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);

	return hw_level;
}

/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
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static u32 scale_hw_to_user(struct intel_connector *connector,
			    u32 hw_level, u32 user_max)
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{
	struct intel_panel *panel = &connector->panel;

	return scale(hw_level, panel->backlight.min, panel->backlight.max,
		     0, user_max);
}

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u32 intel_panel_invert_pwm_level(struct intel_connector *connector, u32 val)
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{
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	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
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	struct intel_panel *panel = &connector->panel;

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	drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0);
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	if (dev_priv->params.invert_brightness < 0)
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		return val;

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	if (dev_priv->params.invert_brightness > 0 ||
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	    dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
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		return panel->backlight.pwm_level_max - val + panel->backlight.pwm_level_min;
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	}
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	return val;
}

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void intel_panel_set_pwm_level(const struct drm_connector_state *conn_state, u32 val)
{
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
	struct drm_i915_private *i915 = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;

	drm_dbg_kms(&i915->drm, "set backlight PWM = %d\n", val);
	panel->backlight.pwm_funcs->set(conn_state, val);
}

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u32 intel_panel_backlight_level_to_pwm(struct intel_connector *connector, u32 val)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;

	drm_WARN_ON_ONCE(&dev_priv->drm,
			 panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0);

	val = scale(val, panel->backlight.min, panel->backlight.max,
		    panel->backlight.pwm_level_min, panel->backlight.pwm_level_max);

	return intel_panel_invert_pwm_level(connector, val);
}

u32 intel_panel_backlight_level_from_pwm(struct intel_connector *connector, u32 val)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;

	drm_WARN_ON_ONCE(&dev_priv->drm,
			 panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0);

	if (dev_priv->params.invert_brightness > 0 ||
	    (dev_priv->params.invert_brightness == 0 && dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS))
		val = panel->backlight.pwm_level_max - (val - panel->backlight.pwm_level_min);

	return scale(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max,
		     panel->backlight.min, panel->backlight.max);
}

572
static u32 lpt_get_backlight(struct intel_connector *connector, enum pipe unused)
573
{
574
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
575

576
	return intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
577
}
578

579
static u32 pch_get_backlight(struct intel_connector *connector, enum pipe unused)
580
{
581
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
582

583
	return intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
584
}
585

586
static u32 i9xx_get_backlight(struct intel_connector *connector, enum pipe unused)
587
{
588
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
589
	struct intel_panel *panel = &connector->panel;
590
	u32 val;
591

592
	val = intel_de_read(dev_priv, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
593
	if (DISPLAY_VER(dev_priv) < 4)
594
		val >>= 1;
595

596
	if (panel->backlight.combination_mode) {
597
		u8 lbpc;
598

599
		pci_read_config_byte(to_pci_dev(dev_priv->drm.dev), LBPC, &lbpc);
600
		val *= lbpc;
601 602
	}

603 604 605
	return val;
}

606
static u32 vlv_get_backlight(struct intel_connector *connector, enum pipe pipe)
607
{
608 609
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);

610
	if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B))
611 612
		return 0;

613
	return intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
614 615
}

616
static u32 bxt_get_backlight(struct intel_connector *connector, enum pipe unused)
617
{
618
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
619
	struct intel_panel *panel = &connector->panel;
620

621 622
	return intel_de_read(dev_priv,
			     BXT_BLC_PWM_DUTY(panel->backlight.controller));
623 624
}

625
static u32 ext_pwm_get_backlight(struct intel_connector *connector, enum pipe unused)
626 627
{
	struct intel_panel *panel = &connector->panel;
628
	struct pwm_state state;
629

630 631
	pwm_get_state(panel->backlight.pwm, &state);
	return pwm_get_relative_duty_cycle(&state, 100);
632 633
}

634
static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
635
{
636
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
637
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
638

639 640
	u32 val = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, val | level);
641 642
}

643
static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level)
644
{
645
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
646
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
647 648
	u32 tmp;

649 650
	tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
	intel_de_write(dev_priv, BLC_PWM_CPU_CTL, tmp | level);
651 652
}

653
static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level)
654
{
655
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
656
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
657
	struct intel_panel *panel = &connector->panel;
658
	u32 tmp, mask;
659

660
	drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0);
661

662
	if (panel->backlight.combination_mode) {
663 664
		u8 lbpc;

665
		lbpc = level * 0xfe / panel->backlight.pwm_level_max + 1;
666
		level /= lbpc;
667
		pci_write_config_byte(to_pci_dev(dev_priv->drm.dev), LBPC, lbpc);
668 669
	}

670
	if (IS_DISPLAY_VER(dev_priv, 4)) {
671 672
		mask = BACKLIGHT_DUTY_CYCLE_MASK;
	} else {
673
		level <<= 1;
674 675
		mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
	}
676

677 678
	tmp = intel_de_read(dev_priv, BLC_PWM_CTL) & ~mask;
	intel_de_write(dev_priv, BLC_PWM_CTL, tmp | level);
679 680
}

681
static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level)
682
{
683
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
684
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
685
	enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
686 687
	u32 tmp;

688 689
	tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
	intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), tmp | level);
690 691
}

692
static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
693
{
694
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
695
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
696
	struct intel_panel *panel = &connector->panel;
697

698 699
	intel_de_write(dev_priv,
		       BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
700 701
}

702
static void ext_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level)
703
{
704
	struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel;
705

706 707
	pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100);
	pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state);
708 709
}

710
static void
711
intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level)
712
{
713
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
714
	struct drm_i915_private *i915 = to_i915(connector->base.dev);
715
	struct intel_panel *panel = &connector->panel;
716

717
	drm_dbg_kms(&i915->drm, "set backlight level = %d\n", level);
718

719
	panel->backlight.funcs->set(conn_state, level);
720
}
721

722 723 724
/* set backlight brightness to level in range [0..max], assuming hw min is
 * respected.
 */
725
void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
726 727
				    u32 user_level, u32 user_max)
{
728
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
729
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
730 731 732
	struct intel_panel *panel = &connector->panel;
	u32 hw_level;

733
	/*
734
	 * Lack of crtc may occur during driver init because
735 736 737 738
	 * connection_mutex isn't held across the entire backlight
	 * setup + modeset readout, and the BIOS can issue the
	 * requests at any time.
	 */
739
	if (!panel->backlight.present || !conn_state->crtc)
740 741
		return;

742
	mutex_lock(&dev_priv->backlight_lock);
743

744
	drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
745 746 747

	hw_level = clamp_user_to_hw(connector, user_level, user_max);
	panel->backlight.level = hw_level;
748

749
	if (panel->backlight.device)
750 751 752 753
		panel->backlight.device->props.brightness =
			scale_hw_to_user(connector,
					 panel->backlight.level,
					 panel->backlight.device->props.max_brightness);
754

755
	if (panel->backlight.enabled)
756
		intel_panel_actually_set_backlight(conn_state, hw_level);
757

758
	mutex_unlock(&dev_priv->backlight_lock);
759 760
}

761
static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level)
762
{
763
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
764
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
765 766
	u32 tmp;

767
	intel_panel_set_pwm_level(old_conn_state, level);
768

769 770 771 772 773 774 775 776
	/*
	 * Although we don't support or enable CPU PWM with LPT/SPT based
	 * systems, it may have been enabled prior to loading the
	 * driver. Disable to avoid warnings on LCPLL disable.
	 *
	 * This needs rework if we need to add support for CPU PWM on PCH split
	 * platforms.
	 */
777
	tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
778
	if (tmp & BLM_PWM_ENABLE) {
779 780
		drm_dbg_kms(&dev_priv->drm,
			    "cpu backlight was enabled, disabling\n");
781 782
		intel_de_write(dev_priv, BLC_PWM_CPU_CTL2,
			       tmp & ~BLM_PWM_ENABLE);
783 784
	}

785 786
	tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
787 788
}

789
static void pch_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
790
{
791
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
792
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
793 794
	u32 tmp;

795
	intel_panel_set_pwm_level(old_conn_state, val);
796

797 798
	tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
	intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
799

800 801
	tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
802 803
}

804
static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
805
{
806
	intel_panel_set_pwm_level(old_conn_state, val);
807 808
}

809
static void i965_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
810
{
811
	struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev);
812 813
	u32 tmp;

814
	intel_panel_set_pwm_level(old_conn_state, val);
815

816 817
	tmp = intel_de_read(dev_priv, BLC_PWM_CTL2);
	intel_de_write(dev_priv, BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
818 819
}

820
static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
821
{
822
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
823
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
824
	enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe;
825 826
	u32 tmp;

827
	intel_panel_set_pwm_level(old_conn_state, val);
828

829 830 831
	tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
	intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe),
		       tmp & ~BLM_PWM_ENABLE);
832 833
}

834
static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
835
{
836
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
837
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
838
	struct intel_panel *panel = &connector->panel;
839
	u32 tmp;
840

841
	intel_panel_set_pwm_level(old_conn_state, val);
842

843 844 845 846
	tmp = intel_de_read(dev_priv,
			    BXT_BLC_PWM_CTL(panel->backlight.controller));
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       tmp & ~BXT_BLC_PWM_ENABLE);
847 848

	if (panel->backlight.controller == 1) {
849
		val = intel_de_read(dev_priv, UTIL_PIN_CTL);
850
		val &= ~UTIL_PIN_ENABLE;
851
		intel_de_write(dev_priv, UTIL_PIN_CTL, val);
852
	}
853 854
}

855
static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val)
856
{
857
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
858 859 860 861
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 tmp;

862
	intel_panel_set_pwm_level(old_conn_state, val);
863

864 865 866 867
	tmp = intel_de_read(dev_priv,
			    BXT_BLC_PWM_CTL(panel->backlight.controller));
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       tmp & ~BXT_BLC_PWM_ENABLE);
868 869
}

870
static void ext_pwm_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level)
871
{
872
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
873 874
	struct intel_panel *panel = &connector->panel;

875 876
	panel->backlight.pwm_state.enabled = false;
	pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state);
877 878
}

879
void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state)
880
{
881
	struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
882
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
883
	struct intel_panel *panel = &connector->panel;
884

885
	if (!panel->backlight.present)
886 887
		return;

888
	/*
889
	 * Do not disable backlight on the vga_switcheroo path. When switching
890 891 892 893
	 * away from i915, the other client may depend on i915 to handle the
	 * backlight. This will leave the backlight on unnecessarily when
	 * another client is not activated.
	 */
894
	if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) {
895 896
		drm_dbg_kms(&dev_priv->drm,
			    "Skipping backlight disable on vga switch\n");
897 898 899
		return;
	}

900
	mutex_lock(&dev_priv->backlight_lock);
901

902 903
	if (panel->backlight.device)
		panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
904
	panel->backlight.enabled = false;
905
	panel->backlight.funcs->disable(old_conn_state, 0);
906

907
	mutex_unlock(&dev_priv->backlight_lock);
908
}
909

910
static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,
911
				 const struct drm_connector_state *conn_state, u32 level)
912
{
913
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
914
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
915
	struct intel_panel *panel = &connector->panel;
916
	u32 pch_ctl1, pch_ctl2, schicken;
917

918
	pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
919
	if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
920
		drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n");
921
		pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
922
		intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1);
923
	}
924

925
	if (HAS_PCH_LPT(dev_priv)) {
926
		schicken = intel_de_read(dev_priv, SOUTH_CHICKEN2);
927 928 929 930
		if (panel->backlight.alternate_pwm_increment)
			schicken |= LPT_PWM_GRANULARITY;
		else
			schicken &= ~LPT_PWM_GRANULARITY;
931
		intel_de_write(dev_priv, SOUTH_CHICKEN2, schicken);
932
	} else {
933
		schicken = intel_de_read(dev_priv, SOUTH_CHICKEN1);
934 935 936 937
		if (panel->backlight.alternate_pwm_increment)
			schicken |= SPT_PWM_GRANULARITY;
		else
			schicken &= ~SPT_PWM_GRANULARITY;
938
		intel_de_write(dev_priv, SOUTH_CHICKEN1, schicken);
939 940
	}

941
	pch_ctl2 = panel->backlight.pwm_level_max << 16;
942
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2);
943

944 945 946
	pch_ctl1 = 0;
	if (panel->backlight.active_low_pwm)
		pch_ctl1 |= BLM_PCH_POLARITY;
947

948 949 950
	/* After LPT, override is the default. */
	if (HAS_PCH_LPT(dev_priv))
		pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
951

952 953 954 955
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1);
	intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1);
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1,
		       pch_ctl1 | BLM_PCH_PWM_ENABLE);
956 957

	/* This won't stick until the above enable. */
958
	intel_panel_set_pwm_level(conn_state, level);
959 960
}

961
static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
962
				 const struct drm_connector_state *conn_state, u32 level)
963
{
964
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
965
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
966
	struct intel_panel *panel = &connector->panel;
967
	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
968
	u32 cpu_ctl2, pch_ctl1, pch_ctl2;
969

970
	cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
971
	if (cpu_ctl2 & BLM_PWM_ENABLE) {
972
		drm_dbg_kms(&dev_priv->drm, "cpu backlight already enabled\n");
973
		cpu_ctl2 &= ~BLM_PWM_ENABLE;
974
		intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2);
975
	}
976

977
	pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
978
	if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
979
		drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n");
980
		pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
981
		intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1);
982
	}
983 984

	if (cpu_transcoder == TRANSCODER_EDP)
985
		cpu_ctl2 = BLM_TRANSCODER_EDP;
986
	else
987
		cpu_ctl2 = BLM_PIPE(cpu_transcoder);
988 989 990
	intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2);
	intel_de_posting_read(dev_priv, BLC_PWM_CPU_CTL2);
	intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
991

992
	/* This won't stick until the above enable. */
993
	intel_panel_set_pwm_level(conn_state, level);
994

995
	pch_ctl2 = panel->backlight.pwm_level_max << 16;
996
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2);
997 998 999 1000

	pch_ctl1 = 0;
	if (panel->backlight.active_low_pwm)
		pch_ctl1 |= BLM_PCH_POLARITY;
1001

1002 1003 1004 1005
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1);
	intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1);
	intel_de_write(dev_priv, BLC_PWM_PCH_CTL1,
		       pch_ctl1 | BLM_PCH_PWM_ENABLE);
1006 1007
}

1008
static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,
1009
				  const struct drm_connector_state *conn_state, u32 level)
1010
{
1011
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1012
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1013
	struct intel_panel *panel = &connector->panel;
1014 1015
	u32 ctl, freq;

1016
	ctl = intel_de_read(dev_priv, BLC_PWM_CTL);
1017
	if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
1018
		drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1019
		intel_de_write(dev_priv, BLC_PWM_CTL, 0);
1020
	}
1021

1022
	freq = panel->backlight.pwm_level_max;
1023 1024 1025 1026
	if (panel->backlight.combination_mode)
		freq /= 0xff;

	ctl = freq << 17;
1027
	if (panel->backlight.combination_mode)
1028
		ctl |= BLM_LEGACY_MODE;
1029
	if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
1030 1031
		ctl |= BLM_POLARITY_PNV;

1032 1033
	intel_de_write(dev_priv, BLC_PWM_CTL, ctl);
	intel_de_posting_read(dev_priv, BLC_PWM_CTL);
1034 1035

	/* XXX: combine this into above write? */
1036
	intel_panel_set_pwm_level(conn_state, level);
1037 1038 1039 1040 1041 1042

	/*
	 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
	 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
	 * that has backlight.
	 */
1043
	if (IS_DISPLAY_VER(dev_priv, 2))
1044
		intel_de_write(dev_priv, BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
1045
}
1046

1047
static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,
1048
				  const struct drm_connector_state *conn_state, u32 level)
1049
{
1050
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1051
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1052
	struct intel_panel *panel = &connector->panel;
1053
	enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
1054
	u32 ctl, ctl2, freq;
1055

1056
	ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2);
1057
	if (ctl2 & BLM_PWM_ENABLE) {
1058
		drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1059
		ctl2 &= ~BLM_PWM_ENABLE;
1060
		intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2);
1061
	}
1062

1063
	freq = panel->backlight.pwm_level_max;
1064 1065
	if (panel->backlight.combination_mode)
		freq /= 0xff;
1066

1067
	ctl = freq << 16;
1068
	intel_de_write(dev_priv, BLC_PWM_CTL, ctl);
1069

1070 1071 1072 1073 1074
	ctl2 = BLM_PIPE(pipe);
	if (panel->backlight.combination_mode)
		ctl2 |= BLM_COMBINATION_MODE;
	if (panel->backlight.active_low_pwm)
		ctl2 |= BLM_POLARITY_I965;
1075 1076 1077
	intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2);
	intel_de_posting_read(dev_priv, BLC_PWM_CTL2);
	intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
1078

1079
	intel_panel_set_pwm_level(conn_state, level);
1080 1081
}

1082
static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,
1083
				 const struct drm_connector_state *conn_state, u32 level)
1084
{
1085
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1086
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1087
	struct intel_panel *panel = &connector->panel;
1088
	enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
1089
	u32 ctl, ctl2;
1090

1091
	ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
1092
	if (ctl2 & BLM_PWM_ENABLE) {
1093
		drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1094
		ctl2 &= ~BLM_PWM_ENABLE;
1095
		intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2);
1096
	}
1097

1098
	ctl = panel->backlight.pwm_level_max << 16;
1099
	intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), ctl);
1100

1101
	/* XXX: combine this into above write? */
1102
	intel_panel_set_pwm_level(conn_state, level);
1103

1104 1105 1106
	ctl2 = 0;
	if (panel->backlight.active_low_pwm)
		ctl2 |= BLM_POLARITY_I965;
1107 1108 1109 1110
	intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2);
	intel_de_posting_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
	intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe),
		       ctl2 | BLM_PWM_ENABLE);
1111 1112
}

1113
static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state,
1114
				 const struct drm_connector_state *conn_state, u32 level)
1115
{
1116
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1117
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1118
	struct intel_panel *panel = &connector->panel;
1119
	enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
1120 1121
	u32 pwm_ctl, val;

1122
	/* Controller 1 uses the utility pin. */
1123
	if (panel->backlight.controller == 1) {
1124
		val = intel_de_read(dev_priv, UTIL_PIN_CTL);
1125
		if (val & UTIL_PIN_ENABLE) {
1126 1127
			drm_dbg_kms(&dev_priv->drm,
				    "util pin already enabled\n");
1128
			val &= ~UTIL_PIN_ENABLE;
1129
			intel_de_write(dev_priv, UTIL_PIN_CTL, val);
1130
		}
1131

1132 1133 1134
		val = 0;
		if (panel->backlight.util_pin_active_low)
			val |= UTIL_PIN_POLARITY;
1135 1136
		intel_de_write(dev_priv, UTIL_PIN_CTL,
			       val | UTIL_PIN_PIPE(pipe) | UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
1137 1138
	}

1139 1140
	pwm_ctl = intel_de_read(dev_priv,
				BXT_BLC_PWM_CTL(panel->backlight.controller));
1141
	if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1142
		drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1143
		pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1144 1145 1146
		intel_de_write(dev_priv,
			       BXT_BLC_PWM_CTL(panel->backlight.controller),
			       pwm_ctl);
1147 1148
	}

1149 1150
	intel_de_write(dev_priv,
		       BXT_BLC_PWM_FREQ(panel->backlight.controller),
1151
		       panel->backlight.pwm_level_max);
1152

1153
	intel_panel_set_pwm_level(conn_state, level);
1154 1155 1156 1157 1158

	pwm_ctl = 0;
	if (panel->backlight.active_low_pwm)
		pwm_ctl |= BXT_BLC_PWM_POLARITY;

1159 1160 1161 1162 1163 1164
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       pwm_ctl);
	intel_de_posting_read(dev_priv,
			      BXT_BLC_PWM_CTL(panel->backlight.controller));
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       pwm_ctl | BXT_BLC_PWM_ENABLE);
1165 1166
}

1167
static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,
1168
				 const struct drm_connector_state *conn_state, u32 level)
1169
{
1170
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1171 1172 1173 1174
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 pwm_ctl;

1175 1176
	pwm_ctl = intel_de_read(dev_priv,
				BXT_BLC_PWM_CTL(panel->backlight.controller));
1177
	if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1178
		drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n");
1179
		pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1180 1181 1182
		intel_de_write(dev_priv,
			       BXT_BLC_PWM_CTL(panel->backlight.controller),
			       pwm_ctl);
1183 1184
	}

1185 1186
	intel_de_write(dev_priv,
		       BXT_BLC_PWM_FREQ(panel->backlight.controller),
1187
		       panel->backlight.pwm_level_max);
1188

1189
	intel_panel_set_pwm_level(conn_state, level);
1190 1191 1192 1193 1194

	pwm_ctl = 0;
	if (panel->backlight.active_low_pwm)
		pwm_ctl |= BXT_BLC_PWM_POLARITY;

1195 1196 1197 1198 1199 1200
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       pwm_ctl);
	intel_de_posting_read(dev_priv,
			      BXT_BLC_PWM_CTL(panel->backlight.controller));
	intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller),
		       pwm_ctl | BXT_BLC_PWM_ENABLE);
1201 1202
}

1203
static void ext_pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
1204
				     const struct drm_connector_state *conn_state, u32 level)
1205
{
1206
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1207 1208
	struct intel_panel *panel = &connector->panel;

1209 1210 1211
	pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100);
	panel->backlight.pwm_state.enabled = true;
	pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state);
1212 1213
}

1214 1215
static void __intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
					   const struct drm_connector_state *conn_state)
1216
{
1217
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
1218
	struct intel_panel *panel = &connector->panel;
1219

1220 1221
	WARN_ON(panel->backlight.max == 0);

1222
	if (panel->backlight.level <= panel->backlight.min) {
1223
		panel->backlight.level = panel->backlight.max;
1224 1225
		if (panel->backlight.device)
			panel->backlight.device->props.brightness =
1226 1227 1228
				scale_hw_to_user(connector,
						 panel->backlight.level,
						 panel->backlight.device->props.max_brightness);
1229
	}
1230

1231
	panel->backlight.funcs->enable(crtc_state, conn_state, panel->backlight.level);
1232
	panel->backlight.enabled = true;
1233 1234
	if (panel->backlight.device)
		panel->backlight.device->props.power = FB_BLANK_UNBLANK;
1235 1236 1237 1238 1239 1240 1241 1242
}

void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
				  const struct drm_connector_state *conn_state)
{
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
1243
	enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
1244 1245 1246 1247

	if (!panel->backlight.present)
		return;

1248
	drm_dbg_kms(&dev_priv->drm, "pipe %c\n", pipe_name(pipe));
1249 1250 1251 1252

	mutex_lock(&dev_priv->backlight_lock);

	__intel_panel_enable_backlight(crtc_state, conn_state);
1253

1254
	mutex_unlock(&dev_priv->backlight_lock);
1255 1256
}

1257
#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
1258 1259 1260 1261 1262 1263 1264 1265
static u32 intel_panel_get_backlight(struct intel_connector *connector)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 val = 0;

	mutex_lock(&dev_priv->backlight_lock);

1266
	if (panel->backlight.enabled)
1267
		val = panel->backlight.funcs->get(connector, intel_connector_get_pipe(connector));
1268 1269 1270

	mutex_unlock(&dev_priv->backlight_lock);

1271
	drm_dbg_kms(&dev_priv->drm, "get backlight PWM = %d\n", val);
1272 1273 1274
	return val;
}

1275 1276 1277 1278 1279 1280 1281 1282 1283 1284
/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
static u32 scale_user_to_hw(struct intel_connector *connector,
			    u32 user_level, u32 user_max)
{
	struct intel_panel *panel = &connector->panel;

	return scale(user_level, 0, user_max,
		     panel->backlight.min, panel->backlight.max);
}

1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298
/* set backlight brightness to level in range [0..max], scaling wrt hw min */
static void intel_panel_set_backlight(const struct drm_connector_state *conn_state,
				      u32 user_level, u32 user_max)
{
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u32 hw_level;

	if (!panel->backlight.present)
		return;

	mutex_lock(&dev_priv->backlight_lock);

1299
	drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0);
1300 1301 1302 1303 1304 1305 1306 1307 1308 1309

	hw_level = scale_user_to_hw(connector, user_level, user_max);
	panel->backlight.level = hw_level;

	if (panel->backlight.enabled)
		intel_panel_actually_set_backlight(conn_state, hw_level);

	mutex_unlock(&dev_priv->backlight_lock);
}

1310
static int intel_backlight_device_update_status(struct backlight_device *bd)
1311
{
1312
	struct intel_connector *connector = bl_get_data(bd);
1313
	struct intel_panel *panel = &connector->panel;
1314 1315
	struct drm_device *dev = connector->base.dev;

1316
	drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1317 1318
	DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
		      bd->props.brightness, bd->props.max_brightness);
1319
	intel_panel_set_backlight(connector->base.state, bd->props.brightness,
1320
				  bd->props.max_brightness);
1321 1322 1323 1324 1325 1326 1327 1328

	/*
	 * Allow flipping bl_power as a sub-state of enabled. Sadly the
	 * backlight class device does not make it easy to to differentiate
	 * between callbacks for brightness and bl_power, so our backlight_power
	 * callback needs to take this into account.
	 */
	if (panel->backlight.enabled) {
1329
		if (panel->backlight.power) {
1330 1331
			bool enable = bd->props.power == FB_BLANK_UNBLANK &&
				bd->props.brightness != 0;
1332
			panel->backlight.power(connector, enable);
1333 1334 1335 1336 1337
		}
	} else {
		bd->props.power = FB_BLANK_POWERDOWN;
	}

1338
	drm_modeset_unlock(&dev->mode_config.connection_mutex);
1339 1340 1341
	return 0;
}

1342
static int intel_backlight_device_get_brightness(struct backlight_device *bd)
1343
{
1344 1345
	struct intel_connector *connector = bl_get_data(bd);
	struct drm_device *dev = connector->base.dev;
1346
	struct drm_i915_private *dev_priv = to_i915(dev);
1347
	intel_wakeref_t wakeref;
1348
	int ret = 0;
1349

1350
	with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) {
1351
		u32 hw_level;
1352

1353
		drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1354

1355 1356 1357 1358 1359 1360
		hw_level = intel_panel_get_backlight(connector);
		ret = scale_hw_to_user(connector,
				       hw_level, bd->props.max_brightness);

		drm_modeset_unlock(&dev->mode_config.connection_mutex);
	}
1361

1362
	return ret;
1363 1364
}

1365 1366 1367
static const struct backlight_ops intel_backlight_device_ops = {
	.update_status = intel_backlight_device_update_status,
	.get_brightness = intel_backlight_device_get_brightness,
1368 1369
};

1370
int intel_backlight_device_register(struct intel_connector *connector)
1371
{
1372
	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1373
	struct intel_panel *panel = &connector->panel;
1374 1375
	struct backlight_properties props;

1376
	if (WARN_ON(panel->backlight.device))
1377 1378
		return -ENODEV;

1379 1380 1381
	if (!panel->backlight.present)
		return 0;

1382
	WARN_ON(panel->backlight.max == 0);
1383

1384
	memset(&props, 0, sizeof(props));
1385
	props.type = BACKLIGHT_RAW;
1386 1387 1388 1389 1390

	/*
	 * Note: Everything should work even if the backlight device max
	 * presented to the userspace is arbitrarily chosen.
	 */
1391
	props.max_brightness = panel->backlight.max;
1392 1393 1394
	props.brightness = scale_hw_to_user(connector,
					    panel->backlight.level,
					    props.max_brightness);
1395

1396 1397 1398 1399 1400
	if (panel->backlight.enabled)
		props.power = FB_BLANK_UNBLANK;
	else
		props.power = FB_BLANK_POWERDOWN;

1401 1402 1403 1404 1405
	/*
	 * Note: using the same name independent of the connector prevents
	 * registration of multiple backlight devices in the driver.
	 */
	panel->backlight.device =
1406
		backlight_device_register("intel_backlight",
1407 1408 1409
					  connector->base.kdev,
					  connector,
					  &intel_backlight_device_ops, &props);
1410

1411
	if (IS_ERR(panel->backlight.device)) {
1412 1413
		drm_err(&i915->drm, "Failed to register backlight: %ld\n",
			PTR_ERR(panel->backlight.device));
1414
		panel->backlight.device = NULL;
1415 1416
		return -ENODEV;
	}
1417

1418 1419 1420
	drm_dbg_kms(&i915->drm,
		    "Connector %s backlight sysfs interface registered\n",
		    connector->base.name);
1421

1422 1423 1424
	return 0;
}

1425
void intel_backlight_device_unregister(struct intel_connector *connector)
1426
{
1427 1428 1429 1430 1431
	struct intel_panel *panel = &connector->panel;

	if (panel->backlight.device) {
		backlight_device_unregister(panel->backlight.device);
		panel->backlight.device = NULL;
1432
	}
1433
}
1434 1435
#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */

1436 1437 1438 1439 1440 1441 1442 1443
/*
 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz.
 *      PWM increment = 1
 */
static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);

1444 1445
	return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq),
				 pwm_freq_hz);
1446 1447
}

1448 1449 1450 1451 1452
/*
 * BXT: PWM clock frequency = 19.2 MHz.
 */
static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1453
	return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz);
1454 1455
}

1456
/*
1457 1458 1459 1460 1461 1462
 * SPT: This value represents the period of the PWM stream in clock periods
 * multiplied by 16 (default increment) or 128 (alternate increment selected in
 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
 */
static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1463
	struct intel_panel *panel = &connector->panel;
1464
	u32 mul;
1465

1466
	if (panel->backlight.alternate_pwm_increment)
1467 1468 1469 1470
		mul = 128;
	else
		mul = 16;

1471
	return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul);
1472 1473 1474 1475 1476 1477 1478 1479 1480
}

/*
 * LPT: This value represents the period of the PWM stream in clock periods
 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
 * LPT SOUTH_CHICKEN2 register bit 5).
 */
static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1481
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1482
	struct intel_panel *panel = &connector->panel;
1483 1484
	u32 mul, clock;

1485
	if (panel->backlight.alternate_pwm_increment)
1486 1487 1488 1489
		mul = 16;
	else
		mul = 128;

V
Ville Syrjälä 已提交
1490
	if (HAS_PCH_LPT_H(dev_priv))
1491 1492 1493 1494
		clock = MHz(135); /* LPT:H */
	else
		clock = MHz(24); /* LPT:LP */

1495
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1496 1497 1498 1499 1500 1501 1502 1503
}

/*
 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
 * display raw clocks multiplied by 128.
 */
static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1504
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1505

1506 1507
	return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq),
				 pwm_freq_hz * 128);
1508 1509 1510 1511 1512 1513
}

/*
 * Gen2: This field determines the number of time base events (display core
 * clock frequency/32) in total for a complete cycle of modulated backlight
 * control.
1514
 *
1515 1516 1517 1518 1519
 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
 * divided by 32.
 */
static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1520
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1521 1522
	int clock;

1523
	if (IS_PINEVIEW(dev_priv))
1524
		clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq);
1525
	else
1526
		clock = KHz(dev_priv->cdclk.hw.cdclk);
1527

1528
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);
1529 1530 1531 1532
}

/*
 * Gen4: This value represents the period of the PWM stream in display core
1533 1534
 * clocks ([DevCTG] HRAW clocks) multiplied by 128.
 *
1535 1536 1537
 */
static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1538
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1539 1540 1541
	int clock;

	if (IS_G4X(dev_priv))
1542
		clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq);
1543
	else
1544
		clock = KHz(dev_priv->cdclk.hw.cdclk);
1545

1546
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);
1547 1548 1549 1550 1551 1552 1553 1554 1555
}

/*
 * VLV: This value represents the period of the PWM stream in display core
 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
 */
static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
{
1556 1557
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	int mul, clock;
1558

1559
	if ((intel_de_read(dev_priv, CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1560 1561
		if (IS_CHERRYVIEW(dev_priv))
			clock = KHz(19200);
1562
		else
1563 1564
			clock = MHz(25);
		mul = 16;
1565
	} else {
1566
		clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq);
1567
		mul = 128;
1568
	}
1569

1570
	return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1571 1572
}

1573
static u16 get_vbt_pwm_freq(struct drm_i915_private *dev_priv)
1574 1575 1576
{
	u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;

1577
	if (pwm_freq_hz) {
1578 1579 1580
		drm_dbg_kms(&dev_priv->drm,
			    "VBT defined backlight frequency %u Hz\n",
			    pwm_freq_hz);
1581 1582
	} else {
		pwm_freq_hz = 200;
1583 1584 1585
		drm_dbg_kms(&dev_priv->drm,
			    "default backlight frequency %u Hz\n",
			    pwm_freq_hz);
1586 1587
	}

1588 1589 1590 1591 1592 1593 1594 1595 1596 1597
	return pwm_freq_hz;
}

static u32 get_backlight_max_vbt(struct intel_connector *connector)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
	u16 pwm_freq_hz = get_vbt_pwm_freq(dev_priv);
	u32 pwm;

1598
	if (!panel->backlight.pwm_funcs->hz_to_pwm) {
1599 1600 1601 1602 1603
		drm_dbg_kms(&dev_priv->drm,
			    "backlight frequency conversion not supported\n");
		return 0;
	}

1604
	pwm = panel->backlight.pwm_funcs->hz_to_pwm(connector, pwm_freq_hz);
1605
	if (!pwm) {
1606 1607
		drm_dbg_kms(&dev_priv->drm,
			    "backlight frequency conversion failed\n");
1608 1609 1610 1611 1612 1613 1614 1615
		return 0;
	}

	return pwm;
}

/*
 * Note: The setup hooks can't assume pipe is set!
1616
 */
1617 1618
static u32 get_backlight_min_vbt(struct intel_connector *connector)
{
1619
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1620
	struct intel_panel *panel = &connector->panel;
1621
	int min;
1622

1623
	drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0);
1624

1625 1626 1627 1628 1629 1630 1631 1632 1633
	/*
	 * XXX: If the vbt value is 255, it makes min equal to max, which leads
	 * to problems. There are such machines out there. Either our
	 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
	 * against this by letting the minimum be at most (arbitrarily chosen)
	 * 25% of the max.
	 */
	min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
	if (min != dev_priv->vbt.backlight.min_brightness) {
1634 1635 1636
		drm_dbg_kms(&dev_priv->drm,
			    "clamping VBT min backlight %d/255 to %d/255\n",
			    dev_priv->vbt.backlight.min_brightness, min);
1637 1638
	}

1639
	/* vbt value is a coefficient in range [0..255] */
1640
	return scale(min, 0, 255, 0, panel->backlight.pwm_level_max);
1641 1642
}

1643
static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1644
{
1645
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1646
	struct intel_panel *panel = &connector->panel;
1647 1648
	u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
	bool alt, cpu_mode;
1649 1650

	if (HAS_PCH_LPT(dev_priv))
1651
		alt = intel_de_read(dev_priv, SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
1652
	else
1653
		alt = intel_de_read(dev_priv, SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
1654
	panel->backlight.alternate_pwm_increment = alt;
1655

1656
	pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
1657 1658
	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;

1659
	pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2);
1660
	panel->backlight.pwm_level_max = pch_ctl2 >> 16;
1661

1662
	cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
1663

1664 1665
	if (!panel->backlight.pwm_level_max)
		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
1666

1667
	if (!panel->backlight.pwm_level_max)
1668 1669
		return -ENODEV;

1670
	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
1671

1672
	panel->backlight.pwm_enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
1673

1674
	cpu_mode = panel->backlight.pwm_enabled && HAS_PCH_LPT(dev_priv) &&
1675 1676
		   !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) &&
		   (cpu_ctl2 & BLM_PWM_ENABLE);
1677

1678
	if (cpu_mode) {
1679 1680
		val = pch_get_backlight(connector, unused);

1681 1682
		drm_dbg_kms(&dev_priv->drm,
			    "CPU backlight register was enabled, switching to PCH override\n");
1683 1684

		/* Write converted CPU PWM value to PCH override register */
1685
		lpt_set_backlight(connector->base.state, val);
1686 1687
		intel_de_write(dev_priv, BLC_PWM_PCH_CTL1,
			       pch_ctl1 | BLM_PCH_OVERRIDE_ENABLE);
1688

1689 1690
		intel_de_write(dev_priv, BLC_PWM_CPU_CTL2,
			       cpu_ctl2 & ~BLM_PWM_ENABLE);
1691
	}
1692 1693 1694 1695

	return 0;
}

1696
static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
1697
{
1698
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1699
	struct intel_panel *panel = &connector->panel;
1700
	u32 cpu_ctl2, pch_ctl1, pch_ctl2;
1701

1702
	pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1);
1703 1704
	panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;

1705
	pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2);
1706
	panel->backlight.pwm_level_max = pch_ctl2 >> 16;
1707

1708 1709
	if (!panel->backlight.pwm_level_max)
		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
1710

1711
	if (!panel->backlight.pwm_level_max)
1712 1713
		return -ENODEV;

1714
	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
1715

1716
	cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2);
1717
	panel->backlight.pwm_enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1718
		(pch_ctl1 & BLM_PCH_PWM_ENABLE);
1719

1720 1721 1722
	return 0;
}

1723
static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
1724
{
1725
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1726
	struct intel_panel *panel = &connector->panel;
1727 1728
	u32 ctl, val;

1729
	ctl = intel_de_read(dev_priv, BLC_PWM_CTL);
1730

1731
	if (IS_DISPLAY_VER(dev_priv, 2) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
1732 1733
		panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;

1734
	if (IS_PINEVIEW(dev_priv))
1735 1736
		panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;

1737
	panel->backlight.pwm_level_max = ctl >> 17;
1738

1739 1740 1741
	if (!panel->backlight.pwm_level_max) {
		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
		panel->backlight.pwm_level_max >>= 1;
1742
	}
1743

1744
	if (!panel->backlight.pwm_level_max)
1745 1746
		return -ENODEV;

1747
	if (panel->backlight.combination_mode)
1748
		panel->backlight.pwm_level_max *= 0xff;
1749

1750
	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
1751

1752
	val = i9xx_get_backlight(connector, unused);
1753 1754
	val = intel_panel_invert_pwm_level(connector, val);
	val = clamp(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max);
1755

1756
	panel->backlight.pwm_enabled = val != 0;
1757

1758 1759 1760
	return 0;
}

1761
static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
1762
{
1763
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1764
	struct intel_panel *panel = &connector->panel;
1765
	u32 ctl, ctl2;
1766

1767
	ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2);
1768 1769 1770
	panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
	panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;

1771
	ctl = intel_de_read(dev_priv, BLC_PWM_CTL);
1772
	panel->backlight.pwm_level_max = ctl >> 16;
1773

1774 1775
	if (!panel->backlight.pwm_level_max)
		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
1776

1777
	if (!panel->backlight.pwm_level_max)
1778 1779
		return -ENODEV;

1780
	if (panel->backlight.combination_mode)
1781
		panel->backlight.pwm_level_max *= 0xff;
1782

1783
	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
1784

1785
	panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE;
1786

1787 1788 1789
	return 0;
}

1790
static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
1791
{
1792
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1793
	struct intel_panel *panel = &connector->panel;
1794
	u32 ctl, ctl2;
1795

1796
	if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B))
1797 1798
		return -ENODEV;

1799
	ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe));
1800 1801
	panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;

1802
	ctl = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe));
1803
	panel->backlight.pwm_level_max = ctl >> 16;
1804

1805 1806
	if (!panel->backlight.pwm_level_max)
		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
1807

1808
	if (!panel->backlight.pwm_level_max)
1809 1810
		return -ENODEV;

1811
	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
1812

1813
	panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE;
1814

1815 1816 1817
	return 0;
}

1818 1819 1820
static int
bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
{
1821
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1822 1823 1824
	struct intel_panel *panel = &connector->panel;
	u32 pwm_ctl, val;

1825
	panel->backlight.controller = dev_priv->vbt.backlight.controller;
1826

1827 1828
	pwm_ctl = intel_de_read(dev_priv,
				BXT_BLC_PWM_CTL(panel->backlight.controller));
1829

1830
	/* Controller 1 uses the utility pin. */
1831
	if (panel->backlight.controller == 1) {
1832
		val = intel_de_read(dev_priv, UTIL_PIN_CTL);
1833 1834 1835 1836 1837
		panel->backlight.util_pin_active_low =
					val & UTIL_PIN_POLARITY;
	}

	panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1838 1839
	panel->backlight.pwm_level_max =
		intel_de_read(dev_priv, BXT_BLC_PWM_FREQ(panel->backlight.controller));
1840

1841 1842
	if (!panel->backlight.pwm_level_max)
		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
1843

1844
	if (!panel->backlight.pwm_level_max)
1845 1846
		return -ENODEV;

1847
	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
1848

1849
	panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1850 1851 1852 1853

	return 0;
}

1854 1855 1856 1857 1858
static int
cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
{
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;
1859
	u32 pwm_ctl;
1860 1861

	/*
1862 1863 1864
	 * CNP has the BXT implementation of backlight, but with only one
	 * controller. TODO: ICP has multiple controllers but we only use
	 * controller 0 for now.
1865 1866 1867
	 */
	panel->backlight.controller = 0;

1868 1869
	pwm_ctl = intel_de_read(dev_priv,
				BXT_BLC_PWM_CTL(panel->backlight.controller));
1870 1871

	panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1872 1873
	panel->backlight.pwm_level_max =
		intel_de_read(dev_priv, BXT_BLC_PWM_FREQ(panel->backlight.controller));
1874

1875 1876
	if (!panel->backlight.pwm_level_max)
		panel->backlight.pwm_level_max = get_backlight_max_vbt(connector);
1877

1878
	if (!panel->backlight.pwm_level_max)
1879 1880
		return -ENODEV;

1881
	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
1882

1883
	panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1884 1885 1886 1887

	return 0;
}

1888 1889
static int ext_pwm_setup_backlight(struct intel_connector *connector,
				   enum pipe pipe)
1890 1891
{
	struct drm_device *dev = connector->base.dev;
1892
	struct drm_i915_private *dev_priv = to_i915(dev);
1893
	struct intel_panel *panel = &connector->panel;
1894
	const char *desc;
1895
	u32 level;
1896

1897 1898 1899 1900 1901 1902 1903 1904 1905
	/* Get the right PWM chip for DSI backlight according to VBT */
	if (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) {
		panel->backlight.pwm = pwm_get(dev->dev, "pwm_pmic_backlight");
		desc = "PMIC";
	} else {
		panel->backlight.pwm = pwm_get(dev->dev, "pwm_soc_backlight");
		desc = "SoC";
	}

1906
	if (IS_ERR(panel->backlight.pwm)) {
1907 1908
		drm_err(&dev_priv->drm, "Failed to get the %s PWM chip\n",
			desc);
1909 1910 1911 1912
		panel->backlight.pwm = NULL;
		return -ENODEV;
	}

1913 1914
	panel->backlight.pwm_level_max = 100; /* 100% */
	panel->backlight.pwm_level_min = get_backlight_min_vbt(connector);
1915

1916 1917 1918 1919 1920 1921
	if (pwm_is_enabled(panel->backlight.pwm)) {
		/* PWM is already enabled, use existing settings */
		pwm_get_state(panel->backlight.pwm, &panel->backlight.pwm_state);

		level = pwm_get_relative_duty_cycle(&panel->backlight.pwm_state,
						    100);
1922 1923
		level = intel_panel_invert_pwm_level(connector, level);
		panel->backlight.pwm_enabled = true;
1924 1925 1926 1927 1928 1929 1930 1931 1932

		drm_dbg_kms(&dev_priv->drm, "PWM already enabled at freq %ld, VBT freq %d, level %d\n",
			    NSEC_PER_SEC / (unsigned long)panel->backlight.pwm_state.period,
			    get_vbt_pwm_freq(dev_priv), level);
	} else {
		/* Set period from VBT frequency, leave other settings at 0. */
		panel->backlight.pwm_state.period =
			NSEC_PER_SEC / get_vbt_pwm_freq(dev_priv);
	}
1933

1934 1935
	drm_info(&dev_priv->drm, "Using %s PWM for LCD backlight control\n",
		 desc);
1936 1937 1938
	return 0;
}

1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990
static void intel_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level)
{
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
	struct intel_panel *panel = &connector->panel;

	panel->backlight.pwm_funcs->set(conn_state,
				       intel_panel_invert_pwm_level(connector, level));
}

static u32 intel_pwm_get_backlight(struct intel_connector *connector, enum pipe pipe)
{
	struct intel_panel *panel = &connector->panel;

	return intel_panel_invert_pwm_level(connector,
					    panel->backlight.pwm_funcs->get(connector, pipe));
}

static void intel_pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
				       const struct drm_connector_state *conn_state, u32 level)
{
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
	struct intel_panel *panel = &connector->panel;

	panel->backlight.pwm_funcs->enable(crtc_state, conn_state,
					   intel_panel_invert_pwm_level(connector, level));
}

static void intel_pwm_disable_backlight(const struct drm_connector_state *conn_state, u32 level)
{
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
	struct intel_panel *panel = &connector->panel;

	panel->backlight.pwm_funcs->disable(conn_state,
					    intel_panel_invert_pwm_level(connector, level));
}

static int intel_pwm_setup_backlight(struct intel_connector *connector, enum pipe pipe)
{
	struct intel_panel *panel = &connector->panel;
	int ret = panel->backlight.pwm_funcs->setup(connector, pipe);

	if (ret < 0)
		return ret;

	panel->backlight.min = panel->backlight.pwm_level_min;
	panel->backlight.max = panel->backlight.pwm_level_max;
	panel->backlight.level = intel_pwm_get_backlight(connector, pipe);
	panel->backlight.enabled = panel->backlight.pwm_enabled;

	return 0;
}

1991 1992
void intel_panel_update_backlight(struct intel_atomic_state *state,
				  struct intel_encoder *encoder,
1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009
				  const struct intel_crtc_state *crtc_state,
				  const struct drm_connector_state *conn_state)
{
	struct intel_connector *connector = to_intel_connector(conn_state->connector);
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
	struct intel_panel *panel = &connector->panel;

	if (!panel->backlight.present)
		return;

	mutex_lock(&dev_priv->backlight_lock);
	if (!panel->backlight.enabled)
		__intel_panel_enable_backlight(crtc_state, conn_state);

	mutex_unlock(&dev_priv->backlight_lock);
}

2010
int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
2011
{
2012
	struct drm_i915_private *dev_priv = to_i915(connector->dev);
2013
	struct intel_connector *intel_connector = to_intel_connector(connector);
2014
	struct intel_panel *panel = &intel_connector->panel;
2015
	int ret;
2016

2017
	if (!dev_priv->vbt.backlight.present) {
2018
		if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
2019 2020
			drm_dbg_kms(&dev_priv->drm,
				    "no backlight present per VBT, but present per quirk\n");
2021
		} else {
2022 2023
			drm_dbg_kms(&dev_priv->drm,
				    "no backlight present per VBT\n");
2024 2025
			return 0;
		}
2026 2027
	}

2028
	/* ensure intel_panel has been initialized first */
2029
	if (drm_WARN_ON(&dev_priv->drm, !panel->backlight.funcs))
2030 2031
		return -ENODEV;

2032
	/* set level and max in panel struct */
2033
	mutex_lock(&dev_priv->backlight_lock);
2034
	ret = panel->backlight.funcs->setup(intel_connector, pipe);
2035
	mutex_unlock(&dev_priv->backlight_lock);
2036 2037

	if (ret) {
2038 2039 2040
		drm_dbg_kms(&dev_priv->drm,
			    "failed to setup backlight for connector %s\n",
			    connector->name);
2041 2042
		return ret;
	}
2043

2044 2045
	panel->backlight.present = true;

2046 2047 2048 2049 2050
	drm_dbg_kms(&dev_priv->drm,
		    "Connector %s backlight initialized, %s, brightness %u/%u\n",
		    connector->name,
		    enableddisabled(panel->backlight.enabled),
		    panel->backlight.level, panel->backlight.max);
2051

2052 2053 2054
	return 0;
}

2055
static void intel_panel_destroy_backlight(struct intel_panel *panel)
2056
{
2057 2058 2059 2060
	/* dispose of the pwm */
	if (panel->backlight.pwm)
		pwm_put(panel->backlight.pwm);

2061
	panel->backlight.present = false;
2062
}
2063

2064
static const struct intel_panel_bl_funcs bxt_pwm_funcs = {
2065 2066 2067 2068 2069 2070 2071 2072
	.setup = bxt_setup_backlight,
	.enable = bxt_enable_backlight,
	.disable = bxt_disable_backlight,
	.set = bxt_set_backlight,
	.get = bxt_get_backlight,
	.hz_to_pwm = bxt_hz_to_pwm,
};

2073
static const struct intel_panel_bl_funcs cnp_pwm_funcs = {
2074 2075 2076 2077 2078 2079 2080 2081
	.setup = cnp_setup_backlight,
	.enable = cnp_enable_backlight,
	.disable = cnp_disable_backlight,
	.set = bxt_set_backlight,
	.get = bxt_get_backlight,
	.hz_to_pwm = cnp_hz_to_pwm,
};

2082
static const struct intel_panel_bl_funcs lpt_pwm_funcs = {
2083 2084 2085 2086 2087 2088 2089 2090
	.setup = lpt_setup_backlight,
	.enable = lpt_enable_backlight,
	.disable = lpt_disable_backlight,
	.set = lpt_set_backlight,
	.get = lpt_get_backlight,
	.hz_to_pwm = lpt_hz_to_pwm,
};

2091
static const struct intel_panel_bl_funcs spt_pwm_funcs = {
2092 2093 2094 2095 2096 2097 2098 2099
	.setup = lpt_setup_backlight,
	.enable = lpt_enable_backlight,
	.disable = lpt_disable_backlight,
	.set = lpt_set_backlight,
	.get = lpt_get_backlight,
	.hz_to_pwm = spt_hz_to_pwm,
};

2100
static const struct intel_panel_bl_funcs pch_pwm_funcs = {
2101 2102 2103 2104 2105 2106 2107 2108
	.setup = pch_setup_backlight,
	.enable = pch_enable_backlight,
	.disable = pch_disable_backlight,
	.set = pch_set_backlight,
	.get = pch_get_backlight,
	.hz_to_pwm = pch_hz_to_pwm,
};

2109 2110 2111 2112 2113 2114
static const struct intel_panel_bl_funcs ext_pwm_funcs = {
	.setup = ext_pwm_setup_backlight,
	.enable = ext_pwm_enable_backlight,
	.disable = ext_pwm_disable_backlight,
	.set = ext_pwm_set_backlight,
	.get = ext_pwm_get_backlight,
2115 2116
};

2117
static const struct intel_panel_bl_funcs vlv_pwm_funcs = {
2118 2119 2120 2121 2122 2123 2124 2125
	.setup = vlv_setup_backlight,
	.enable = vlv_enable_backlight,
	.disable = vlv_disable_backlight,
	.set = vlv_set_backlight,
	.get = vlv_get_backlight,
	.hz_to_pwm = vlv_hz_to_pwm,
};

2126
static const struct intel_panel_bl_funcs i965_pwm_funcs = {
2127 2128 2129 2130 2131 2132 2133 2134
	.setup = i965_setup_backlight,
	.enable = i965_enable_backlight,
	.disable = i965_disable_backlight,
	.set = i9xx_set_backlight,
	.get = i9xx_get_backlight,
	.hz_to_pwm = i965_hz_to_pwm,
};

2135
static const struct intel_panel_bl_funcs i9xx_pwm_funcs = {
2136 2137 2138 2139 2140 2141 2142 2143
	.setup = i9xx_setup_backlight,
	.enable = i9xx_enable_backlight,
	.disable = i9xx_disable_backlight,
	.set = i9xx_set_backlight,
	.get = i9xx_get_backlight,
	.hz_to_pwm = i9xx_hz_to_pwm,
};

2144 2145 2146 2147 2148 2149 2150 2151
static const struct intel_panel_bl_funcs pwm_bl_funcs = {
	.setup = intel_pwm_setup_backlight,
	.enable = intel_pwm_enable_backlight,
	.disable = intel_pwm_disable_backlight,
	.set = intel_pwm_set_backlight,
	.get = intel_pwm_get_backlight,
};

2152
/* Set up chip specific backlight functions */
2153 2154
static void
intel_panel_init_backlight_funcs(struct intel_panel *panel)
2155
{
2156
	struct intel_connector *connector =
2157
		container_of(panel, struct intel_connector, panel);
2158
	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
2159

2160 2161 2162 2163
	if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
	    intel_dsi_dcs_init_backlight_funcs(connector) == 0)
		return;

2164
	if (IS_GEN9_LP(dev_priv)) {
2165
		panel->backlight.pwm_funcs = &bxt_pwm_funcs;
2166
	} else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) {
2167
		panel->backlight.pwm_funcs = &cnp_pwm_funcs;
2168
	} else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) {
2169
		if (HAS_PCH_LPT(dev_priv))
2170
			panel->backlight.pwm_funcs = &lpt_pwm_funcs;
2171
		else
2172
			panel->backlight.pwm_funcs = &spt_pwm_funcs;
2173
	} else if (HAS_PCH_SPLIT(dev_priv)) {
2174
		panel->backlight.pwm_funcs = &pch_pwm_funcs;
2175
	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
2176
		if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
2177
			panel->backlight.pwm_funcs = &ext_pwm_funcs;
2178
		} else {
2179
			panel->backlight.pwm_funcs = &vlv_pwm_funcs;
2180
		}
2181
	} else if (IS_DISPLAY_VER(dev_priv, 4)) {
2182
		panel->backlight.pwm_funcs = &i965_pwm_funcs;
2183
	} else {
2184
		panel->backlight.pwm_funcs = &i9xx_pwm_funcs;
2185
	}
2186 2187 2188 2189

	if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
	    intel_dp_aux_init_backlight_funcs(connector) == 0)
		return;
2190 2191 2192

	/* We're using a standard PWM backlight interface */
	panel->backlight.funcs = &pwm_bl_funcs;
2193 2194
}

2195 2196 2197 2198 2199 2200 2201 2202 2203 2204 2205
enum drm_connector_status
intel_panel_detect(struct drm_connector *connector, bool force)
{
	struct drm_i915_private *i915 = to_i915(connector->dev);

	if (!INTEL_DISPLAY_ENABLED(i915))
		return connector_status_disconnected;

	return connector_status_connected;
}

2206
int intel_panel_init(struct intel_panel *panel,
2207 2208
		     struct drm_display_mode *fixed_mode,
		     struct drm_display_mode *downclock_mode)
2209
{
2210 2211
	intel_panel_init_backlight_funcs(panel);

2212
	panel->fixed_mode = fixed_mode;
2213
	panel->downclock_mode = downclock_mode;
2214

2215 2216 2217 2218 2219
	return 0;
}

void intel_panel_fini(struct intel_panel *panel)
{
2220 2221 2222
	struct intel_connector *intel_connector =
		container_of(panel, struct intel_connector, panel);

2223 2224
	intel_panel_destroy_backlight(panel);

2225 2226
	if (panel->fixed_mode)
		drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
2227 2228 2229 2230

	if (panel->downclock_mode)
		drm_mode_destroy(intel_connector->base.dev,
				panel->downclock_mode);
2231
}