Reviewed-by: dholmes, ecaspole, kvn

Reviewed-by: dholmes, ecaspole, kvn

Reviewed-by: dholmes, alanbur

Reviewed-by: dholmes, alanbur

Summary: Using new sysconf and sysinfo API on Solaris 12, avoid using libpicl and libkstat.
Reviewed-by: kvn

Reviewed-by: iveresov

Summary: Using new sysconf and sysinfo API on Solaris 12, avoid using libpicl and libkstat.
Reviewed-by: kvn

Reviewed-by: iveresov

Summary: Add support for VM_Version::L1_data_cache_line_size().
Reviewed-by: dsimms, kvn, dholmes

Summary: Add support for VM_Version::L1_data_cache_line_size().
Reviewed-by: dsimms, kvn, dholmes

Summary: Add missing cache_line_size > 0 checks.
Reviewed-by: kvn

Summary: Add missing cache_line_size > 0 checks.
Reviewed-by: kvn

Summary: Add missing cache_line_size > 0 checks.
Reviewed-by: kvn

Reviewed-by: vkempik, shshahma

Reviewed-by: kbarrett, tschatzl

Summary: Chcek both l2-dcache-line-size and l2-cache-line-size properties to determine the size of the line
Reviewed-by: kvn

Summary: Chcek both l2-dcache-line-size and l2-cache-line-size properties to determine the size of the line
Reviewed-by: kvn

Summary: Add C2 SHA intrinsics on SPARC
Reviewed-by: kvn, roland
Contributed-by: james.cheng@oracle.com

8043029: Change 8037816 breaks HS build with older GCC versions which don't support diagnostic pragmas
8043164: Format warning in traceStream.hpp
Summary: Backport of main fix + two corrections, enables clang compilation, turns on format attributes, corrects/mutes warnings
Reviewed-by: kvn, coleenp, iveresov, twisti

Summary: Fix the arbitrary alignment issue in SPARC AES crypto stub routines.
Reviewed-by: kvn, iveresov
Contributed-by: shrinivas.joshi@oracle.com

Summary: Using libpicl to get L1 data and L2 cache line sizes
Reviewed-by: kvn, roland, morris

Summary: Add intrinsics/stub routines support for single-block and multi-block (as used by Cipher Block Chaining mode) AES encryption and decryption operations on the SPARC platform.
Reviewed-by: kvn, roland
Contributed-by: shrinivas.joshi@oracle.com

Reviewed-by: kvn, dholmes, poonam

Summary: Copyright year updated for files modified during 2013
Reviewed-by: twisti, iveresov

Summary: fix code to allow testing on Fujitsu Sparc64 CPUs
Reviewed-by: kvn

Summary: Removed most of the SPARC V8 instructions
Reviewed-by: kvn, twisti

Summary: HotSpot changes to support @Contended annotation.
Reviewed-by: coleenp, kvn, jrose
Contributed-by: NAleksey Shipilev <aleksey.shipilev@oracle.com>

Reviewed-by: jrose, kvn

Summary: support of compress class pointers in the compilers.
Reviewed-by: kvn, twisti

Summary: G1 does not appear to be immune to the issue described in CR 6948537 and increasing the size of old-generation PLABs appears to increase the liklihood of seeing the issue. Extend the fix for 6948537 to G1's BlockOffsetTable.
Reviewed-by: brutisso, jmasa

Summary: Increase vector size up to 256-bits for YMM AVX registers on x86.
Reviewed-by: never, twisti, roland

Reviewed-by: kvn
Contributed-by: NTao Mao <tao.mao@oracle.com>

Summary: use shorter instruction sequences for atomic add and atomic exchange when possible.
Reviewed-by: kvn, jrose

Reviewed-by: never, kvn

Summary: Use BIS and prefetch in arraycopy stubs for Sparc (BIS for T4 only).
Reviewed-by: never, iveresov

Summary: Use BIS for zeroing new allocated big (2Kb and more) objects and arrays.
Reviewed-by: never, twisti, ysr

Summary: on T4 2 BIS instructions should be issued to prefetch 64 bytes
Reviewed-by: iveresov, phh, twisti

Summary: Use new short branch instruction in C2 generated code.
Reviewed-by: never

Summary: Add new short branch instruction to Hotspot sparc assembler.
Reviewed-by: never, twisti, jrose

Summary: Use new VIS3 mov instructions on T4 for move data between general and float registers.
Reviewed-by: never, twisti