8164002: Add a new CPU family (S_family) for SPARC S7 and above processors

Reviewed-by: dholmes, ecaspole, kvn

src/cpu/sparc/vm/vm_version_sparc.cpp

@@ -449,9 +449,10 @@ void VM_Version::revert() {
 
 unsigned int VM_Version::calc_parallel_worker_threads() {
   unsigned int result;
-  if (is_M_series()) {
-    // for now, use same gc thread calculation for M-series as for niagara-plus
-    // in future, we may want to tweak parameters for nof_parallel_worker_thread
+  if (is_M_series() || is_S_series()) {
+    // for now, use same gc thread calculation for M-series and S-series as for
+    // niagara-plus. In future, we may want to tweak parameters for
+    // nof_parallel_worker_thread
     result = nof_parallel_worker_threads(5, 16, 8);
   } else if (is_niagara_plus()) {
     result = nof_parallel_worker_threads(5, 16, 8);
@@ -475,6 +476,9 @@ int VM_Version::parse_features(const char* implementation) {
   } else if (strstr(impl, "SPARC-M") != NULL) {
     // M-series SPARC is based on T-series.
     features |= (M_family_m | T_family_m);
+  } else if (strstr(impl, "SPARC-S") != NULL) {
+    // S-series SPARC is based on T-series.
+    features |= (S_family_m | T_family_m);
   } else if (strstr(impl, "SPARC-T") != NULL) {
     features |= T_family_m;
     if (strstr(impl, "SPARC-T1") != NULL) {

src/cpu/sparc/vm/vm_version_sparc.hpp

@@ -47,13 +47,14 @@ protected:
     cbcond_instructions  = 13,
     sparc64_family       = 14,
     M_family             = 15,
-    T_family             = 16,
-    T1_model             = 17,
-    sparc5_instructions  = 18,
-    aes_instructions     = 19,
-    sha1_instruction     = 20,
-    sha256_instruction   = 21,
-    sha512_instruction   = 22
+    S_family             = 16,
+    T_family             = 17,
+    T1_model             = 18,
+    sparc5_instructions  = 19,
+    aes_instructions     = 20,
+    sha1_instruction     = 21,
+    sha256_instruction   = 22,
+    sha512_instruction   = 23
   };
 
   enum Feature_Flag_Set {
@@ -76,6 +77,7 @@ protected:
     cbcond_instructions_m   = 1 << cbcond_instructions,
     sparc64_family_m        = 1 << sparc64_family,
     M_family_m              = 1 << M_family,
+    S_family_m              = 1 << S_family,
     T_family_m              = 1 << T_family,
     T1_model_m              = 1 << T1_model,
     sparc5_instructions_m   = 1 << sparc5_instructions,
@@ -105,6 +107,7 @@ protected:
 
   // Returns true if the platform is in the niagara line (T series)
   static bool is_M_family(int features) { return (features & M_family_m) != 0; }
+  static bool is_S_family(int features) { return (features & S_family_m) != 0; }
   static bool is_T_family(int features) { return (features & T_family_m) != 0; }
   static bool is_niagara() { return is_T_family(_features); }
 #ifdef ASSERT
@@ -152,6 +155,7 @@ public:
   static bool is_niagara_plus()         { return is_T_family(_features) && !is_T1_model(_features); }
 
   static bool is_M_series()             { return is_M_family(_features); }
+  static bool is_S_series()             { return is_S_family(_features); }
   static bool is_T4()                   { return is_T_family(_features) && has_cbcond(); }
   static bool is_T7()                   { return is_T_family(_features) && has_sparc5_instr(); }