- 19 3月, 2010 2 次提交
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由 Daniel Vetter 提交于
Bug introduced in commit 10ae9bd2 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Mon Feb 1 13:59:17 2010 +0100 drm/i915: blow away userspace mappings before fence change The problem is that when there's no fence reg assigned and the object is mapped at a fenceable offset in the gtt, the userspace mappings won't be torn down. Which happens on untiled->tiled transition quite often on 4th gen and later because there fencing does not have any special alignment constraints (as opposed to 2nd and 3rd gen on which I've tested the original commit). Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=26993Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Tested-by: Eric Anholt <eric@anholt.net> (fixes OpenArena) Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Eric Anholt 提交于
Signed-off-by: NEric Anholt <eric@anholt.net>
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- 18 3月, 2010 8 次提交
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由 Dan Carpenter 提交于
We should free "params" before returning. Signed-off-by: NDan Carpenter <error27@gmail.com> Reviewed-by: NDaniel Vetter <daniel@ffwll.ch> Cc: stable@kernel.org (for .33) Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Chris Wilson 提交于
Fixes: http://bugzilla.kernel.org/show_bug.cgi?id=15527 NULL pointer dereference in i915_gem_object_save_bit_17_swizzle BUG: unable to handle kernel NULL pointer dereference at (null) IP: [<f82b5d2b>] i915_gem_object_save_bit_17_swizzle+0x5b/0xc0 [i915] Call Trace: [<f82aea55>] ? i915_gem_object_put_pages+0x125/0x150 [i915] [<f82aeb71>] ? i915_gem_object_get_pages+0xf1/0x110 [i915] [<f82b0de8>] ? i915_gem_object_bind_to_gtt+0xb8/0x2a0 [i915] [<c02db74d>] ? drm_mm_get_block_generic+0x4d/0x180 [<f82b11cd>] ? i915_gem_mmap_gtt_ioctl+0x16d/0x240 [i915] [<f82ae786>] ? i915_gem_madvise_ioctl+0x86/0x120 [i915] Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Reported-by: maciej.rutecki@gmail.com Cc: stable@kernel.org Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Zhenyu Wang 提交于
IS_GEN6 missed to include SandyBridge mobile chip, which failed in i915_probe_agp() for memory config detection. Fix it with a device info flag. Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Joe Perches 提交于
String constants that are continued on subsequent lines with \ will cause spurious whitespace in the resulting output. Signed-off-by: NJoe Perches <joe@perches.com> Cc: Dave Airlie <airlied@linux.ie> Cc: Eric Anholt <eric@anholt.net> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> [anholt: whacked it to wrap to 80 columns instead] Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Eric Anholt 提交于
This could resolve HW deadlocks where a unit downstream of the VS is waiting for more input, the VS has one vertex queued up but not dispatched because it hopes to get one more vertex for 2x4 dispatch, and software isn't handing more vertices down because it's waiting for rendering to complete. The B-Spec says you should always have this bit set. Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Priit Laes 提交于
Signed-off-by: NPriit Laes <plaes@plaes.org> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Owain G. Ainsworth 提交于
The continue just after this call with loop around and wait for the request just added just fine. This leads to slightly more compact code. Signed-Off-by: NOwain G. Ainsworth <oga@openbsd.org> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Eric Anholt 提交于
We probably don't need it for most of the other driver ioctls as well, but we explicitly did locking when doing the GEM pieces. On CPU-bound graphics tasks, the BKL was showing up as 1-2% of CPU time. Signed-off-by: NEric Anholt <eric@anholt.net>
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- 01 3月, 2010 1 次提交
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由 Dave Airlie 提交于
Many new laptops now come with 2 gpus, one to be used for low power modes and one for gaming/on-ac applications. These GPUs are typically wired to the laptop panel and VGA ports via a multiplexer unit which is controlled via ACPI methods. 4 combinations of systems typically exist - with 2 ACPI methods. Intel/ATI - Lenovo W500/T500 - use ATPX ACPI method ATI/ATI - some ASUS - use ATPX ACPI Method Intel/Nvidia - - use _DSM ACPI method Nvidia/Nvidia - - use _DSM ACPI method. TODO: This patch adds support for the ATPX method and initial bits for the _DSM methods that need to written by someone with access to the hardware. Add a proper non-debugfs interface - need to get some proper testing first. v2: add power up/down support for both devices on W500 puts i915/radeon into D3 and cuts power to radeon. v3: redo probing methods, no DMI list, drm devices call to register with switcheroo, it tries to find an ATPX method on any device and once there is two devices + ATPX it inits the switcher. v4: ATPX msg handling using buffers - should work on more machines v5: rearchitect after more mjg59 discussion - move ATPX handling to radeon driver. v6: add file headers + initial nouveau bits (to be filled out). v7: merge delayed switcher code. v8: avoid suspend/resume of gpu that is off v9: rearchitect - mjg59 is always right. - move all ATPX code to radeon, should allow simpler DSM also proper ATRM handling v10: add ATRM support for radeon BIOS, add mutex to lock vgasr_priv v11: fix bug in resuming Intel for 2nd time. v12: start fixing up nvidia code blindly. v13: blindly guess at finishing nvidia code v14: remove radeon audio hacks - fix up intel resume more like upstream v15: clean up printks + remove unnecessary igd/dis pointers mount debugfs /sys/kernel/debug/vgaswitcheroo/switch - should exist if ATPX detected + 2 cards. DIS - immediate change to discrete IGD - immediate change to IGD DDIS - delayed change to discrete DIGD - delayed change to IGD ON - turn on not in use OFF - turn off not in use Tested on W500 (Intel/ATI) and T500 (Intel/ATI) Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 27 2月, 2010 20 次提交
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由 Zhao Yakui 提交于
This IBM system has a multi-function SDVO card that reports both VGA and TV, but the system has no TV connector. The TV connector always reported as connected, which would lead to poor modesetting choices. https://bugs.freedesktop.org/show_bug.cgi?id=25787Signed-off-by: NZhao Yakui <yakui.zhao@intel.com> Tested-by: NVance <liangghv@sg.ibm.com> Cc: stable@kernel.org Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Jesse Barnes 提交于
It would be good to disable the LVDS port when we shut down the panel to save power. We haven't done so until now because we had trouble getting the right LVDS parameters from the BIOS. I think we're past that now, so enabling and disabling the port should be safe, though it would probably be made cleaner with some additional changes to the display code, where we also bang on the LVDS reg to set the pairing correctly etc. Seems to save a bit of power (up to 300mW in my basic wattsup meter testing). Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Daniel Vetter 提交于
The assumption that an object has only ever one write domain is deeply threaded into gem (it's even encoded the the singular of the variable name). Don't let userspace screw us over. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Daniel Vetter 提交于
Now that we have an exact gpu write domain tracking, we don't need to move objects to the active list ourself. i915_add_request will take care of that under all circumstances. Idea stolen from a patch by Chris Wilson <chris@chris-wilson.co.uk>. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Daniel Vetter 提交于
We have it, so use it. This required moving the function to avoid a forward declaration. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Daniel Vetter 提交于
The fence_list should be lru ordered for otherwise we might try to steal a fence reg from an active object even though there are fences from inactive objects available. lru ordering was obeyed for gpu access everywhere save when moving dirty objects from flushing_list to active_list. Fixing this cause the code to indent way to much, so I've extracted the flushing_list processing logic into its on function. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Daniel Vetter 提交于
The spaghetti logic in there tripped up my brain's code parser for a few secs. Prevent this from happening again by extracting the fence stealing code into a seperate functions. IMHO this slightly clears up the code flow. v2: Beautified according to ickle's comments. v3: ickle forgot to flush his comment queue ... Now there's also a we-are-paranoid BUG_ON in there. v4: I've forgotten to switch on my brain when doing v3. Now the BUG_ON actually checks something useful. v5: Clean up a stale comment as noted by Eric Anholt. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Daniel Vetter 提交于
All other accesses take this spinlock, so do this here, too. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Daniel Vetter 提交于
This has a few functional changes against the old code: * a few more unnecessary loads and stores to the drm_i915_fence_reg objects. Also an unnecessary store to the hw fence register. * zaps any userspace mappings before doing other flushes. Only changes anything when userspace does racy stuff against itself. * also flush GTT domain. This is a noop, but still try to keep the bookkeeping correct. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Zhenyu Wang 提交于
See http://bugzilla.kernel.org/show_bug.cgi?id=15021 Make sure that the appropriate AGP module is loaded and probed before trying to set up the DRM. The DRM already depends on the AGP core, but in this case we know the specific AGP driver we need too, and can help users avoid the trap of loading the AGP driver after the DRM driver. Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Eric Anholt 提交于
I think this is pretty much correct. Not really tested. Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Eric Anholt 提交于
Disables CXSR until it's done, and sets the mobile bit on mobile. Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Eric Anholt 提交于
Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Eric Anholt 提交于
Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Zhenyu Wang 提交于
New memory control config reg at 0x50 should be used for stolen memory size detection on Sandybridge. Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Eric Anholt 提交于
Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Eric Anholt 提交于
I can't explain this, except that it makes my display correct. Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Eric Anholt 提交于
The register's moved to the same location as the one for the BCS, it seems. Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Eric Anholt 提交于
Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Eric Anholt 提交于
Signed-off-by: NEric Anholt <eric@anholt.net>
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- 23 2月, 2010 9 次提交
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由 Chris Wilson 提交于
In order to improve our diagnostic capabilities following a GPU hang and subsequent reset, we need to record the batch buffer that triggered the error. We assume that the current batch buffer, plus a few details about what else is on the active list, will be sufficient -- at the very least an improvement over nothing. The extra information is stored in /debug/dri/.../i915_error_state following an error, and may be decoded using intel_gpu_tools/tools/intel_error_decode. v2: Avoid excessive work under spinlocks. v3: Include ringbuffer for later analysis. v4: Use kunmap correctly and record more buffer state. v5: Search ringbuffer for current batch buffer v6: Use a work fn for the impossible IRQ error case. v7: Avoid non-atomic paths whilst in IRQ context. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Jesse Barnes 提交于
These old machines more often than not lie about their lid state. So don't use it to detect LVDS presence, but leave the event handler to deal with lid open/close, when we might need to reset the mode. Fixes kernel bug #15248 Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Cc: stable@kernel.org Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Owain Ainsworth 提交于
i915_gem_object_fenceable was mostly just a repeat of the i915_gem_object_fence_offset_ok, but also checking the size (which was checkecd when we allowed that BO to be tiled in the first place). So instead, export the latter function and use it in place. Signed-Off-By: NOwain G. Ainsworth <oga@openbsd.org> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Daniel Vetter 提交于
This aligns it with the other user of i915_gem_clear_fence_reg, which blows away the mapping before changing the fence reg. Only affects userspace if it races against itself when changing tiling parameters, i.e. behaviour is undefined, anyway. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Daniel Vetter 提交于
No functional change, because gtt flushing is a no-op. Still, try to keep the bookkeeping accurate. The if is still slightly wrong for with execbuf2 even i915-class hw doesn't always need a fence reg for gpu access. But that's for somewhen lateron. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Daniel Vetter 提交于
Cache-coherency is maintained by gem. Drop these leftover MI_FLUSH commands from the userspace code. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Acked-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Daniel Vetter 提交于
I retested this and whatever this papered over, the problem doesn't seem to exist anymore. Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: NEric Anholt <eric@anholt.net> [anholt: fixed up compile warning] Signed-off-by: NEric Anholt <eric@anholt.net>
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由 Rafael J. Wysocki 提交于
Commit 84b79f8d (drm/i915: Fix crash while aborting hibernation) attempted to fix a regression introduced by commit cbda12d7 (drm/i915: implement new pm ops for i915), but it went too far trying to split the freeze/suspend and resume/thaw parts of the code. As a result, it introduced another regression, which only is visible on some systems. Fix the problem by merging i915_drm_suspend() with i915_drm_freeze() and moving some code from i915_resume() into i915_drm_thaw(), so that intel_opregion_free() and intel_opregion_init() are also executed in the freeze and thaw code paths, respectively. Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl> Reported-and-tested-by: NPedro Ribeiro <pedrib@gmail.com> Tested-by: NTino Keitel <tino.keitel@tikei.de> Acked-by: NEric Anholt <eric@anholt.net> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Jesse Barnes 提交于
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NEric Anholt <eric@anholt.net>
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