davinci still has its own clk implementation, but lacks
a clk_get_parent() helper, which can lead to link errors
in randconfig builds.

This adds the usual implementation.
Acked-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

In some cases, there is a need to enable a clock as part of
clock enable callback of a different clock. For example, USB
2.0 PHY clock enable requires USB 2.0 clock to be enabled.
In this case, it is safe to instead call __clk_enable()
since the clock framework lock is already taken. Calling
clk_enable() causes recursive locking error.

A similar case arises in the clock disable path.

To enable such usage, make __clk_{enable,disable} functions
publicly available outside of clock.c. Also, call them
davinci_clk_{enable|disable} now to be consistent with how
other davinci-specific clock functions are named.

Note that these functions are not exported to drivers. They
are meant for usage in platform specific clock management
code.
Signed-off-by: NAlexandre Bailon <abailon@baylibre.com>
Suggested-by: NDavid Lechner <david@lechnology.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Some clocks (such as the USB PHY clocks in DA8xx) will need to use iomem.
The davinci_common_init() function must be called before the ioremap, so
the clock init is now split out as separate function.
Signed-off-by: NDavid Lechner <david@lechnology.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Introduce a set_parent callback that will be used for mux clocks, such as
the USB PHY muxes and the async3 clock domain mux.
Signed-off-by: NDavid Lechner <david@lechnology.com>
[nsekhar@ti.com: checkpatch fixes]
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Some header files are never included outside of a mach-davinci
directory and do not need to be made visible in include/mach,
so let's just move them all down one level.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NSekhar Nori <nsekhar@ti.com>

Fix the values returned by the publicly used functions.
These function should return 0 when they are called with clk == NULL in
similar manner as the clock API does to avoid different behavior in drivers
used by daVinci and other architectures.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Convert printks to pr_<level> and pr_warning to pr_warn.

Other miscellanea:

o Coalesce formats
o Realign arguments
o Use %s, __func__ instead of embedded function names
o Add pr_fmt to mityomapl138 and mux
Signed-off-by: NJoe Perches <joe@perches.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

clk_round_rate() should return 0 now upon an error, rather than returning
a negative error code.  This is because clk_round_rate() is being changed
to return an unsigned return type rather than a signed type, since some
clock sources can generate rates higher than (2^31)-1 Hz.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Philip Avinash <avinashphilip@ti.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

DaVinci clock implementation does not support clock enable/disable
functionality on non-PSC clock nodes.

On DA850 SoC, EHRPWM module requires support for enable/disable
of TBCLK controlled using a system module register.

This patch adds a method for enabling/disabling non-PSC clocks
into DaVinci clock implementation.
Signed-off-by: NPhilip Avinash <avinashphilip@ti.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Introduce an IP reset API for use on DaVinci SoC.

There is no existing "reset" framework support for SoC devices.
The remoteproc driver needs explicit control of the DSP's reset line.
To support this, a new DaVinci specific API is added.

This private API will disappear with DT migration.  Some discussion
regarding a proposed DT "reset" binding is here:
https://patchwork.kernel.org/patch/1635051/

Modify davinci_clk_init() to set clk "reset" function for clocks
that indicate PSC_LRST support.  Also fix indentation issue with
function opening curly brace.
Signed-off-by: NRobert Tivy <rtivy@ti.com>
[nsekhar@ti.com: rename davinci_psc_config_reset() to davinci_psc_reset()]
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NSekhar Nori <nsekhar@ti.com>

On a new SoC based on DaVinci, there are multiple power
domains similar to that in C6670 (c6x). Currently the
clock module assumes that there are only two power domains
(0 and 1).

This patch removes this restriction to allow porting on to
the new SoC.

Reviewed-by :Sergei Shtylyov <sshtylyov@mvista.com>
Signed-off-by: NMurali Karicheri <m-karicheri2@ti.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Enabling or disabling a PSC can take certain
modifiers like "disable with reset", "force
enable/disable" and "enable/disable with local
reset" apart from the regular clock gating
functionality.

Pass a flags argument to davinci_psc_config()
so these variations can be supported there.

At this time only "disable with reset" is
supported, but other functionality will be
added in subsequent patches.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

The DM6467 and DM6467T EVMs use different reference clock
frequencies. This difference is currently supported by having
the SoC code call a public board routine which sets up the reference
clock frequency. This does not scale as more boards are added.

Instead, use the clk_set_rate() API to setup the reference clock
frequency to a different value from the board file.
Suggested-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Acked-by: NKevin Hilman <khilman@ti.com>

This patch modifies the sysclk rate setting code to use the divider mask
specified in pll_data.  Without this, devices with different divider ranges
(e.g. tnetv107x) fail.
Signed-off-by: NCyril Chemparathy <cyril@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

Setting sysclk rate will be useful in cases where the
sysclk is not at a fixed ratio to the PLL output but
can asynchronously be changed.

This support forms the basis of attempt to keep the AEMIF
clock constant on OMAP-L138 even as PLL0 output changes
as ARM clock is changed to save power.

This patch has been tested on OMAP-L138.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

The long list of clocks being disabled on boot is noisy and not needed
for standard boots.   Make this a debug printk instead.
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

This patch modifies the psc and clock control code to use ioremap()ed
registers.
Signed-off-by: NCyril Chemparathy <cyril@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

This patch allows socs to override the divider ratio mask by setting an
optional field (div_ratio_mask) in the pll_data structure.
Signed-off-by: NCyril Chemparathy <cyril@ti.com>
Tested-by: NSandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

The current clock control code always gates the clock (PSC state Disable = 2)
on clk_disable().  Some on-chip peripherals (e.g. LCD controller on TNETV107X)
need to be put into SwRstDisable = 0 on clock disable, to maintain
hardware sanity.

This patch extends the davinci_psc_config() arguments to pass in the desired
module state instead of a boolean enable/disable.  Further, clk_disable() now
checks for the PSC_SWRSTDISABLE clk flag before selecting the target state.
Signed-off-by: NCyril Chemparathy <cyril@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

- Convert data/functions to static
- include headers for missing declarations
- pointer cleanups:  struct foo *__iomem f --> struct foo __iomem *f;
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

Remove unneeded 'struct davinci_clk' wrapper around 'struct clk_lookup'
and use clkdev_add_table() to add the list of clocks in one go.
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

When supporting I2C/SPI based on-board PLLs like CDCE949,
it is essential that clk->set_rate be able to sleep.

Currently, this is not possible because clk->set_rate is
called from within spin-lock in clk_set_rate

This patch brings clk->set_rate outside of the spin-lock
and lets the individual set_rate implementations achieve
serialization through appropiate means.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

Some modules do not have PSC to control their clocks.
The 'lpsc' field in the clk structure is 0 for such clocks.

In the clock disable function check for CLK PSC flag before
disabling the PSC. If this is not taken care of then it may
so happen that module controlled by LPSC 0 is erroneously disabled.
Signed-off-by: NChaithrika U S <chaithrika@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

Move /proc/davinci_clocks to /sys/kernel/debug/davinci_clocks
(debugfs).

debugfs is more suited for this since the clock dump is
debug information.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

This patch modifies clock dump to take care of
clock tress rooted at multiple oscillators.
Current code assumes the entire tree is rooted
on a single oscillator. When using off-chip
clock synthesizers, some of the clocks can
be obtained from a different on-board oscillator.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

As suspend support is added, the code supporting
the suspend operation needs to bypass PLLs and
needs to access the same wait time values as the
PLL code in clock.c.

To facilitate this, move the PLL wait times to
clock.h where they can be accessed by suspend code.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

There have accumulated quite a lot of them after the code reorganizations...

In several cases I had to replace #include <linux/dma-mapping.h> which wasn't
needed directly but happened to #include <linux/err.h> which was needed.
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

Replace badly chosen 'psc_ctlr' name of the 'struct clk' field (PSC already
means "Power and Sleep Controller", so the '_ctlr' postfix makes the name
tautological) with technically correct 'gpsc' (Global PSC -- which contains
all the module registers).
Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

The clk_set_parent() API is implemented to enable re-parenting
clocks in the clock tree.

This is useful in DVFS and helps by shifting clocks to an asynchronous
domain where supported by hardware
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

clk_round_rate, clk_set_rate have been updated to handle dynamic
frequency changes.

The motivation behind the changes is to support dynamic CPU frequency
change.

davinci_set_pllrate() changes the PLL rate of a given PLL. This function
has been presented as a generic function though it has been tested only
on OMAP-L138 EVM. No other currently available DaVinci device will probably
use this function, but any future device specific changes will hopefully be
small enough to get taken care using a cpu_is_xxx() macro.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

Make clock rate recalculation easy by having a re-calculate
function for each clock.

The existing functions for calculation of output rates of PLL
and PLL-derived sysclks have been convered to the new
re-calculate API.

A new function is introduced to take care of rate
(re)calculation for leaf clocks.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

Achieve easy top down traversal of clock tree by keeping
track of each clock's list of children.

This is useful in supporting DVFS where clock rates of
all children need to be updated in an efficient manner.
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

The patch adds base support for new TI SOC DM365, which s
similar to the dm355.
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

The current code to support the DaVinci Power and Sleep Controller (PSC)
assumes that there is only one controller.  This assumption is no longer
valid so expand the support to allow greater than one PSC.

To accomplish this, put the base addresses for the PSCs in the SoC
infrastructure so it can be referenced by the PSC code.  This also
requires adding an extra parameter to davinci_psc_config() to specify
the PSC that is to be enabled/disabled.
Signed-off-by: NMark A. Greer <mgreer@mvista.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

This is a significant rework of the low-level clock, PLL and Power
Sleep Controller (PSC) implementation for the DaVinci family.  The
primary goal is to have better modeling if the hardware clocks and
features with the aim of DVFS functionality.

Highlights:
- model PLLs and all PLL-derived clocks
- model parent/child relationships of PLLs and clocks
- convert to new clkdev layer
- view clock frequency and refcount via /proc/davinci_clocks

Special thanks to significant contributions and testing by David
Brownell.

Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

Now that the musb build fixes for DaVinci got merged (RC3?), kick in
the other bits needed to get it finally *working* in mainline:

 - Use clk_enable()/clk_disable() ... the "always enable USB clocks"
   code this originally relied on has since been removed.

 - Initialize the USB device only after the relevant I2C GPIOs are
   available, so the host side can properly enable VBUS.

 - Tweak init sequencing to cope with mainline's relatively late init
   of the I2C system bus for power switches, transceivers, and so on.

Sanity tested on DM6664 EVM for host and peripheral modes; that system
won't boot with CONFIG_PM enabled, so OTG can't yet be tested.  Also
verified on OMAP3.

(Unrelated:  correct the MODULE_PARM_DESC spelling of musb_debug.)
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Cc: Felipe Balbi <me@felipebalbi.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Remove includes of asm/hardware.h in addition to asm/arch/hardware.h.
Then, since asm/hardware.h only exists to include asm/arch/hardware.h,
update everything to directly include asm/arch/hardware.h and remove
asm/hardware.h.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>