提交 8a9d088f 编写于 作者: D David Lechner 提交者: Sekhar Nori

ARM: davinci: clk: add set_parent callback for mux clocks

Introduce a set_parent callback that will be used for mux clocks, such as
the USB PHY muxes and the async3 clock domain mux.
Signed-off-by: NDavid Lechner <david@lechnology.com>
[nsekhar@ti.com: checkpatch fixes]
Signed-off-by: NSekhar Nori <nsekhar@ti.com>
上级 86cad160
......@@ -195,6 +195,14 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
return -EINVAL;
mutex_lock(&clocks_mutex);
if (clk->set_parent) {
int ret = clk->set_parent(clk, parent);
if (ret) {
mutex_unlock(&clocks_mutex);
return ret;
}
}
clk->parent = parent;
list_del_init(&clk->childnode);
list_add(&clk->childnode, &clk->parent->children);
......@@ -224,8 +232,17 @@ int clk_register(struct clk *clk)
mutex_lock(&clocks_mutex);
list_add_tail(&clk->node, &clocks);
if (clk->parent)
if (clk->parent) {
if (clk->set_parent) {
int ret = clk->set_parent(clk, clk->parent);
if (ret) {
mutex_unlock(&clocks_mutex);
return ret;
}
}
list_add_tail(&clk->childnode, &clk->parent->children);
}
mutex_unlock(&clocks_mutex);
/* If rate is already set, use it */
......
......@@ -106,6 +106,7 @@ struct clk {
int (*reset) (struct clk *clk, bool reset);
void (*clk_enable) (struct clk *clk);
void (*clk_disable) (struct clk *clk);
int (*set_parent) (struct clk *clk, struct clk *parent);
};
/* Clock flags: SoC-specific flags start at BIT(16) */
......
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