1. 22 11月, 2011 2 次提交
  2. 11 11月, 2011 1 次提交
  3. 04 11月, 2011 2 次提交
  4. 22 10月, 2011 2 次提交
    • M
      ARM: mach-shmobile: sh7372 A4R support (v4) · 382414b9
      Magnus Damm 提交于
      This change adds support for the sh7372 A4R power domain.
      
      The sh7372 A4R hardware power domain contains the
      SH CPU Core and a set of I/O devices including
      multimedia accelerators and I2C controllers.
      
      One special case about A4R is the INTCS interrupt
      controller that needs to be saved and restored to
      keep working as expected. Also the LCDC hardware
      blocks are in a different hardware power domain
      but have their IRQs routed only through INTCS. So
      as long as LCDCs are active we cannot power down
      INTCS because that would risk losing interrupts.
      Signed-off-by: NMagnus Damm <damm@opensource.se>
      Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
      382414b9
    • M
      ARM: mach-shmobile: sh7372 A3SP support (v4) · d93f5cde
      Magnus Damm 提交于
      This change adds support for the sh7372 A3SP power domain.
      
      The sh7372 A3SP hardware power domain contains a
      wide range of I/O devices. The list of I/O devices
      include SCIF serial ports, DMA Engine hardware,
      SD and MMC controller hardware, USB controllers
      and I2C master controllers.
      
      This patch adds the A3SP low level code which
      powers the hardware power domain on and off. It
      also ties in platform devices to the pm domain
      support code.
      
      It is worth noting that the serial console is
      hooked up to SCIFA0 on most sh7372 boards, and
      the SCIFA0 port is included in the A3SP hardware
      power domain. For this reason we cannot output
      debug messages from the low level power control
      code in the case of A3SP.
      
      QoS support is needed in drivers before we can
      enable the A3SP power control on the fly.
      Signed-off-by: NMagnus Damm <damm@opensource.se>
      Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
      d93f5cde
  5. 27 8月, 2011 1 次提交
  6. 25 8月, 2011 2 次提交
    • R
      PM: Move clock-related definitions and headers to separate file · b5e8d269
      Rafael J. Wysocki 提交于
      Since the PM clock management code in drivers/base/power/clock_ops.c
      is used for both runtime PM and system suspend/hibernation, the
      definitions of data structures and headers related to it should not
      be located in include/linux/pm_rumtime.h.  Move them to a separate
      header file.
      Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
      b5e8d269
    • M
      ARM: mach-shmobile: sh7372 LCDC1 suspend fix · 5c3f96b2
      Magnus Damm 提交于
      Associate the HDMI clock together with LCDC1 on sh7372.
      
      Without this patch Suspend-to-RAM hangs on the boards
      AP4EVB and Mackerel. The code hangs in the LCDC driver
      where the software is waiting forever for the hardware to
      power down. By explicitly associating the HDMI clock with
      LCDC1 we can make sure the HDMI clock is enabled using
      Runtime PM whenever the driver is accessing the hardware.
      
      This HDMI and LCDC1 dependency is documented in the sh7372
      data sheet. Older kernels did work as expected but the
      recently merged (3.1-rc)
      
       794d78fe drivers: sh: late disabling of clocks V2
      
      introduced code to turn off clocks lacking software reference
      which happens to include the HDMI clock that is needed by
      LCDC1 to operate as expected.
      Signed-off-by: NMagnus Damm <damm@opensource.se>
      Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
      5c3f96b2
  7. 22 8月, 2011 1 次提交
  8. 28 7月, 2011 1 次提交
  9. 11 7月, 2011 2 次提交
  10. 10 7月, 2011 2 次提交
  11. 02 7月, 2011 1 次提交
  12. 30 6月, 2011 1 次提交
  13. 25 5月, 2011 2 次提交
  14. 24 5月, 2011 2 次提交
  15. 07 4月, 2011 2 次提交
  16. 29 3月, 2011 1 次提交
  17. 25 3月, 2011 2 次提交
  18. 23 3月, 2011 1 次提交
  19. 04 3月, 2011 1 次提交
  20. 26 1月, 2011 1 次提交
  21. 25 1月, 2011 1 次提交
  22. 22 1月, 2011 1 次提交
  23. 13 1月, 2011 1 次提交
  24. 12 1月, 2011 1 次提交
  25. 07 1月, 2011 1 次提交
  26. 06 1月, 2011 1 次提交
  27. 05 1月, 2011 3 次提交
  28. 05 12月, 2010 1 次提交