Remove the last address definitions relative to the IPSBAR peripheral region
for the ColdFire 527x family. This involved cleaning up some magic numbers
used in the code part, and making them proper register definitions in the 527x
specific header.

This is part of the process of cleaning up the ColdFire register definitions
to make them consistently use absolute addresses for the primary registers.
This will reduce the occasional bugs caused by inconsistent definition of
the register addresses.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

If we're not connecting external GPIO extenders via i2c or spi or whatever, we
probably don't need GPIOLIB.  If we provide an alternate implementation of
the GPIOLIB functions to use when only on-chip GPIO is needed, we can change
ARCH_REQUIRE_GPIOLIB to ARCH_WANTS_OPTIONAL_GPIOLIB so that GPIOLIB becomes
optional.

The downside is that in the GPIOLIB=n case, we lose all error checking done by
gpiolib, ie multiply allocating the gpio, free'ing gpio etc., so that the
only checking that can be done is if we reference a gpio on an external part.
Targets that need the extra error checking can still select GPIOLIB=y.

For the case where GPIOLIB=y, we can simplify the table of gpio chips to use a
single chip, eliminating the tables of chips in the 5xxx.c files.  The
original motivation for the definition of multiple chips was to match the way
many of the Coldfire variants defined their gpio as a spare array in memory.
However, all this really gains us is some error checking when we request a
gpio, gpiolib can check that it doesn't fall in one of the holes.  If thats
important, I think we can still come up with a better way of accomplishing
that.

Also in this patch is some general cleanup and reorganizing of the gpio header
files (I'm sure I must have had a reason why I sometimes used a prefix of
mcf_gpio and other times mcfgpio but for the life of me I can't think of it
now).
Signed-off-by: NSteven King <sfking@fdwdc.com>
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

All these separate directories for each ColdFire CPU SoC varient seems like
overkill. The majority of them only contain a single small config file. Move
these into the common ColdFire code directory.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The GPIO data struct setup is now the only remaining code in the platform
gpio.c file. So move it to the platform config.c code and remove the gpio.c
file.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
Acked-by: NSteven King <sfking@fdwdc.com>

Enable Coldfire QSPI support when SPI_COLDFIRE_QSPI is built as a module.

This version of the patch combines changes to the config files and  device.c
and uses IF_ENABLED (thanks to Sam Ravnborg for the suggestion).
Signed-off-by: NSteven King <sfking@fdwdc.com>
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The CONFIG_FEC2 define was removed from the kernel many versions ago.
But it is still being used to set the multi-function pins when compiling
for a ColdFire 527[45] SoC that has 2 ethernet interfaces. Remove the
last remaining uses of this define, and so fix the setting of the pins
for the 2nd ethernet interface.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Most of the more modern ColdFire cores use the same code to reset the CPU
(but it is different to most of the earlier cores). Currently that is
duplicated in each of the sub-arch files. Pull out this common code and
out a single copy of it with the other common reset code.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

If we make all MCF_RCR (CPU reset register) addressing consistent across all
ColdFire CPU family members that use it then we will be able to remove the
duplicated copies of the code that use it.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The ColdFire QSPI is common to quite a few ColdFire CPUs. No need to duplicate
its platform setup code for every CPU family member that has it. Merge all the
setup code into a single shared file.

This also results in few platforms no longer needing any local platform
setup code. In those cases remove the empty devices array and initcall
code as well.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

If we make all QSPI (SPI protocol) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and code and use a single setup for all.

So modify the ColdFire 527x QSPI addressing so that:

. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
. move chip select definitions (CS) to appropriate header
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The ColdFire FEC is common to quite a few ColdFire CPUs. No need to duplicate
its platform setup code for every CPU family member that has it. Merge all the
setup code into a single shared file.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.

So modify the ColdFire 527x FEC addressing so that:

. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The ColdFire UART is common to all ColdFire CPU's. No need to duplicate
its platform setup code for every CPU family member. Merge all the setup
code into a single shared file.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Simplify the UART setup code so that it no longer loops for each UART
present. Just make it do all the work it needs in a single function.
This will make the code easier to share when we move to a single set
of platform data for ColdFire UARTs.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.

So modify the ColdFire 527x UART addressing so that:

. UARTs are numbered from 0 up
. use a common name for IRQs used
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

With a few small changes we can make the m68knommu timer init code the
same as the m68k code. By using the mach_sched_init function pointer
and reworking the current timer initializers to keep track of the common
m68k timer_interrupt() handler we end up with almost identical code for
m68knommu.

This will allow us to more easily merge the mmu and non-mmu m68k time.c
in future patches.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Fixes generated by 'codespell' and manually reviewed.
Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>

There is a lot of common code that could be shared between the m68k
and m68knommu arch branches. It makes sense to merge the two branches
into a single directory structure so that we can more easily share
that common code.

This is a brute force merge, based on a script from Stephen King
<sfking@fdwdc.com>, which was originally written by Arnd Bergmann
<arnd@arndb.de>.

> The script was inspired by the script Sam Ravnborg used to merge the
> includes from m68knommu. For those files common to both arches but
> differing in content, the m68k version of the file is renamed to
> <file>_mm.<ext> and the m68knommu version of the file is moved into the
> corresponding m68k directory and renamed <file>_no.<ext> and a small
> wrapper file <file>.<ext> is used to select between the two version. Files
> that are common to both but don't differ are removed from the m68knommu
> tree and files and directories that are unique to the m68knommu tree are
> moved to the m68k tree. Finally, the arch/m68knommu tree is removed.
>
> To select between the the versions of the files, the wrapper uses
>
> #ifdef CONFIG_MMU
> #include <file>_mm.<ext>
> #else
> #include <file>_no.<ext>
> #endif

On top of this file merge I have done a simplistic merge of m68k and
m68knommu Kconfig, which primarily attempts to keep existing options and
menus in place. Other than a handful of options being moved it produces
identical .config outputs on m68k and m68knommu targets I tested it on.

With this in place there is now quite a bit of scope for merge cleanups
in future patches.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

The ColdFire 527x family of CPUs does not have an MBAR register, so don't
define its peripheral addresses relative to one. Its internal peripherals
are relative to the IPSBAR register, so make sure to use that.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Since Grant has added the coldfire-qspi driver to next-spi, here is the
platform support for the parts that have qspi hardware.  This sets up
gpio to do the spi chip select using the default chip select pins; it should
be trivial for boards that require different or additional spi chip selects to
use other gpios as needed.
Signed-off-by: NSteven King <sfking@fdwdc.com>
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

With the common intc-2 interrupt controller code in place the ColdFire
527x family startup code can be greatly simplified. Remove all the
interrupt masking code, and the per-device interrupt config here.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

This processor only have one FEC and its MDIO pins are
located at a different offset than the code used for
the current CONFIG_M527x.

Tesed on M5271EVB eval platform.
Without this patch the FEC driver will report no PHY attached
if the bootloader does not pre-initialize the PAR_FECI2C GPIO register.
Signed-off-by: NRichard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>

m68knommu: add FEC platform support to ColdFire CPU's setup code

Move the per-CPU FEC driver setup code into the actual platform
setup code for each ColdFire CPU varient.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Switch to platform style configuration for 527x ColdFire parts.
Initial support is for the UARTs. DMA support moved to common code
for all ColdFire parts.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Reduce the function pointer mess of the m68knommu timer code by calling
directly to the local hardware's timer setup, and expose the local
common timer interrupt handler to the lower level hardware timer.

Ultimately this will save definitions of all these functions across all
the platform code to setup the function pointers (which for any given
m68knommu CPU family member can be only one set of hardware timer
functions).
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

The switch to using the generic irq framework removed the
coldfire_trap_init() code, so remove all references to it.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Currently most of the m68knommu cpu/board setup files are handling
the setup of fixed boot parameters (via CONFIG_BOOTPARAM) themselves.
Move all this into the common setup code.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Use irq_handler_t for passing clock handler routine around.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Signed-off-by: NJörn Engel <joern@wohnheim.fh-wedel.de>
Signed-off-by: NAdrian Bunk <bunk@stusta.de>

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!