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  1. 11 11月, 2017 1 次提交
    • R
      ARM: dts: omap: Add missing #phy-cells to usb-nop-xceiv · f568f6f5
      由 Rob Herring 提交于 
      "usb-nop-xceiv" is using the phy binding, but is missing #phy-cells
property. This is probably because the binding was the precursor to the phy
binding.

Fixes the following warning in OMAP dts files:

Warning (phys_property): Missing property '#phy-cells' in node ...
Signed-off-by: NRob Herring <robh@kernel.org>
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Cc: Javier Martinez Canillas <javier@dowhile0.org>
Cc: linux-omap@vger.kernel.org
Signed-off-by: NTony Lindgren <tony@atomide.com>
      f568f6f5
  3. 14 10月, 2017 1 次提交
  5. 11 10月, 2017 2 次提交
    • T
      ARM: dts: Configure SmartReflex only to idle the interconnect target module · 160ec89a
      由 Tony Lindgren 提交于 
      The TRM has marked dra7 SmartReflex as reserved and we should not
touch those registers as pointed out by Nishanth Menon <nm@ti.com>.
We do still want to idle the related interconnect target modules on
init though.

Let's do this by only configuring the generic interconnect target modules
and not add the child SmartReflex devices.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      160ec89a
    • T
      ARM: dts: Add nodes for missing omap4 interconnect target modules · d23a163e
      由 Tony Lindgren 提交于 
      On omap4 we are missing dts nodes for several interconnect target
modules that we are idling on init. This currently works with the
legacy platform data still around.

To fix this, let's add the interconnect target modules so we can
idle the unused interconnect target module on init.

Also note that adding the interconnect target module node does not
necessarily mean that there is a driver available for the child IP
block, or that the child IP block is even functional.

In the SGX case, the PowerVR driver is closed source. And McASP on
omap4 has at least the TX path disabled and is not supported by the
davinci-mcasp driver. For AESS there is old Android 3.4 kernel
driver available.

For smarflex, we are still probing with platform data and the
driver needs more work before we can add the device ip child nodes.

And finally, we're not yet using the interconnet ranges. I will
be posting separate patches for those later on.

Cc: Benoît Cousson <bcousson@baylibre.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Nishanth Menon <nm@ti.com>
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sakari Ailus <sakari.ailus@iki.fi>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      d23a163e
  7. 20 9月, 2017 11 次提交
    • T
      ARM: dts: Add missing hwmod related properties for dra7 · 288cdbbf
      由 Tony Lindgren 提交于 
      On dra7 we're missing two "ti,hwmods" properties that the SoC
interconnect code needs. For hdq 1-wire, we need to add the
node for that.

Note that this will only show up as a bug with "doesn't have
mpu register target base" boot errors when the legacy platform
data is removed.

Cc: Nishanth Menon <nm@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      288cdbbf
    • T
      ARM: dts: Add missing hwmod related nodes for am33xx · cd57dc5a
      由 Tony Lindgren 提交于 
      On am33xx we're missing the pmu and emif nodes with their related
"ti,hwmods" properties that the SoC interconnect code needs.

Note that this will only show up as a bug with "doesn't have
mpu register target base" boot errors when the legacy platform
data is removed.

Let's also update the related binding documentation while at it.

Cc: Mark Rutland <mark.rutland@arm.com>
Acked-by: NRob Herring <robh+dt@kernel.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      cd57dc5a
    • T
      ARM: dts: Add missing dma hwmod property for omap5 · ef90bfb8
      由 Tony Lindgren 提交于 
      On omap5 we're missing the dma "ti,hwmods" property that the
SoC interconnect code needs.

Note that this will only show up as a bug with "doesn't have
mpu register target base" boot errors when the legacy platform
data is removed.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      ef90bfb8
    • T
      ARM: dts: Add missing wdt3 node for omap4 · 5750d671
      由 Tony Lindgren 提交于 
      On omap4 we're missing the wdt3 node with it's related "ti,hwmods"
property that the SoC interconnect code needs.

Note that this will only show up as a bug with "doesn't have
mpu register target base" boot errors when the legacy platform
data is removed.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      5750d671
    • T
      ARM: dts: Add missing hsi node for omap4 · 8be8576f
      由 Tony Lindgren 提交于 
      On omap4 we're missing the hsi node with it's related "ti,hwmods"
property that the SoC interconnect code needs.

Note that this will only show up as a bug with "doesn't have
mpu register target base" boot errors when the legacy platform
data is removed.

Let's also update the binding accrodingly while at it.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Reviewed-by: NSebastian Reichel <sre@kernel.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      8be8576f
    • T
      ARM: dts: Add missing onewire node for omap4 · d6e1a238
      由 Tony Lindgren 提交于 
      On omap4 we're missing the onewire node with it's related "ti,hwmods"
property that the SoC interconnect code needs.

Note that this will only show up as a bug with "doesn't have
mpu register target base" boot errors when the legacy platform
data is removed.
Signed-off-by: NTony Lindgren <tony@atomide.com>
      d6e1a238
    • T
      ARM: dts: Add missing smartreflex node and binding for omap4 · 514b2da4
      由 Tony Lindgren 提交于 
      We are missing smartreflex device tree nodes for omap4 with
their related "ti,hwmods" properties that the SoC interconnect
code needs.

Note that this will only show up as a bug with "doesn't have
mpu register target base" boot errors when the legacy platform
data is removed.

And since we're missing the device tree binding for smartreflex,
let's also add it and document the existing omap3 use too.

Note that the related driver also needs to be updated to probe
using device tree and get the platform data passed to it using
auxdata with arch/arm/mach-omap2/pdata-quirks.c.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: Tero Kristo <t-kristo@ti.com>
Acked-by: NRob Herring <robh+dt@kernel.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      514b2da4
    • T
      ARM: dts: Add missing hwmods property for omap4 dma · 370ad6b4
      由 Tony Lindgren 提交于 
      On omap4, we are missing a ti,hwmods property for dma that the
that the SoC interconnect code needs.

Note that this will only show up as a bug with "doesn't have
mpu register target base" boot errors when the legacy platform
data is removed.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      370ad6b4
    • T
      ARM: dts: Add missing properties for omap4 control modules · 1d6a332a
      由 Tony Lindgren 提交于 
      On omap4, we are missing several ti,hwmods properties and IO
ranges for system control modules. These are needed by the SoC
interconnect code.

Note that this will only show up as a bug with "doesn't have
mpu register target base" boot errors when the legacy platform
data is removed.

In order to add these, we need to move omap4_pmx_wkup to be a
child of omap4_padconf_wkup.

On omap4 there are separate modules for control module and
control module pads. For control module core, we have this
already configured except for the missing ti,hwmods and reg
entries.

Cc: Mark Rutland <mark.rutland@arm.com>
Acked-by: NRob Herring <robh+dt@kernel.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      1d6a332a
    • T
      ARM: dts: Configure pmu without interrupt for omap4430 · b0142a10
      由 Tony Lindgren 提交于 
      On omap4430, the PMU is not configure unlike on omap4460 because
of the missing handling.

The missing pmu node with the missing ti,hwmods entry will cause
boot time errors when the legacy platform data is removed as
the SoC interconnect code needs it.

Note that this will only show up as a bug with "doesn't have
mpu register target base" boot errors when the legacy platform
data is removed.

Let's fix the issue by configuring PMU but without the interrupts.
Then when cross trigger interface (CTI) is supported, we can add
interrupts also for omap4430.

Cc: Jon Hunter <jonathanh@nvidia.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      b0142a10
    • T
      ARM: dts: Add missing dma hwmods property for omap3 · f0f838fd
      由 Tony Lindgren 提交于 
      On omap3, we are missing a ti,hwmods property for dma that
the SoC interconnect code needs.

Note that this will only show up as a bug with "doesn't have
mpu register target base" boot errors when the legacy platform
data is removed.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>
      f0f838fd
  9. 31 8月, 2017 3 次提交
  11. 28 8月, 2017 6 次提交
  13. 27 8月, 2017 1 次提交
  15. 24 8月, 2017 1 次提交
  17. 23 8月, 2017 5 次提交
  19. 22 8月, 2017 2 次提交
  21. 21 8月, 2017 7 次提交