arm: zynq: Label whole PL part as fpga_full region

This will simplify dt overlay structure for the whole PL.
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>

arch/arm/boot/dts/zynq-7000.dtsi

@@ -42,6 +42,14 @@
 		};
 	};
 
+	fpga_full: fpga-full {
+		compatible = "fpga-region";
+		fpga-mgr = <&devcfg>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+	};
+
 	pmu@f8891000 {
 		compatible = "arm,cortex-a9-pmu";
 		interrupts = <0 5 4>, <0 6 4>;