- 15 12月, 2010 2 次提交
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由 Sascha Hauer 提交于
This iomux file has been constructed from the Freescale pinmux tool. It contains all pins from the tool, but the datasheet lists some configurations not present in the tool, these are not yet added. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Lothar Waßmann 提交于
This patch actually replaces the 'struct pad_desc' with a u64 cookie to facilitate adding platform specific pad_ctrl settings to an existing pad definition. So, instead of: iomux_v3_cfg_t power_key = MX51_PAD_EIM_A27__GPIO_2_21; power_key.pad_ctrl = MX51_GPIO_PAD_CTRL_2; mxc_iomux_v3_setup_pad(&power_key); one can write: mxc_iomux_v3_setup_pad((MX51_PAD_EIM_A27__GPIO_2_21 & ~MUX_PAD_CTRL_MASK) | MX51_GPIO_PAD_CTRL_2); Patch applies to branch 'imx-for-2.6.38' of git://git.pengutronix.de/git/imx/linux-2.6Signed-Off-By: NLothar Waßmann <LW@KARO-electronics.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 14 12月, 2010 7 次提交
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由 Fabio Estevam 提交于
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Arnaud Patard (Rtp) 提交于
When building as module: ERROR: "cpufreq_gov_performance" [arch/arm/plat-mxc/cpufreq.ko] undefined! WARNING: modpost: Found 1 section mismatch(es). To see full details build your kernel with: 'make CONFIG_DEBUG_SECTION_MISMATCH=y' make[1]: *** [__modpost] Error 1 make: *** [modules] Error 2 It's due to the driver using CPUFREQ_DEFAULT_GOVERNOR, even it should not (see commit 8122c6ce in Linus tree), so remove it. Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Peter Horton 提交于
Add support for FIQ on mx51 TZIC TZIC changes tested with FIQ audio on an mx51 board AVIC changes build with mx3_defconfig, not tested Signed-off-by: NPeter Horton <phorton@bitbox.co.uk> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Fabio Estevam 提交于
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Fabio Estevam 提交于
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Peter Horton 提交于
Add SSI3 to MX51 Signed-off-by: NPeter Horton <phorton@bitbox.co.uk> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Fabio Estevam 提交于
Use clk_get to acquire the watchdog clock and also avoid hardcoding the clock name. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 08 12月, 2010 3 次提交
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由 Fabio Estevam 提交于
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Fabio Estevam 提交于
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Fabio Estevam 提交于
MX51 has two watchdog modules. Add support for both of them. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 03 12月, 2010 9 次提交
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由 Arnaud Patard (Rtp) 提交于
Currently, to define a GPIO number, we're using something like : #define EFIKAMX_PCBID0 (2*32 + 16) to define GPIO 3 16. This is not really readable and it's error prone imho (note the 3 vs 2). So, I'm introducing a new macro to define this in a better way. Now, the code sample become : #define EFIKAMX_PCBID0 IMX_GPIO_NR(3, 16) v2: - move to gpio.h - add parens & spaces - switch to IMX_GPIO_NR instead of MX51_GPIO_NR Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org> Cc: Amit Kucheria <amit.kucheria@linaro.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Eric Bénard <eric@eukrea.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Fabio Estevam 提交于
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Fabio Estevam 提交于
Introduce SOC_IMX51 to keep consistency with the other i.MX devices Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Vasiliy Kulikov 提交于
clk_get() may return ERR_PTR(), if so propagate return code as imx_dma_init() return code. Signed-off-by: NVasiliy Kulikov <segoon@openwall.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Arnaud Patard (Rtp) 提交于
Commit 124bf94a "ARM: imx: fix name for functions adding sdhci-esdhc-imx devices" changed some devices and Kconfig entry and didn't change every places it should have. It's breaking efikamx build. I've fixed 3ds Kconfig entry as I believe it's broken there too. Signed-off-by: NArnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Uwe Kleine-König 提交于
In commit 2c20b9f1 (ARM: mx25: dynamically allocate mxc-ehci devices) I changed the offset to the value specified in the reference manual intending to test this change on hardware. This slipped through and now prooved to be wrong. So fix it and add a comment about the documentation being wrong. Reported-by: NJaume Ribot <jaume@fqingenieria.es> Cc: Michael Trimarchi <trimarchi@gandalf.sssup.it> Cc: Shawn Guo <shawn.gsc@gmail.com> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Eric Bénard 提交于
commits 2eb42d5c and 9e1dde33 renamed some defines but didn't fix all the places where these defines are used leading to a compile failure for USB on i.MX31, 35 and 27. Signed-off-by: NEric Bénard <eric@eukrea.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Sascha Hauer 提交于
The SDMA firmware consists of a ROM part and a RAM part. The ROM part is always present in the SDMA engine and is sufficient for many cases. This patch allows to pass in platform data containing the script addresses in ROM, so loading a firmware is optional now. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NDan Williams <dan.j.williams@intel.com>
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- 30 11月, 2010 1 次提交
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由 Peter Zijlstra 提交于
PowerPC relies on IRQ-disable to guard against RCU quiecent states, use the appropriate RCU call version. Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 29 11月, 2010 1 次提交
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由 Dinh Nguyen 提交于
Instead of reading the silicon version from ROM, we should read the SREV register from the IIM. Freescale has dropped all support for MX51 REV1.0, only MX51 REV 2.0 and 3.0 are valid. Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 26 11月, 2010 2 次提交
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由 Peter Zijlstra 提交于
This leads to a Kconfig dep inversion, x86 selects PERF_EVENT (due to a hw_breakpoint dep) but doesn't unconditionally provide HAVE_PERF_EVENT. (This can cause build failures on M386/M486 kernel .config's.) Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <20101117222055.982965150@chello.nl> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Don Zickus 提交于
In a kvm virt guests, the perf counters are not emulated. Instead they return zero on a rdmsrl. The perf nmi handler uses the fact that crossing a zero means the counter overflowed (for those counters that do not have specific interrupt bits). Therefore on kvm guests, perf will swallow all NMIs thinking the counters overflowed. This causes problems for subsystems like kgdb which needs NMIs to do its magic. This problem was discovered by running kgdb tests. The solution is to write garbage into a perf counter during the initialization and hopefully reading back the same number. On kvm guests, the value will be read back as zero and we disable perf as a result. Reported-by: NJason Wessel <jason.wessel@windriver.com> Patch-inspired-by: NPeter Zijlstra <peterz@infradead.org> Signed-off-by: NDon Zickus <dzickus@redhat.com> Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl> Cc: Stephane Eranian <eranian@google.com> LKML-Reference: <1290462923-30734-1-git-send-email-dzickus@redhat.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 25 11月, 2010 15 次提交
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由 Heiko Carstens 提交于
On each machine check all registers are revalidated. The save area for the clock comparator however only contains the upper most seven bytes of the former contents, if valid. Therefore the machine check handler uses a store clock instruction to get the current time and writes that to the clock comparator register which in turn will generate an immediate timer interrupt. However within the lowcore the expected time of the next timer interrupt is stored. If the interrupt happens before that time the handler won't be called. In turn the clock comparator won't be reprogrammed and therefore the interrupt condition stays pending which causes an interrupt loop until the expected time is reached. On NOHZ machines this can result in unresponsive machines since the time of the next expected interrupted can be a couple of days in the future. To fix this just revalidate the clock comparator register with the expected value. In addition the special handling for udelay must be changed as well. Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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由 Abhilash Kesavan 提交于
This patch fixes following warning messages when CONFIG_PM selected. In file included from arch/arm/mach-s5pv210/mach-smdkv210.c:34: arch/arm/plat-samsung/include/plat/pm.h:104: warning: 'struct sys_device' declared inside parameter list arch/arm/plat-samsung/include/plat/pm.h:104: warning: its scope is only this definition or declaration, which is probably not what you want arch/arm/plat-samsung/include/plat/pm.h:105: warning: 'struct sys_device' declared inside parameter list In file included from arch/arm/mach-s5pv210/mach-smdkc110.c:31: arch/arm/plat-samsung/include/plat/pm.h:104: warning: 'struct sys_device' declared inside parameter list arch/arm/plat-samsung/include/plat/pm.h:104: warning: its scope is only this definition or declaration, which is probably not what you want arch/arm/plat-samsung/include/plat/pm.h:105: warning: 'struct sys_device' declared inside parameter list Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: NSangbeom Kim <sbkim73@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Abhilash Kesavan 提交于
The UART3 submask should be 0x7 (SUBSRCPND[26:24]). Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: NSangbeom Kim <sbkim73@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Abhilash Kesavan 提交于
IRQ_S3C2443_UART3 is being used as the base when it should actually be IRQ_S3C2443_RX3 on S3C2443 and S3C2416 for the UART3. Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: NSangbeom Kim <sbkim73@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Darius Augulis 提交于
Don't rewrite clock config in UCON preconfigured by bootloader. No need to set 10th bit in UCON because [11:10] 2'b00 means source clock is PCLK too. If set, console does not work if bootloader has preconfigured [11:10] with 2'b00. If not set, console works with any bootloader config value (2'bxx). More information about clock setup in UCON is available in "S3C6410X RISC Microprocessor User's Manual, Revision 1.20" p. 31-13 (Chapter 31.6.2 UART CONTROL REGISTER). Signed-off-by: NDarius Augulis <augulis.darius@gmail.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Kukjin Kim 提交于
This patch fixes wrong s3c_gpio_cfgpull with s3c_gpio_setpull. Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Vasily Khoruzhick 提交于
Replace in s3c_gpio_cfgpull with s3c_gpio_setpull. Signed-off-by: NVasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Paul Walmsley 提交于
The console semaphore must be held while the OMAP UART devices are disabled, lest a console write cause an ARM abort (and a kernel crash) when the underlying console device is inaccessible. These crashes only occur when the console is on one of the OMAP internal serial ports. While this problem has been latent in the PM idle loop for some time, the crash was not triggerable with an unmodified kernel until commit 6f251e9d ("OMAP: UART: omap_device conversions, remove implicit 8520 assumptions"). After this patch, a console write often occurs after the console UART has been disabled in the idle loop, crashing the system. Several users have encountered this bug: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38396.html http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36602.html The same commit also introduced new code that disabled the UARTs during init, in omap_serial_init_port(). The kernel will also crash in this code when earlyconsole and extra debugging is enabled: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36411.html The minimal fix for the -rc series is to hold the console semaphore while the OMAP UARTs are disabled. This is a somewhat overbroad fix, since the console may not be located on an OMAP UART, as is the case with the GPMC UART on Zoom3. While it is technically possible to determine which devices the console or earlyconsole is actually running on, it is not a trivial problem to solve, and the code to do so is not really appropriate for the -rc series. The right long-term fix is to ensure that no code outside of the OMAP serial driver can disable an OMAP UART. As I understand it, code to implement this is under development by TI. This patch is a collaboration between Paul Walmsley <paul@pwsan.com> and Tony Lindgren <tony@atomide.com>. Thanks to Ming Lei <tom.leiming@gmail.com> and Pramod <pramod.gurav@ti.com> for their feedback on earlier versions of this patch. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Acked-by: NKevin Hilman <khilman@deeprootsystems.com> Cc: Ming Lei <tom.leiming@gmail.com> Cc: Pramod <pramod.gurav@ti.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jean Pihet <jean.pihet@newoldbits.com> Cc: Govindraj.R <govindraj.raja@ti.com>
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由 Kevin Hilman 提交于
Add additional check to omap_uart_resume_idle() so that only enabled (specifically, idle-enabled) UARTs are allowed to resume. This matches the existing check in prepare idle. Without this patch, the system will hang if a board is configured to register only some uarts instead of all of them and PM is enabled. Cc: Govindraj R. <govindraj.raja@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> [tony@atomide.com: updated description] Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Andrew Morton 提交于
When compiling arch/x86/kernel/early_printk_mrst.c with i386 allmodconfig, gcc-4.1.0 generates an out-of-line copy of __set_fixmap_offset() which contains a reference to __this_fixmap_does_not_exist which the compiler cannot elide. Marking __set_fixmap_offset() as __always_inline prevents this. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Feng Tang <feng.tang@intel.com> Acked-by: NRandy Dunlap <randy.dunlap@oracle.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Will Newton 提交于
Disable the winch irq early to make sure we don't take an interrupt part way through the freeing of the handler data, resulting in a crash on shutdown: winch_interrupt : read failed, errno = 9 fd 13 is losing SIGWINCH support ------------[ cut here ]------------ WARNING: at lib/list_debug.c:48 list_del+0xc6/0x100() list_del corruption, next is LIST_POISON1 (00100100) 082578c8: [<081fd77f>] dump_stack+0x22/0x24 082578e0: [<0807a18a>] warn_slowpath_common+0x5a/0x80 08257908: [<0807a23e>] warn_slowpath_fmt+0x2e/0x30 08257920: [<08172196>] list_del+0xc6/0x100 08257940: [<08060244>] free_winch+0x14/0x80 08257958: [<080606fb>] winch_interrupt+0xdb/0xe0 08257978: [<080a65b5>] handle_IRQ_event+0x35/0xe0 08257998: [<080a8717>] handle_edge_irq+0xb7/0x170 082579bc: [<08059bc4>] do_IRQ+0x34/0x50 082579d4: [<08059e1b>] sigio_handler+0x5b/0x80 082579ec: [<0806a374>] sig_handler_common+0x44/0xb0 08257a68: [<0806a538>] sig_handler+0x38/0x50 08257a78: [<0806a77c>] handle_signal+0x5c/0xa0 08257a9c: [<0806be28>] hard_handler+0x18/0x20 08257aac: [<00c14400>] 0xc14400 Signed-off-by: NWill Newton <will.newton@gmail.com> Acked-by: NWANG Cong <xiyou.wangcong@gmail.com> Cc: Jeff Dike <jdike@addtoit.com> Cc: <stable@kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 James Jones 提交于
The find_next_bit, find_first_bit, find_next_zero_bit and find_first_zero_bit functions were not properly clamping to the maxbit argument at the bit level. They were instead only checking maxbit at the byte level. To fix this, add a compare and a conditional move instruction to the end of the common bit-within-the- byte code used by all the functions and be sure not to clobber the maxbit argument before it is used. Cc: <stable@kernel.org> Reviewed-by: NNicolas Pitre <nicolas.pitre@linaro.org> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NJames Jones <jajones@nvidia.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Chris Metcalf 提交于
This change fixes a bug that memchr() will read the first word of the source even if the length is zero. Ironically, the code was originally written with a test to avoid exactly this problem, but to make the code conform to Linux coding standards with all declarations preceding all statements, the first load from memory was moved up above that test as the initial value for a variable. The change just moves all the variable declarations to the top of the file, with no initializers, so that the test can also be at the top of the file. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
glibc assumes that it can count /sys/devices/system/cpu/cpu* to get the number of configured cpus. For this to be valid on tile, we need to generate a "cpu" entry for all cpus, including the ones that are not currently allocated for Linux's use. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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由 Chris Metcalf 提交于
This change enables PCI root complex support for TILEPro. Unlike TILE-Gx, TILEPro has no support for memory-mapped I/O, so the PCI support consists of hypervisor upcalls for PIO, DMA, etc. However, the performance is fine for the devices we have tested with so far (1Gb Ethernet, SATA, etc.). The <asm/io.h> header was tweaked to be a little bit more aggressive about disabling attempts to map/unmap IO port space. The hacky <asm/pci-bridge.h> header was rolled into the <asm/pci.h> header and the result was simplified. Both of the latter two headers were preliminary versions not meant for release before now - oh well. There is one quirk for our TILEmpower platform, which accidentally negotiates up to 5GT and needs to be kicked down to 2.5GT. Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
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