- 29 5月, 2013 3 次提交
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由 Stephen Warren 提交于
Use the GIC and standard IRQ binding defines in all IRQ specifiers. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
Use TEGRA_GPIO() macro to name all GPIOs referenced by GPIO properties, and some interrupts properties. Use standard GPIO flag defines too. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
Replace /include/ (dtc) with #include (C pre-processor) for all Tegra DT files, so that gcc -E handles the entire include tree, and hence any of those files can #include some other file e.g. for constant definitions. This allows future use of #defines and header files in order to define names for various constants, such as the IDs and flags in GPIO specifiers. Use of those features will increase the readability of the device tree files. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 18 5月, 2013 1 次提交
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由 Venu Byravarasu 提交于
This patch updates all Tegra board files so that they contain all the properties required by the updated USB DT binding. Note that this patch only adds the new properties and does not yet remove the old properties, in order to maintain bisectability. The old properties will be removed once the driver has been updated to assume the new bindings. Signed-off-by: NVenu Byravarasu <vbyravarasu@nvidia.com> [swarren: fixed some newly added regulator-name properties to better match schematic, avoided duplicate regulator-name on Whistler.] Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 05 4月, 2013 1 次提交
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由 Joseph Lo 提交于
Adding the PM configuration of PMC when the platform support suspend function. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 04 4月, 2013 1 次提交
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由 Joseph Lo 提交于
Adding the bindings of the clock source of PMC in DT. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 12 3月, 2013 1 次提交
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由 Joseph Lo 提交于
The GPIO pin of SD slot card detection should active low. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 29 1月, 2013 1 次提交
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由 Lucas Stach 提交于
No Tegra20 Platform is running PLL_P at another rate than 216MHz, nor is any using any other PLL as UART source clock. Move attribute into SoC level dtsi file to slim down board DT files. Signed-off-by: NLucas Stach <dev@lynxeye.de> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 17 11月, 2012 1 次提交
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由 Thierry Reding 提交于
Hook up the required regulators, I2C DDC adapter and hotplug detect GPIO to the Tamonten HDMI output. Carrier boards still need to explicitly enable the output to use it. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 16 11月, 2012 2 次提交
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由 Thierry Reding 提交于
The Tamonten SOM has an ON Semiconductor NCT1008 connected to the DVC bus which is used to measure the ambient (local) temperature as well as the on-die (remote) temperature. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Thierry Reding 提交于
This commit allows the I2C2 controller on Tegra20 to be routed either to the DDC or the PTA pin group at runtime. On Tamonten this allows the I2C bus to be used for the DDC of the HDMI connector or to access I2C chips on the carrier board. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 06 11月, 2012 1 次提交
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由 Stephen Warren 提交于
Commit 13511def "regulator: deprecate regulator-compatible DT property" now allows for simpler content within the regulators node within a PMIC. Modify all the Tegra device tree files to take advantage of this. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NThierry Reding <thierry.reding@avionic-design.de>
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- 20 9月, 2012 1 次提交
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由 Thierry Reding 提交于
The Tamonten is an NVIDIA Tegra2 based system-on-module (SOM) that is designed to cover a broad range of applications. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 07 9月, 2012 1 次提交
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由 Stephen Warren 提交于
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this. Three data sources were used for the data encoded here: * The HW defaults, as extracted from real HW. * The schematic, which specifies a voltage for each rail in the signal names. * The AC100 kernel used by the Ubuntu port: repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git branch chromeos-ac100-3.0 file arch/arm/mach-tegra/board-paz00-power.c For many rails, the constraints in that tree specified differing min and max voltages. In all cases, the min value was ignored, since there's no need currently to vary any of the voltages at run-time. DVFS might change this in the future. In most cases these sources all matched. Differences are: sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max of 1.3v, but this higher voltage was only applied to HW by DVFS code, which isn't currently supported in mainline. sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max of 1.125v, but this higher voltage was only applied to HW by DVFS code, which isn't currently supported in mainline. ldo3: The HW default is on. marvin24's kernel didn't specify always-on, but since the board wasn't marked as having fully constrained regulators, the rail was not turned off, so the difference had no effect. The rail is needed for USB. ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However, since this regulator is used for the same purpose as on other boards that require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT VDAC on Tegra, and so in practice is unlikely to be used, even though it is actaully hooked up in HW. Portions based on work by Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com> Tested-by: Marc Dietrich <marvin24@gmx.de> # v2 Acked-by: NLaxman Dewangan <ldewangan@nvidia.com>
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- 21 6月, 2012 1 次提交
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由 Stephen Warren 提交于
Most ARM ${board}.dts files are already named ${soc}-${board}.dts. This change modifies the Tegra board files to be named the same way for consistency. Once a related change is made in U-Boot, this will cause both U-Boot and the kernel to use the same names for the .dts files and SoC identifiers, thus allowing U-Boot's recently added "soc" and "board" environment variables to be used to construct the name of Tegra .dtb files, and hence allow board-generic U-Boot bootcmd scripts to be written. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 12 6月, 2012 1 次提交
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由 Stephen Warren 提交于
The driver supports the new bus-width property, so remove the legacy support-8bit property. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 15 5月, 2012 7 次提交
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由 Arnd Bergmann 提交于
This patch unifies the current DT MMC bindings documentation and code, adds generic MMC DT bindings documentation, and updates .dts files for consistency. [cjb: typo fixes, addition of max-frequency property] Signed-off-by: NChris Ball <cjb@laptop.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Stephen Warren 提交于
In tegra*.dtsi, set status="disable" for all HW modules that the board design may choose not to use. Update all boards to specifically enable any of those modules that are useful by setting status="okay". This makes board files say which features they do use, rather than which they don't, which feels more logical. It also makes the .dts files slightly smaller, at least for existing content. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Put properties in order compatible, reg, interrupts, then anything else the node has. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Sort the nodes according to the following rules: * First, any overrides for properties or nodes created by included files, in the order they appeared in the include file. * Second, any nodes with a reg property, in numerical order. * Third, any nodes without a reg property, in alphabetical order of node name. The second sorting rule at least will probably help if/when we need to explicitly insert nodes for the various busses in Tegra; that will just be an indentation change rather than also a node re-ordering. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Ensure that all Tegraa GPIO specifiers contain a comment indicating which GPIO name the number refers to. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
DT node names only need to include the unit address if it's required to make the node name unique. Remove the unnecessary unit addresses. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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- 26 4月, 2012 2 次提交
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由 Stephen Warren 提交于
Ensure that the USB ULPI signals are not tri-stated, and have no pull- up or pull-down. Ensure that the pingroup hosting the USB ULPI reset signal (GPIO PV0 or PV1 depending on the board, so UAC) is not tri-stated, and has no pull- up or pull-down. This change appears larger than it is due to the grouping and sorting of the pin configuration data. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
ULPI PHYs have a reset signal, and different boards use a different GPIO for this task. Add a property to device tree to represent this. I'm not sure if adding this property to the EHCI controller node is entirely correct; perhaps eventually we should have explicit separate nodes for the various PHYs. However, we don't have that right now, so this binding seems like a reasonable choice. Cc: <devicetree-discuss@lists.ozlabs.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: <linux-usb@vger.kernel.org> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 19 4月, 2012 1 次提交
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由 Stephen Warren 提交于
This adds a complete pinmux configuration to all Tegra20 device tree files. This allows removal of board-dt-tegra20.c's use of the pinmux board files, and the special device tree handling in board-pinmux.c. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NOlof Johansson <olof@lixom.net>
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- 05 3月, 2012 1 次提交
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由 Leon Romanovsky 提交于
This patch adds device tree binding of digital microphone to PAZ00 board. Signed-off-by: NLeon Romanovsky <leon@leon.nu> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 07 2月, 2012 10 次提交
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由 Marc Dietrich 提交于
This adds the wifi led bound to the rfkill0 event to the device tree of paz00. Signed-off-by: NMarc Dietrich <marvin24@gmx.de> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Marc Dietrich 提交于
This adds the wakeup gpio which is connected to the embedded controller to the device tree of paz00. Signed-off-by: NMarc Dietrich <marvin24@gmx.de> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Marc Dietrich 提交于
Add the ADT7461 temperature monitoring IC which is connected via the DVC controller. Signed-off-by: NMarc Dietrich <marvin24@gmx.de> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Marc Dietrich 提交于
UARTC is connected to the mini-pcie port. Signed-off-by: NMarc Dietrich <marvin24@gmx.de> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Marc Dietrich 提交于
The power gpio for the external memory card was specified wrongly. Replace it with the correct value (tested with warmboot with fastboot). Signed-off-by: NMarc Dietrich <marvin24@gmx.de> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Leon Romanovsky 提交于
This patch is adding device tree support of headset autodetection on PAZ00 board. Signed-off-by: NLeon Romanovsky <leon@leon.nu> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Leon Romanovsky 提交于
This patch adds initial device tree support of ALC5632 sound codec and machine driver for PAZ00 board. The implementation is based on the WM8903 codec. Signed-off-by: NMarc Dietrich <marvin24@gmx.de> Signed-off-by: NLeon Romanovsky <leon@leon.nu> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Add complete bindings to instantiate and configure the codec and top-level audio complex on all currently supported boards using the Tegra+WM8903 audio driver. On those boards, disable the I2S2 controller since it isn't used. On boards not using the WM8903 codec, disable all the audio devices; they can be re-enabled once the relevant codec and ASoC machine drivers have been ported to device-tree. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Marc Dietrich 提交于
UARTC is connected to the mini-pcie port. Signed-off-by: NMarc Dietrich <marvin24@gmx.de> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Marc Dietrich 提交于
The power gpio for the external memory card was specified wrongly. Replace it with the correct value (tested with warmboot with fastboot). Signed-off-by: NMarc Dietrich <marvin24@gmx.de> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 08 12月, 2011 3 次提交
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由 pdeschrijver@nvidia.com 提交于
Convert tegra20 IRQ intialization to the GIC devicetree binding. Modify the interrupt definitions in the dts files according to Documentation/devicetree/bindings/arm/gic.txt v3 (swarren): * Moved of_irq_init() call into board-dt.c to avoid ifdef'ing it. - Even with a dummy replacement if !CONFIG_OF, the reference from tegra_dt_irq_match[] to gic_of_init() would still have to be ifdef'd - It's plausible that tegra_dt_irq_match[] may need to contain more entries in the future, and defining what they are seems more suitable for board-dt.c than irq.c v2 (swarren): * Removed some stale GIC init code from board-dt.c * Undid some accidental 0x -> 0x0 search/replace. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Acked-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NStephen Warren <swarren@nvidia.com> [olof: added include of <asm/hardware/gic.h> for compile to pass] Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
The command-lines present in the existing /chosen node are not necessarily correct for all users. Ideally, we should simply use the command-line supplied by the boot-loader. In fact, using the boot-loader's cmdline is quite easy; either the bootloader fully supports DT, in which case it can modify the DT passed to the kernel to include its command-line, or CONFIG_APPENDED_DTB can be used in conjunction with CONFIG_ARM_ATAG_DTB_COMPAT, and the kernel will substitute the bootloader's command-line into the DT. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
There are no drivers in the kernel at present which can make use of the memory reserved by /memreserve/, so there is no point reserving it. Remove /memreserve/ to allow the user more memory. It's also unclear whether any future driver would actually require /memreserve/, or allocate memory through some other mechanism. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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