Add a pinctrl for I2C1 used on imx6q/dl-sabresd.
Signed-off-by: NNicolin Chen <b42378@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add a group to the usdhc2 and enet pinctrl.
Signed-off-by: NChristian Hemp <c.hemp@phytec.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add two pinctrls for WEIM:
   one for the weim nor, another for the chipselect.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The gpmi does not use the MX6Q_PAD_NANDF_CS2__NAND_CE2_B and
MX6Q_PAD_NANDF_CS3__NAND_CE3_B.

Just remove them.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NPavel Machek <pavel@ucw.cz>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add ldb device tree node and clock lookups.
Signed-off-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Allow AUD3 to be used as audio output from the audmux block.
Signed-off-by: NSean Cross <xobs@kosagi.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add groups to allow i2c2 and i2c3 to be used on imx6q.
Signed-off-by: NSean Cross <xobs@kosagi.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add a group of pins to allow ecspi3 to be used on imx6q.
Signed-off-by: NSean Cross <xobs@kosagi.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Currently, all imx pinctrl drivers maintain a big array of struct
imx_pin_reg which hard-codes data like register offset and mux mode
setting for each pin function.  Every time a new imx SoC support is
added, we need to add such a big mount of data.  With moving to single
kernel build, it's only matter of time to be blamed on memory consuming.

With DTC pre-processor support in place, the patch moves all these data
into device tree by redefining the PIN_FUNC_ID in imxXX-pinfunc.h and
changing the PIN_FUNC_ID parsing code a little bit.

The pin id gets re-numbered based on mux register offset, or config
register offset if the pin has no mux register, so that kernel can
identify the pin id from register offsets provided by device tree.

As a bonus point of the change, those arbitrary magic numbers standing
for particular PIN_FUNC_ID in device tree sources are now replaced by
macros to improve the readability of dts files.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NDong Aisheng <dong.aisheng@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

Replace /include/ (dtc) with #include (C pre-processor) for all imx DT
files, so that gcc -E handles the entire include tree, and hence any of
those files can #include some other file e.g. for constant definitions.

This allows future use of #defines and header files in order to define
names for various constants, such as pinctrl settings. Use of those
features will increase the readability of the device tree files.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add USB support for imx6q sabresd board
Signed-off-by: NPeter Chen <peter.chen@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add dtsi for imx6q and imx6dl with non-common blocks moved into there.
Major differences between imx6dl and imx6q:

 * Dual vs. Quad cores
 * single vs. dual IPU
 * 128 vs. 256 KB OCRAM
 * imx6q: ECSPI5, OpenVG (GC355), SATA
 * imx6dl: I2C4, PXP, EPDC, LCDIF
 * iomuxc/pads definition
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

i.MX6 Quad and i.MX6 DualLite is similar enough to share one dtsi
file, so rename imx6q.dtsi to imx6qdl.dtsi preparing for the addition
of imx6dl support.

Another member of i.MX6 series i.MX6 SoloLite is different enough
from the other two, so it will stand as a separate dtsi.  That's why
we rename to imx6qdl.dtsi not imx6.dtsi.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

For ANATOP LDOs, vddcpu, vddsoc and vddpu
have step time settings in the misc2 register, need
to add necessary step time info for these three LDOs,
then regulator driver can add necessary delay based on
these settings.

offset 0x170:
bit [24-25]: vddcpu
bit [26-27]: vddpu
bit [28-29]: vddsoc

field definition:
0'b00: 64 cycles of 24M clock;
0'b01: 128 cycles of 24M clock;
0'b02: 256 cycles of 24M clock;
0'b03: 512 cycles of 24M clock;
Signed-off-by: NAnson Huang <b20788@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Update operating-points per hardware document and add support for
1 GHz and 1.2 GHz frequencies.

400 MHz, 800 MHz and 1 GHz should be supported by all i.MX6Q chips,
while 1.2 GHz support needs to know from OTP fuse bit.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Remove silicon version from SDMA firmware.

This makes it consistent with other i.MX SoCs firmware names.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Following omap3-evm.dts way, it changes all imx dts files to use label
in board dts to refer to nodes defined by soc dtsi.  Thus, the board
dts files become easier to read and edit with the least indentation
levels.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

ptp should use enet_ref instead of pll6_enet
pll6_enet is fixed 500Mhz.
There are divider between enet_ref and pll6_enet
Signed-off-by: NFrank Li <Frank.Li@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Acked-by: NShawn Guo <shawn.guo@linaro.org>

This adds the IPU devices to the devicetree.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Acked-by: NShawn Guo <shawn.guo@linaro.org>

Having labels before each node allows board bindings to reference
to nodes by using the &nodename {} notation. This way boards do not
have to resemble the whole devicetree layout. Due to less indention
needed the board files also get better readability. Since the label
make the documentation behind the nodes unnecessary it is removed.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

It enables cpufreq support for imx6q with generic cpufreq-cpu0 driver.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

According to Documentation/devicetree/bindings/mmc/mmc.txt bus-width
is a mandatory property. While this is currently enforced nowhere, it's
a good habit to just add the property now to allow to add common helper
functionality for the mmc property parsing later.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add ENET 1588 clock input pin
MX6Q_PAD_GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT
and anatop PLL8 clock source for ENET
Signed-off-by: NFrank Li <Frank.Li@freescale.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

This is some amount of work left/forgot from device tree conversion.
Instead of checking cpu_is_xxx to determine the controller type, the
driver should use platform_device_id, which should match the device
tree compatible string.

The patch changes the driver to use platform_device_id rather than
cpu_is_xxx to determine the controller type/version.  It also updates
the platform code and device tree source accordingly.

As the result, mach/hardware.h inclusion gets removed from the driver.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Cc: linux-i2c@vger.kernel.org

Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Using syscon to access anatop register.
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

Include headfile for easy using.
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NDong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>

- add usbmisc device
- set property fsl,usbmisc for usb controllers
- set disable-over-current for imx6q-sabrelite usb otg
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

It really becomes an maintenance issue that every time a device needs
to look up (clk_get) a clock we have to patch kernel clock file to call
clk_register_clkdev for that clock.

Since clock DT support which is meant to resolve clock lookup in device
tree is in place, the patch moves imx6q client devices' clock lookup
over to device tree, so that any new lookup to be added at later time
can just get done in DT instead of kernel.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add pinctrl settings for existing devices in imx6q-sabresd.dts.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add missing pinctrl of uart and enet for imx6q-arm2 board.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add missing pinctrl of usdhc and enet for imx6q-sabrelite board.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Sort iomuxc sub-nodes in name so that the node can be located a little
bit easier.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Name iomuxc sub-nodes following pin function and hardware manual.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Change the indentation for property fsl,pins a little bit, so that
the first and the last line get the same indentation with all other
lines.  Then it will be easier to copy and past any of these lines.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Instead of enabling the watchdog in each individual dts file, select in
the SoC dtsi file instead.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>