- 04 6月, 2013 1 次提交
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由 Willy Tarreau 提交于
These aliases are used when feeding the DT from ATAGS to set the devices MAC addresses. Signed-off-by: NWilly Tarreau <w@1wt.eu> Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 28 5月, 2013 1 次提交
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由 Thomas Petazzoni 提交于
The length of the registers area for the Marvell 370/XP Ethernet controller was incorrect in the .dtsi: 0x2400 while it should have been 0x4000. Until now, this problem wasn't noticed because there was a large static mapping for all I/Os set up by ->map_io(). But since we're going to get rid of this static mapping, we need to ensure that the register areas are properly sized. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 13 5月, 2013 1 次提交
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由 Thomas Petazzoni 提交于
The mpic alias is already defined in the common armada-370-xp.dtsi, so there's no need to repeat it at the armada-xp.dtsi and armada-370.dtsi level. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 15 4月, 2013 3 次提交
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由 Gregory CLEMENT 提交于
Introduce a 'internal-regs' subnode, under which all devices are moved. This is not really needed for now, but will be for the mvebu-mbus driver. This generates a lot of code movement since it's indenting by one more tab all the devices. So it was a good opportunity to fix all the bad indentation. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Gregory CLEMENT 提交于
This conversion will allow to keep 32 bits addresses for the internal registers whereas the memory of the system will be 64 bits. Later it will also ease the move of the mvebu-mbus driver to the device tree support. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
reorganize the .dts and .dtsi files so that all devices are under the soc { } node (currently some devices such as the interrupt controller, the L2 cache and a few others are outside). Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 03 4月, 2013 1 次提交
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由 Ezequiel Garcia 提交于
This patch adds support for the thermal controller available in all Armada XP boards. This controller has two 4-byte registers: one to read the thermal sensor, the other for sensor initialization. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 09 3月, 2013 1 次提交
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由 Heikki Krogerus 提交于
Setting the reg-io-width to 1 byte represents more accurate description of the HW. This will fix an issue where UART driver causes kernel panic during bootup. Gregory CLEMENT traced the issue to autoconfig() in 8250.c, where the existence of FIFO is checked from UART_IIR register. The register is now read as 32-bit value as the reg-io-width is set to 4-bytes. The retuned value seems to contain bogus data for bits 31:8, causing the issue. Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Tested-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: NMasami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 01 3月, 2013 2 次提交
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由 Ezequiel Garcia 提交于
The Armada 370 and Armada XP SoC has an Orion EHCI USB controller. This patch adds support for this controller in Armada 370 and Armada XP SoC common device tree files. Cc: Lior Amsalem <alior@marvell.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NNobuhiro Iwamatsu <iwamatsu@nigauri.org> Tested-by: NFlorian Fainelli <florian@openwrt.org> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Gregory CLEMENT 提交于
This patch makes the interrupt controller driver more SMP aware for the Armada XP SoCs. It adds the support for the per-CPU irq. It also adds the implementation for the set_affinity hook. Patch initialy wrote by Yehuda Yitschak and reworked by Gregory CLEMENT. Signed-off-by: NYehuda Yitschak <yehuday@marvell.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 07 1月, 2013 2 次提交
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由 Thomas Petazzoni 提交于
We originally thought that the MV78230 variant of the Armada XP had four Ethernet interfaces, like the other variants MV78260 and MV78460. In fact, this is not true, and the MV78230 has only three Ethernet interfaces. So, the definitions of the Ethernet interfaces is now done as follows: * armada-370-xp.dtsi: definitions of the first two interfaces, that are common to Armada 370 and Armada XP * armada-xp.dtsi: definition of the third interface, common to all Armada XP variants. * armada-xp-mv78260.dtsi and armada-xp-mv78460.dtsi: definition of the fourth interface. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Gregory CLEMENT 提交于
The UART controller used in the Armada 370 and Armada XP SoCs is the Synopsys DesignWare 8250 (aka Synopsys DesignWare ABP UART). The improper use of the ns16550 can lead to a kernel oops during boot if a character is sent to the UART before the initialization of the driver. The DW APB has an extra interrupt that gets raised when writing to the LCR when busy. This explains why we need to use dw-apb-uart driver to handle this. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 27 11月, 2012 1 次提交
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由 Gregory CLEMENT 提交于
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NYehuda Yitschak <yehuday@marvell.com> Tested-and-reviewed-by: NYehuda Yitschak <yehuday@marvell.com> Tested-and-reviewed-by: NLior Amsalem <alior@marvell.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 21 11月, 2012 3 次提交
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由 Gregory CLEMENT 提交于
This patch enhances the IRQ controller driver to add support for Inter-Processor-Interrupts that are needed to enable SMP support. Signed-off-by: NYehuda Yitschak <yehuday@marvell.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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由 Gregory CLEMENT 提交于
The Armada 370 and Armada XP SOCs have a power management service unit which is responsible for powering down and waking up CPUs and other SOC units. This patch adds support for this unit. Signed-off-by: NYehuda Yitschak <yehuday@marvell.com> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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由 Thomas Petazzoni 提交于
The mvneta driver now understands a standard 'clocks' clock pointer property in the Device Tree nodes for the Ethernet devices, so we add the right clock reference for the different Ethernet ports of the Armada 370/XP SoCs. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
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- 20 11月, 2012 2 次提交
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由 Thomas Petazzoni 提交于
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
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由 Gregory CLEMENT 提交于
Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by Gregory CLEMENT <gregory.clement@free-electrons.com>
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- 16 11月, 2012 1 次提交
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由 Thomas Petazzoni 提交于
The Armada 370 SoC has two network units, while the Armada XP has four network units. The first two network units are common to both the Armada XP and Armada 370, so they are added to armada-370-xp.dtsi, while the other two network units are specific to the Armada XP and therefore added to armada-xp.dtsi. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
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- 03 8月, 2012 1 次提交
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由 Thomas Petazzoni 提交于
The comment was wrongly referring to Armada 370 while the file is related to Armada XP. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 10 7月, 2012 1 次提交
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由 Thomas Petazzoni 提交于
[ben.dooks@codethink.co.uk: ensure error check on of_property_read_u32] [ben.dooks@codethink.co.uk: use mpic address instead of bus-unit's ] [ben.dooks@codethink.co.uk: BUG_ON() if the of_iomap() fails for mpic] [ben.dooks@codethink.co.uk: move mpic per-cpu register base ] [ben.dooks@codethink.co.uk: number fetch should use irqd_to_hwirq()] Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: NLior Amsalem <alior@marvell.com> Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk> Acked-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NYehuda Yitschak <yehuday@marvell.com> Tested-by: NLior Amsalem <alior@marvell.com>
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