- 25 5月, 2011 1 次提交
-
-
由 Mike Frysinger 提交于
Not sure when we stopped using this field, but nothing in the tree uses this now, so punt it. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
-
- 09 3月, 2010 1 次提交
-
-
由 Graf Yang 提交于
This functions are implicitly called by core functions like cpu_relax(), and since those functions may be called early on before common code has initialized the per-cpu data area, we need to tweak the stats gathering. Now the statistics are maintained in common bss which makes these funcs safe to use as soon as the C runtime env is setup. Signed-off-by: NGraf Yang <graf.yang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
-
- 07 10月, 2009 1 次提交
-
-
由 Robin Getz 提交于
Bill Gatliff & David Brownell pointed out we were missing some copyrights, and licensing terms in some of the files in ./arch/blackfin, so this fixes things, and cleans them up. It also removes: - verbose GPL text(refer to the top level ./COPYING file) - file names (you are looking at the file) - bug url (it's in the ./MAINTAINERS file) - "or later" on GPL-2, when we did not have that right It also allows some Blackfin-specific assembly files to be under a BSD like license (for people to use them outside of Linux). Signed-off-by: NRobin Getz <robin.getz@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
-
- 16 7月, 2009 1 次提交
-
-
由 Michael Hennerich 提交于
On Blackfin SMP, a per-cpu loops_per_jiffy is pointless since both cores always run at the same CCLK. In addition, the current implementation has flaws since the main consumer for loops_per_jiffy (asm/delay.h) uses the global kernel loops_per_jiffy and not the per_cpu one. So punt all of the per-cpu handling and go back to the global shared one. Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
-
- 13 6月, 2009 1 次提交
-
-
由 Sonic Zhang 提交于
The KGDB code uses this when switching processors to make sure the icache is in a valid state. Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
-
- 07 1月, 2009 2 次提交
-
-
由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com> Signed-off-by: NBryan Wu <cooloney@kernel.org>
-
由 Graf Yang 提交于
Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to Blackfin header files and machine common code Signed-off-by: NGraf Yang <graf.yang@analog.com> Signed-off-by: NBryan Wu <cooloney@kernel.org>
-
- 19 7月, 2008 1 次提交
-
-
由 Sonic Zhang 提交于
Remove the sram piece limitation and improve the performance to alloc/free sram piece data. Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NBryan Wu <cooloney@kernel.org>
-
- 08 5月, 2007 1 次提交
-
-
由 Bryan Wu 提交于
This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: NBryan Wu <bryan.wu@analog.com> Signed-off-by: NMariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: NAubrey Li <aubrey.li@analog.com> Signed-off-by: NJie Zhang <jie.zhang@analog.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-