1. 11 11月, 2008 1 次提交
  2. 31 10月, 2008 1 次提交
    • M
      powerpc: Fix swapcontext system for VSX + old ucontext size · 16c29d18
      Michael Neuling 提交于
      Since VSX support was added, we now have two sizes of ucontext_t;
      the older, smaller size without the extra VSX state, and the new
      larger size with the extra VSX state.  A program using the
      sys_swapcontext system call and supplying smaller ucontext_t
      structures will currently get an EINVAL error if the task has
      used VSX (e.g. because of calling library code that uses VSX) and
      the old_ctx argument is non-NULL (i.e. the program is asking for
      its current context to be saved).  Thus the program will start
      getting EINVAL errors on calls that previously worked.
      
      This commit changes this behaviour so that we don't send an EINVAL in
      this case.  It will now return the smaller context but the VSX MSR bit
      will always be cleared to indicate that the ucontext_t doesn't include
      the extra VSX state, even if the task has executed VSX instructions.
      
      Both 32 and 64 bit cases are updated.
      
      [paulus@samba.org - also fix some access_ok() and get_user() calls]
      
      Thanks to Ben Herrenschmidt for noticing this problem.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      16c29d18
  3. 15 7月, 2008 1 次提交
  4. 09 7月, 2008 1 次提交
  5. 03 7月, 2008 1 次提交
  6. 01 7月, 2008 3 次提交
    • M
      powerpc: Add VSX context save/restore, ptrace and signal support · ce48b210
      Michael Neuling 提交于
      This patch extends the floating point save and restore code to use the
      VSX load/stores when VSX is available.  This will make FP context
      save/restore marginally slower on FP only code, when VSX is available,
      as it has to load/store 128bits rather than just 64bits.
      
      Mixing FP, VMX and VSX code will get constant architected state.
      
      The signals interface is extended to enable access to VSR 0-31
      doubleword 1 after discussions with tool chain maintainers.  Backward
      compatibility is maintained.
      
      The ptrace interface is also extended to allow access to VSR 0-31 full
      registers.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      ce48b210
    • M
      powerpc: Introduce VSX thread_struct and CONFIG_VSX · c6e6771b
      Michael Neuling 提交于
      The layout of the new VSR registers and how they overlap on top of the
      legacy FPR and VR registers is:
      
                         VSR doubleword 0               VSR doubleword 1
                ----------------------------------------------------------------
        VSR[0]  |             FPR[0]            |                              |
                ----------------------------------------------------------------
        VSR[1]  |             FPR[1]            |                              |
                ----------------------------------------------------------------
                |              ...              |                              |
                |              ...              |                              |
                ----------------------------------------------------------------
        VSR[30] |             FPR[30]           |                              |
                ----------------------------------------------------------------
        VSR[31] |             FPR[31]           |                              |
                ----------------------------------------------------------------
        VSR[32] |                             VR[0]                            |
                ----------------------------------------------------------------
        VSR[33] |                             VR[1]                            |
                ----------------------------------------------------------------
                |                              ...                             |
                |                              ...                             |
                ----------------------------------------------------------------
        VSR[62] |                             VR[30]                           |
                ----------------------------------------------------------------
        VSR[63] |                             VR[31]                           |
                ----------------------------------------------------------------
      
      VSX has 64 128bit registers.  The first 32 regs overlap with the FP
      registers and hence extend them with and additional 64 bits.  The
      second 32 regs overlap with the VMX registers.
      
      This commit introduces the thread_struct changes required to reflect
      this register layout.  Ptrace and signals code is updated so that the
      floating point registers are correctly accessed from the thread_struct
      when CONFIG_VSX is enabled.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      c6e6771b
    • M
      powerpc: Fix MSR setting in 32 bit signal code · 9e751186
      Michael Neuling 提交于
      If we set the SPE MSR bit in save_user_regs we can blow away the VEC
      bit.  This doesn't matter in reality as they are in fact the same bit
      but looks bad.
      
      Also, when we add VSX in a later patch, we need to be able to set two
      separate MSR bits here.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      9e751186
  7. 14 5月, 2008 1 次提交
  8. 20 4月, 2008 1 次提交
  9. 20 12月, 2007 1 次提交
  10. 12 10月, 2007 1 次提交
  11. 14 6月, 2007 5 次提交
  12. 09 5月, 2007 1 次提交
  13. 20 12月, 2006 1 次提交
    • P
      [POWERPC] Fix register save area alignment for swapcontext syscall · 1c9bb1a0
      Paul Mackerras 提交于
      For 32-bit processes, the getcontext side of the swapcontext system
      call (i.e. the saving of the context when the first argument is
      non-NULL) has to set the ctx->uc_mcontext.uc_regs pointer to the place
      where it saves the registers.  Which it does, but it doesn't ensure
      that the pointer is 16-byte aligned.  16-byte alignment is needed
      because the Altivec/VMX registers are saved in there, and they need to
      be on a 16-byte boundary.
      
      This fixes it by ensuring the appropriate alignment of the pointer.
      This issue was pointed out by Jakub Jelinek.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      1c9bb1a0
  14. 08 12月, 2006 1 次提交
  15. 01 7月, 2006 1 次提交
  16. 09 6月, 2006 3 次提交
    • P
      [PATCH] powerpc: Implement support for setting little-endian mode via prctl · fab5db97
      Paul Mackerras 提交于
      This adds the PowerPC part of the code to allow processes to change
      their endian mode via prctl.
      
      This also extends the alignment exception handler to be able to fix up
      alignment exceptions that occur in little-endian mode, both for
      "PowerPC" little-endian and true little-endian.
      
      We always enter signal handlers in big-endian mode -- the support for
      little-endian mode does not amount to the creation of a little-endian
      user/kernel ABI.  If the signal handler returns, the endian mode is
      restored to what it was when the signal was delivered.
      
      We have two new kernel CPU feature bits, one for PPC little-endian and
      one for true little-endian.  Most of the classic 32-bit processors
      support PPC little-endian, and this is reflected in the CPU feature
      table.  There are two corresponding feature bits reported to userland
      in the AT_HWCAP aux vector entry.
      
      This is based on an earlier patch by Anton Blanchard.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      fab5db97
    • B
      [PATCH] powerpc vdso updates · a5bba930
      Benjamin Herrenschmidt 提交于
      This patch cleans up some locking & error handling in the ppc vdso and
      moves the vdso base pointer from the thread struct to the mm context
      where it more logically belongs. It brings the powerpc implementation
      closer to Ingo's new x86 one and also adds an arch_vma_name() function
      allowing to print [vsdo] in /proc/<pid>/maps if Ingo's x86 vdso patch is
      also applied.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      a5bba930
    • P
      powerpc: Fix machine check problem on 32-bit kernels · 7c85d1f9
      Paul Mackerras 提交于
      This fixes a bug found by Dave Jones that means that it is possible
      for userspace to provoke a machine check on 32-bit kernels.  This
      also fixes a couple of other places where I found similar problems
      by inspection.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      7c85d1f9
  17. 27 3月, 2006 1 次提交
  18. 08 3月, 2006 1 次提交
    • P
      powerpc: Fix various syscall/signal/swapcontext bugs · 1bd79336
      Paul Mackerras 提交于
      A careful reading of the recent changes to the system call entry/exit
      paths revealed several problems, plus some things that could be
      simplified and improved:
      
      * 32-bit wasn't testing the _TIF_NOERROR bit in the syscall fast exit
        path, so it was only doing anything with it once it saw some other
        bit being set.  In other words, the noerror behaviour would apply to
        the next system call where we had to reschedule or deliver a signal,
        which is not necessarily the current system call.
      
      * 32-bit wasn't doing the call to ptrace_notify in the syscall exit
        path when the _TIF_SINGLESTEP bit was set.
      
      * _TIF_RESTOREALL was in both _TIF_USER_WORK_MASK and
        _TIF_PERSYSCALL_MASK, which is odd since _TIF_RESTOREALL is only set
        by system calls.  I took it out of _TIF_USER_WORK_MASK.
      
      * On 64-bit, _TIF_RESTOREALL wasn't causing the non-volatile registers
        to be restored (unless perhaps a signal was delivered or the syscall
        was traced or single-stepped).  Thus the non-volatile registers
        weren't restored on exit from a signal handler.  We probably got
        away with it mostly because signal handlers written in C wouldn't
        alter the non-volatile registers.
      
      * On 32-bit I simplified the code and made it more like 64-bit by
        making the syscall exit path jump to ret_from_except to handle
        preemption and signal delivery.
      
      * 32-bit was calling do_signal unnecessarily when _TIF_RESTOREALL was
        set - but I think because of that 32-bit was actually restoring the
        non-volatile registers on exit from a signal handler.
      
      * I changed the order of enabling interrupts and saving the
        non-volatile registers before calling do_syscall_trace_leave; now we
        enable interrupts first.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      1bd79336
  19. 08 2月, 2006 1 次提交
  20. 02 2月, 2006 1 次提交
  21. 19 1月, 2006 2 次提交
  22. 12 1月, 2006 1 次提交
    • P
      [PATCH] powerpc: Avoid potential FP corruption with preempt and UP · 5388fb10
      Paul Mackerras 提交于
      Heikki Lindholm pointed out that there was a potential race with the
      lazy CPU state (FP, VR, EVR) stuff if preempt is enabled.  The race
      is that in the process of restoring FP state on sigreturn, the task
      gets preempted by a user task that wants to use the FPU.  It will take
      an FP unavailable exception, which will write the current FPU state
      to the thread_struct, overwriting the values which sigreturn has
      stored.  Note that this can only happen on UP since we don't implement
      lazy CPU state on SMP.
      
      The fix is to flush the lazy CPU state before updating the
      thread_struct.  To do this we re-use the flush_lazy_cpu_state()
      function from process.c.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      5388fb10
  23. 09 1月, 2006 2 次提交
    • D
      [PATCH] Save NVGPRS in 32-bit signal frame · 9687c587
      David Woodhouse 提交于
      Somehow this one slipped through the cracks; when we ended up in
      do_signal() on a 32-bit kernel but without having the caller-saved
      registers into the regs, we didn't set the TIF_SAVE_NVGPRS flag to
      ensure they got saved later.
      Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      9687c587
    • D
      [PATCH] syscall entry/exit revamp · 401d1f02
      David Woodhouse 提交于
      This cleanup patch speeds up the null syscall path on ppc64 by about 3%,
      and brings the ppc32 and ppc64 code slightly closer together.
      
      The ppc64 code was checking current_thread_info()->flags twice in the
      syscall exit path; once for TIF_SYSCALL_T_OR_A before disabling
      interrupts, and then again for TIF_SIGPENDING|TIF_NEED_RESCHED etc after
      disabling interrupts. Now we do the same as ppc32 -- check the flags
      only once in the fast path, and re-enable interrupts if necessary in the
      ptrace case.
      
      The patch abolishes the 'syscall_noerror' member of struct thread_info
      and replaces it with a TIF_NOERROR bit in the flags, which is handled in
      the slow path. This shortens the syscall entry code, which no longer
      needs to clear syscall_noerror.
      
      The patch adds a TIF_SAVE_NVGPRS flag which causes the syscall exit slow
      path to save the non-volatile GPRs into a signal frame. This removes the
      need for the assembly wrappers around sys_sigsuspend(),
      sys_rt_sigsuspend(), et al which existed solely to save those registers
      in advance. It also means I don't have to add new wrappers for ppoll()
      and pselect(), which is what I was supposed to be doing when I got
      distracted into this...
      
      Finally, it unifies the ppc64 and ppc32 methods of handling syscall exit
      directly into a signal handler (as required by sigsuspend et al) by
      introducing a TIF_RESTOREALL flag which causes _all_ the registers to be
      reloaded from the pt_regs by taking the ret_from_exception path, instead
      of the normal syscall exit path which stomps on the callee-saved GPRs.
      
      It appears to pass an LTP test run on ppc64, and passes basic testing on
      ppc32 too. Brief tests of ptrace functionality with strace and gdb also
      appear OK. I wouldn't send it to Linus for 2.6.15 just yet though :)
      Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      401d1f02
  24. 15 11月, 2005 1 次提交
    • P
      powerpc: Fix clearing of the FPSCR when invoking a signal handler · cc657f53
      Paul Mackerras 提交于
      As pointed out by Gary Byers, we were clearing the image of the FPSCR
      (floating point status and control register) in the thread_struct before
      copying it to the user stack when invoking a signal.  Thus the task
      would see its FPSCR getting cleared when it took a signal.
      
      While fixing it I noticed that our swapcontext system call was also
      clearing FPSCR.  It shouldn't, so I fixed that too.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      cc657f53
  25. 11 11月, 2005 1 次提交
    • B
      [PATCH] powerpc: Merge vdso's and add vdso support to 32 bits kernel · a7f290da
      Benjamin Herrenschmidt 提交于
      This patch moves the vdso's to arch/powerpc, adds support for the 32
      bits vdso to the 32 bits kernel, rename systemcfg (finally !), and adds
      some new (still untested) routines to both vdso's: clock_gettime() with
      support for CLOCK_REALTIME and CLOCK_MONOTONIC, clock_getres() (same
      clocks) and get_tbfreq() for glibc to retreive the timebase frequency.
      
      Tom,Steve: The implementation of get_tbfreq() I've done for 32 bits
      returns a long long (r3, r4) not a long. This is such that if we ever
      add support for >4Ghz timebases on ppc32, the userland interface won't
      have to change.
      
      I have tested gettimeofday() using some glibc patches in both ppc32 and
      ppc64 kernels using 32 bits userland (I haven't had a chance to test a
      64 bits userland yet, but the implementation didn't change and was
      tested earlier). I haven't tested yet the new functions.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      a7f290da
  26. 10 11月, 2005 1 次提交
    • D
      [PATCH] powerpc: Merge signal.h · c5ff7001
      David Gibson 提交于
      Having already merged the ppc and ppc64 versions of signal.c, this
      patch finishes the job by merging signal.h.  The two versions were
      almost identical already.  Notable changes:
      	- We use BITS_PER_LONG to correctly size sigset_t
      	- Remove some uneeded #includes and struct forward
      declarations.  This does mean adding an include to signal_32.c which
      relied on the indirect inclusion of sigcontext.h
      	- As the ppc64 version, the merged signal.h has prototypes for
      do_signal() and do_signal32().  Thus remove extra prototypes from
      ppc_ksyms.c which had them directly.
      
      Built and booted on POWER5 LPAR (ARCH=ppc64 and ARCH=powerpc).  Built
      for 32-bit powermac (ARCH=ppc and ARCH=powerpc) and Walnut (ARCH=ppc).
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      c5ff7001
  27. 07 11月, 2005 1 次提交
    • D
      [PATCH] powerpc: Kill ppcdebug · dcad47fc
      David Gibson 提交于
      The ancient ppcdebug/PPCDBG mechanism is now only used in two places.
      First, in the hash setup code, one of the bits allows the size of the
      hash table to be reduced by a factor of 8 - which would be better
      accomplished with a command line option for that purpose.  The other
      was a bunch of bus walking related messages in the iSeries code, which
      would seem to be insufficient reason to keep the mechanism.
      
      This patch removes the last traces of this mechanism.
      
      Built and booted on iSeries and pSeries POWER5 LPAR (ARCH=powerpc).
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      dcad47fc
  28. 03 11月, 2005 1 次提交
  29. 27 10月, 2005 1 次提交
    • D
      [PATCH] powerpc: Fix handling of fpscr on 64-bit · 25c8a78b
      David Gibson 提交于
      The recent merge of fpu.S broken the handling of fpscr for
      ARCH=powerpc and CONFIG_PPC64=y.  FP registers could be corrupted,
      leading to strange random application crashes.
      
      The confusion arises, because the thread_struct has (and requires) a
      64-bit area to save the fpscr, because we use load/store double
      instructions to get it in to/out of the FPU.  However, only the low
      32-bits are actually used, so we want to treat it as a 32-bit quantity
      when manipulating its bits to avoid extra load/stores on 32-bit.  This
      patch replaces the current definition with a structure of two 32-bit
      quantities (pad and val), to clarify things as much as is possible.
      The 'val' field is used when manipulating bits, the structure itself
      is used when obtaining the address for loading/unloading the value
      from the FPU.
      
      While we're at it, consolidate the 4 (!) almost identical versions of
      cvt_fd() and cvt_df() (arch/ppc/kernel/misc.S,
      arch/ppc64/kernel/misc.S, arch/powerpc/kernel/misc_32.S,
      arch/powerpc/kernel/misc_64.S) into a single version in fpu.S.  The
      new version takes a pointer to thread_struct and applies the correct
      offset itself, rather than a pointer to the fpscr field itself, again
      to avoid confusion as to which is the correct field to use.
      
      Finally, this patch makes ARCH=ppc64 also use the consolidated fpu.S
      code, which it previously did not.
      
      Built for G5 (ARCH=ppc64 and ARCH=powerpc), 32-bit powermac (ARCH=ppc
      and ARCH=powerpc) and Walnut (ARCH=ppc, CONFIG_MATH_EMULATION=y).
      Booted on G5 (ARCH=powerpc) and things which previously fell over no
      longer do.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      25c8a78b
  30. 22 10月, 2005 1 次提交