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  1. 15 7月, 2015 8 次提交
    • B
      PCI: Fix pcie_port_device_resume() comment · e7f6c6d0
      由 Bjorn Helgaas 提交于 
      The function comment claimed this was pcie_port_device_suspend(), but it's
really pcie_port_device_resume().  Perils of cut and paste.

Use the correct function name in the comment.
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      e7f6c6d0
    • B
      PCI: Shift PCI_CLASS_NOT_DEFINED consistently with other classes · 2b4aed1d
      由 Bjorn Helgaas 提交于 
      The PCI class in dev->class is a three-byte value comprising a base class,
sub-class, and interface type.  PCI_CLASS_NOT_DEFINED includes the base
class and sub-class, but not the interface type, so it should be shifted to
make space for the interface.  It happens that PCI_CLASS_NOT_DEFINED is
zero, so it doesn't matter in the end, but we should still use it
consistently with other class definitions.

Treat PCI_CLASS_NOT_DEFINED as a base class/sub-class value that should
appear in bits 8-23 of dev->class.
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      2b4aed1d
    • B
      PCI: Revert aeb30016 ("PCI: add Intel USB specific reset method") · eefaf338
      由 Bjorn Helgaas 提交于 
      Revert aeb30016 ("PCI: add Intel USB specific reset method").

We checked for "dev->class == PCI_CLASS_SERIAL_USB", but dev->class
contains the entire three-byte base class/sub-class/interface, while
PCI_CLASS_SERIAL_USB is only the two-byte base class/sub-class.

This error meant that we used the Intel device-specific reset on devices
with class code 0x000c03 instead of those with class code 0x0c03xx.
0x000c03 is a reserved value in the 0x00 backwards compatibility base
class and shouldn't match any devices, so I think reset_intel_generic_dev()
always failed.

I considered adding a shift, but I can't test it, so it's as likely to
break something as to fix something.
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
CC: Yu Zhao <yu.zhao@intel.com>
CC: Mathias Nyman <mathias.nyman@intel.com>
      eefaf338
    • B
      PCI: Fix TI816X class code quirk · d1541dc9
      由 Bjorn Helgaas 提交于 
      In fixup_ti816x_class(), we assigned "class = PCI_CLASS_MULTIMEDIA_VIDEO".
But PCI_CLASS_MULTIMEDIA_VIDEO is only the two-byte base class/sub-class
and needs to be shifted to make space for the low-order interface byte.

Shift PCI_CLASS_MULTIMEDIA_VIDEO to set the correct class code.

Fixes: 63c44080 ("PCI: Add quirk for setting valid class for TI816X Endpoint")
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
CC: Hemant Pedanekar <hemantp@ti.com>
      d1541dc9
    • B
      PCI: Fix generic NCR 53c810 class code quirk · e6323e3c
      由 Bjorn Helgaas 提交于 
      In the generic quirk fixup_rev1_53c810(), added by a5312e28 ("[PATCH]
PCI: NCR 53c810 quirk"), we assigned "class = PCI_CLASS_STORAGE_SCSI".  But
PCI_CLASS_STORAGE_SCSI is only the two-byte base class/sub-class and needs
to be shifted to make space for the low-order interface byte.

Furthermore, we had a similar quirk, pci_fixup_ncr53c810(), for arch/x86,
which assigned class correctly.  The arch code is linked before the PCI
core, so arch quirks run before generic quirks.  Therefore, on x86, the x86
arch quirk ran first, and the generic quirk did nothing because it saw that
dev->class was already set.  But on other arches, the generic quirk set the
wrong class code.

Fix the generic quirk to set the correct class code and remove the
now-unnecessary x86-specific quirk.
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
CC: Matthew Wilcox <matthew@wil.cx>
      e6323e3c
    • B
      PCI: Use PCI_CLASS_SERIAL_USB instead of bare number · cd76d10b
      由 Bjorn Helgaas 提交于 
      be6646bf ("PCI: Prevent xHCI driver from claiming AMD Nolan USB3 DRD
device") added a quirk to override the PCI class code of the AMD Nolan
device.

Use PCI_CLASS_SERIAL_USB instead of a bare number to improve greppability.
Also add a log message about what we're doing.

No functional change except the new message.
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NHuang Rui <ray.huang@amd.com>
CC: Jason Chang <jason.chang@amd.com>
CC: Felipe Balbi <balbi@ti.com>
      cd76d10b
    • K
      PCI: Add quirk for Intersil/Techwell TW686[4589] AV capture cards · 3657cebd
      由 Krzysztof =?utf-8?Q?Ha=C5=82asa?= 提交于 
      Intersil/Techwell TW686[4589]-based video capture cards have an empty
(zero) class code.  Fix it.
Signed-off-by: NKrzysztof Hałasa <khalasa@piap.pl>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      3657cebd
    • S
      PCI: Remove Intel Cherrytrail D3 delays · 4a118753
      由 Srinidhi Kasagar 提交于 
      Just like Haswell, Intel Atom Cherrytrail does not need the default 10ms
d3_delay imposed by the PCI specification.

Expand quirk_remove_d3_delay() to apply to Cherrytrail devices, so we can
ignore the 10ms delay before entering or exiting D3 suspend.

[bhelgaas: changelog, comment]
Signed-off-by: NSrinidhi Kasagar <srinidhi.kasagar@intel.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      4a118753
  3. 13 7月, 2015 1 次提交
    • L
      Revert "drm/i915: Use crtc_state->active in primary check_plane func" · 01e2d062
      由 Linus Torvalds 提交于 
      This reverts commit dec4f799.

Jörg Otte reports a NULL pointder dereference due to this commit, as
'crtc_state' very much can be NULL:

        crtc_state = state->base.state ?
                intel_atomic_get_crtc_state(state->base.state, intel_crtc) : NULL;

So the change to test 'crtc_state->base.active' cannot possibly be
correct as-is.

There may be some other minimal fix (like just checking crtc_state for
NULL), but I'm just reverting it now for the rc2 release, and people
like Daniel Vetter who actually know this code will figure out what the
right solution is in the longer term.
Reported-and-bisected-by: NJörg Otte <jrg.otte@gmail.com>
Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
CC: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      01e2d062
  5. 11 7月, 2015 4 次提交
  7. 10 7月, 2015 7 次提交
  9. 09 7月, 2015 17 次提交
  11. 08 7月, 2015 3 次提交