* Removed address fields in ethernet nodes
* Removed #address-cells, #size-cells from gianfar nodes
* Added cell-index to gianfar and ucc ethernet nodes
* Added enet[0..3] labels
* Renamed compatible node for gianfar mdio to "fsl,gianfar-mdio"
* Removed device_type = "mdio"

The matching for gianfar mdio still supports the old "mdio"/"gianfar" combo
but it is now considered deprecated.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

* Removed device_type = "i2c"
* Added missing second I2C controller on MPC8548 CDS, MPC8544 DS
* Added #address-cells, #size-cells, and cell-index where missing
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The addition of the aliases node is needed for U-Boot
and, eventually, cuImage, to help locate the proper
nodes reliably when using the libfdt approach.
Signed-off-by: NJon Loeliger <jdl@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

There are a few variants of the STACR register that affect more than
just the "AXON" version of EMAC. Replace the current test of various
chip models with tests for generic properties in the device-tree.
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: NStefan Roese <sr@denx.de>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

More than just "AXON" version of EMAC RGMII supports MDIO, so replace
the current test with a generic property in the device-tree that
indicates such support.
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: NStefan Roese <sr@denx.de>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Now the rtc class ds1374 driver has been added, remove the old rtc
driver hookup code, add rtc node to device trees, and turn on the
new driver in the defconfigs.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The interrupt map for the PCI PHB that had the ULI1575 was not correct
on the boards that have it.

* 8544 DS:
   - Fix interrupt mask
   - Be explicit about use of INTA for on chip peripherals

* 8572 DS/8641 HPCN:
   - Fix interrupt mask
   - Expand interrupt map for PCI slots to cover all functions
   - Be explicit about use of INTA for on chip peripherals
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

correct the reg property, remove duplicate io port entry, whitespace fixes.

Thanks to Peter Van Ackeren for pointing this out.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Re-order the EMAC interrupts in the walnut.dts file so that they are mapped
correctly.

Signed-off-by: Steve Falco <sfalco at harris.com>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Add 'fsl,' prefix to 'compatible' property for gpt nodes.
Add 'fsl,' prefix to empty, GPT0 specific 'has-wdt' property.
The fsl, prefix is being added to better match the convention of prefixing
manufacturer specific properties and values with the vendors name.
Signed-off-by: NMarian Balakowicz <m8@semihalf.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Fix some device tree omissions that prevented the new EMAC driver from
setting up ethernet on the Bamboo board correctly and update the Bamboo
defconfig.
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

This patch enables the ibm_newemac driver for the Walnut board.  It fixes the
device tree for the walnut board to order the MAL interrupts correctly and
adds the local-mac-address property to the EMAC node.  The bootwrapper is also
updated to extract the MAC address from the OpenBIOS offset where it is stored.
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

This adds RGMII support to Sequoia DTS and sets correct phy-mode
for EMACs. According to Sequoia datasheet, both ethernet ports
are connected to RGMII interface, while ZMII is used only for MDIO.
Signed-off-by: NValentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

Add device tree entries for lite5200b's FEC's PHY.
Signed-off-by: NDomen Puncer <domen.puncer@telargo.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

We don't use any CPM devices on these boards, but the muram node on these
chips is different from the 8560, so it's helpful to people working with
custom boards based on these chips.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This is described by the muram node now.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

DTC now supports "foo","bar" format for lists of strings; use the new
format on the lite5200 device trees.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

1. UCC1's RX_DV pin is 16, not 15;
2. UCC1's phy is at 0x7, not 0x1. Schematics says 0x7, and recent
   u-boot also using 0x7.
3. Use gianfar's (eTSEC) mdio bus. This is hardware default setup.
4. tx-clock should be CLK16 (GE125, PB31);
5. phy-connection-type is RGMII-ID;
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

On the majority of 85xx & 86xx we have a register that's ability to
assert HRESET_REQ to reset the board.  We refactored that code so it
can be shared between both platforms into fsl_soc.c and removed all
the duplication in each platform directory.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NXianghua Xiao <x.xiao@freescale.com>
Signed-off-by: NJon Loeliger <jdl@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

According to booting-without-of.txt, compatible should be "fsl_spi" and
mode "cpu" or "qe" for the fsl SPI controllers.
Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The PCI nodes on the MPC8568 dts didn't get moved up to be sibilings of the
SOC node when we did that clean up for some reason.  Fix that up and some
minor whitespace and adjusting the size of the soc reg property.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

According to u-boot/board/mpc8568mds/init.S:

LAW(Local Access Window) configuration:
2)   0xa000_0000   0xbfff_ffff     PCIe MEM                512MB
4)   0xe280_0000   0xe2ff_ffff     PCIe I/O                8M
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

MPC8568E-MDS have DS1374 chip on the I2C bus, thus let's use it.
This patch also adds #address-cells and #size-cells to the I2C
controllers nodes.

p.s. DS1374 rtc class driver is in the -mm tree, its name is
rtc-rtc-class-driver-for-the-ds1374.patch.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The way the current CPM binding describes available multi-user (a.k.a.
dual-ported) RAM doesn't work well when there are multiple free regions,
and it doesn't work at all if the region doesn't begin at the start of
the muram area (as the hardware needs to be programmed with offsets into
this area).  The latter situation can happen with SMC UARTs on CPM2, as its
parameter RAM is relocatable, u-boot puts it at zero, and the kernel doesn't
support moving it.

It is now described with a muram node, similar to QE.  The current CPM
binding is sufficiently recent (i.e. never appeared in an official release)
that compatibility with existing device trees is not an issue.

The code supporting the new binding is shared between cpm1 and cpm2, rather
than remain separated.  QE should be able to use this code as well, once
minor fixes are made to its device trees.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This patch adds cuboot support for MPC7448HPC2 platform.
The cuImage can be used with legacy u-boot without FDT support.
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

1. PCI and reset are factored out into pq2.c.  I renamed them from m82xx
to pq2 because they won't work on the Integrated Host Processor line of
82xx chips (i.e. 8240, 8245, and such).

2. The PCI PIC, which is nominally board-specific, is used on multiple
boards, and thus is used into pq2ads-pci-pic.c.

3. The new CPM binding is used.

4. General cleanup.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This board is also resold by Freescale under the names
"QUICCStart MPC885 Evaluation System" and "CWH-PPC-885XN-VE".
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

It now uses the new CPM binding and the generic pin/clock functions, and
has assorted fixes and cleanup.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Setup dr_mode for USB-DR to peripheral as the default (host mode) doesn't make
much sense for the mini-AB connector on the ITX board.

Peripheral mode is preferable to OTG as the fsl_usb2_udc.c driver doesn't yet
properly support it.
Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

cuImage needs to know the logical index of the ethernet devices in order
to assign mac addresses.  This adds the needed properties.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>
CC: Scott Wood <scottwood@freescale.com>
CC: Kumar Gala <galak@kernel.crashing.org>
CC: Timur Tabi <timur@freescale.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

According to PowerPC 440EPx documentation,
MAL0 is comprised of four channels (two transmit and two receive).
Each channel is dedicated to one of two EMAC cores.
This patch fixes Sequoia DTS MAL0 entry and EMAC entries,
assigning correct channel numbers to EMACs.
Signed-off-by: NValentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

According to PowerPC 440EP documentation,
MAL0 consists of 6 channels (4 transmit channels and 2 receive channels)
This patch fixes Bamboo DTS MAL0 "num-rx-chans" entry.
Signed-off-by: NValentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>

A new binding for flash devices was recently introduced.  This updates the
Sequoia DTS to use the new binding and enabled MTD in the defconfig.
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>
Acked-by: NStefan Roese <sr@denx.de>

A new binding for flash devices was recently introduced.  This updates the
Walnut DTS to use the new binding.
Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>

Enabled using SPI controller on the MPC832x RDB board.  We currently use
a modalias of "spidev" as a place holder (replace with "mmc_spie") until
the mmc_spi driver support is merged in.

This gets us the ability to test SPI until then.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Updated the device trees to have the PCI nodes be at the same level as
the SOC node.  This is to make it so that the SOC nodes children address
space is just on chip registers and not other bus memory as well.

Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge
that exists in the PHB.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>