1. 11 5月, 2015 1 次提交
  2. 18 4月, 2015 1 次提交
    • C
      tile: nohz: warn if nohz_full uses hypervisor shared cores · 128f3cb9
      Chris Metcalf 提交于
      The "hypervisor shared" cores are ones that the Tilera hypervisor
      uses to receive interrupts to manage hypervisor-owned devices.
      It's a bad idea to try to use those cores with nohz_full, since
      they will get interrupted unpredictably -- and invisibly to Linux
      tracing tools, since the interrupts are delivered at a higher
      privilege level to the Tilera hypervisor.
      
      Generate a clear warning at boot up that this doesn't end well
      for the nohz_full cores in question.
      Signed-off-by: NChris Metcalf <cmetcalf@ezchip.com>
      128f3cb9
  3. 04 9月, 2013 1 次提交
  4. 14 8月, 2013 1 次提交
    • C
      tile: improve big-endian support · ba02f0eb
      Chris Metcalf 提交于
      First, fix a bug in asm/unaligned.h; we need to just use the asm-generic
      unaligned.h so we properly choose endian-correct flavors.
      
      Second, keep the hv/hypervisor.h ABI fully "native" in the sense that
      we don't have __BIG_ENDIAN__ ifdefs there.  Instead, we use macros in
      the head_NN.S assembly code to properly extract two 32-bit structure
      members from a 64-bit register holding the structure.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      ba02f0eb
  5. 13 8月, 2013 1 次提交
    • C
      tile: various console improvements · bda0f5ba
      Chris Metcalf 提交于
      This change improves and cleans up the tile console.
      
      - We enable HVC_IRQ support on tilegx, with the addition of a new
        Tilera hypervisor API for tilegx to allow a console IPI.  If IPI
        support is not available we fall back to the previous polling mode.
      
      - We simplify the earlyprintk code to use CON_BOOT and eliminate some
        of the other supporting earlyprintk code.
      
      - A new tile_console_write() primitive is used to send output to
        the console and is factored out of the hvc_tile driver.
        This lets us support a "sim_console" boot argument to allow using
        simulator hooks to send output to the "console" as a slightly
        faster alternative to emulating the hardware more directly.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      bda0f5ba
  6. 03 5月, 2013 1 次提交
    • C
      tile: support new Tilera hypervisor · c539914d
      Chris Metcalf 提交于
      The Tilera hypervisor shipped in releases up through MDE 4.1 launches
      the client operating system (i.e. Linux) at privilege level 1 (PL1).
      Starting with MDE 4.2, as part of the work to enable KVM, the
      Tilera hypervisor launches Linux at PL2 instead.
      
      This commit makes the KERNEL_PL option default to 2 for tilegx, while
      still saying at 1 for tilepro, which doesn't have an updated hypervisor.
      It also explains how and when you might want to choose another value.
      In addition, we change a small buglet in the on-chip Ethernet driver,
      where we were failing to use the KERNEL_PL constant in an API call.
      
      To make the transition cleaner, this change also provides the updated
      hv_init() API for the new hypervisor that supports announcing Linux's
      compiled-in PL, so the hypervisor can generate a suitable error in the
      case of a mismatched hypervisor and Linux binary.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      Cc: stable@vger.linux.org
      c539914d
  7. 26 5月, 2012 5 次提交
    • C
      arch/tile: allow querying cpu module information from the hypervisor · 8703d6e0
      Chris Metcalf 提交于
      This just adds a few more attributes to the information Linux
      can query from the hypervisor for the /sys/hypervisor/board/ directory,
      providing part, serial#, revision#, and description for cpu modules
      (as opposed to the board itself, or any mezzanine boards).
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      8703d6e0
    • C
      arch/tile: support multiple huge page sizes dynamically · 621b1955
      Chris Metcalf 提交于
      This change adds support for a new "super" bit in the PTE, using the new
      arch_make_huge_pte() method.  The Tilera hypervisor sees the bit set at a
      given level of the page table and gangs together 4, 16, or 64 consecutive
      pages from that level of the hierarchy to create a larger TLB entry.
      
      One extra "super" page size can be specified at each of the three levels
      of the page table hierarchy on tilegx, using the "hugepagesz" argument
      on the boot command line.  A new hypervisor API is added to allow Linux
      to tell the hypervisor how many PTEs to gang together at each level of
      the page table.
      
      To allow pre-allocating huge pages larger than the buddy allocator can
      handle, this change modifies the Tilera bootmem support to put all of
      memory on tilegx platforms into bootmem.
      
      As part of this change I eliminate the vestigial CONFIG_HIGHPTE support,
      which never worked anyway, and eliminate the hv_page_size() API in favor
      of the standard vma_kernel_pagesize() API.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      621b1955
    • C
      arch/tile: Allow tilegx to build with either 16K or 64K page size · d5d14ed6
      Chris Metcalf 提交于
      This change introduces new flags for the hv_install_context()
      API that passes a page table pointer to the hypervisor.  Clients
      can explicitly request 4K, 16K, or 64K small pages when they
      install a new context.  In practice, the page size is fixed at
      kernel compile time and the same size is always requested every
      time a new page table is installed.
      
      The <hv/hypervisor.h> header changes so that it provides more abstract
      macros for managing "page" things like PFNs and page tables.  For
      example there is now a HV_DEFAULT_PAGE_SIZE_SMALL instead of the old
      HV_PAGE_SIZE_SMALL.  The various PFN routines have been eliminated and
      only PA- or PTFN-based ones remain (since PTFNs are always expressed
      in fixed 2KB "page" size).  The page-table management macros are
      renamed with a leading underscore and take page-size arguments with
      the presumption that clients will use those macros in some single
      place to provide the "real" macros they will use themselves.
      
      I happened to notice the old hv_set_caching() API was totally broken
      (it assumed 4KB pages) so I changed it so it would nominally work
      correctly with other page sizes.
      
      Tag modules with the page size so you can't load a module built with
      a conflicting page size.  (And add a test for SMP while we're at it.)
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      d5d14ed6
    • C
      arch/tile: support building big-endian kernel · 1efea40d
      Chris Metcalf 提交于
      The toolchain supports big-endian mode now, so add support for building
      the kernel to run big-endian as well.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      1efea40d
    • C
      arch/tile: allow building Linux with transparent huge pages enabled · 73636b1a
      Chris Metcalf 提交于
      The change adds some infrastructure for managing tile pmd's more generally,
      using pte_pmd() and pmd_pte() methods to translate pmd values to and
      from ptes, since on TILEPro a pmd is really just a nested structure
      holding a pgd (aka pte).  Several existing pmd methods are moved into
      this framework, and a whole raft of additional pmd accessors are defined
      that are used by the transparent hugepage framework.
      
      The tile PTE now has a "client2" bit.  The bit is used to indicate a
      transparent huge page is in the process of being split into subpages.
      
      This change also fixes a generic bug where the return value of the
      generic pmdp_splitting_flush() was incorrect.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      73636b1a
  8. 05 5月, 2011 1 次提交
  9. 31 3月, 2011 1 次提交
  10. 11 3月, 2011 1 次提交
  11. 02 3月, 2011 1 次提交
    • C
      arch/tile: fix __ndelay etc to work better · 13371731
      Chris Metcalf 提交于
      The current implementations of __ndelay and __udelay call a hypervisor
      service to delay, but the hypervisor service isn't actually implemented
      very well, and the consensus is that Linux should handle figuring this
      out natively and not use a hypervisor service.
      
      By converting nanoseconds to cycles, and then spinning until the
      cycle counter reaches the desired cycle, we get several benefits:
      first, we are sensitive to the actual clock speed; second, we use
      less power by issuing a slow SPR read once every six cycles while
      we delay; and third, we properly handle the case of an interrupt by
      exiting at the target time rather than after some number of cycles.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      13371731
  12. 16 10月, 2010 1 次提交
  13. 13 8月, 2010 1 次提交
    • C
      arch/tile: Various cleanups. · c745a8a1
      Chris Metcalf 提交于
      This change rolls up random cleanups not representing any actual bugs.
      
      - Remove a stale CONFIG_ value from the default tile_defconfig
      - Remove unused tns_atomic_xxx() family of methods from <asm/atomic.h>
      - Optimize get_order() using Tile's "clz" instruction
      - Fix a bad hypervisor upcall name (not currently used in Linux anyway)
      - Use __copy_in_user_inatomic() name for consistency, and export it
      - Export some additional hypervisor driver I/O upcalls and some homecache calls
      - Remove the obfuscating MEMCPY_TEST_WH64 support code
      - Other stray comment cleanups, #if 0 removal, etc.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      c745a8a1
  14. 07 7月, 2010 2 次提交
  15. 05 6月, 2010 1 次提交