1. 06 9月, 2008 1 次提交
  2. 11 7月, 2008 1 次提交
  3. 08 7月, 2008 1 次提交
  4. 11 6月, 2008 1 次提交
  5. 14 5月, 2008 1 次提交
  6. 25 4月, 2008 1 次提交
    • I
      intel-iommu.c: dma ops fix · 6865f0d1
      Ingo Molnar 提交于
      Stephen Rothwell noticed that:
      
      Commit 2be62149 ("x86: dma-ops on highmem
      fix") in Linus' tree introduced a new warning (noticed in the x86_64
      allmodconfig build of linux-next):
      
      drivers/pci/intel-iommu.c:2240: warning: initialization from incompatible pointer type
      
      Which points at an instance of map_single that needs updating.
      
      Fix it to the new prototype.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      6865f0d1
  7. 21 4月, 2008 2 次提交
    • M
      PCI: pci-iommu-iotlb-flushing-speedup · 80b20dd8
      mark gross 提交于
      The following patch is an update to use an array instead of a list of
      IOVA's in the implementation of defered iotlb flushes.  It takes
      inspiration from sba_iommu.c
      
      I like this implementation better as it encapsulates the batch process
      within intel-iommu.c, and no longer touches iova.h (which is shared)
      
      Performance data:  Netperf 32byte UDP streaming
      2.6.25-rc3-mm1:
      IOMMU-strict : 58Mps @ 62% cpu
      NO-IOMMU : 71Mbs @ 41% cpu
      List-based IOMMU-default-batched-IOTLB flush: 66Mbps @ 57% cpu
      
      with this patch:
      IOMMU-strict : 73Mps @ 75% cpu
      NO-IOMMU : 74Mbs @ 42% cpu
      Array-based IOMMU-default-batched-IOTLB flush: 72Mbps @ 62% cpu
      
      Signed-off-by: <mgross@linux.intel.com>
      Cc: Grant Grundler <grundler@parisc-linux.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      80b20dd8
    • M
      PCI: iommu: iotlb flushing · 5e0d2a6f
      mark gross 提交于
      This patch is for batching up the flushing of the IOTLB for the DMAR
      implementation found in the Intel VT-d hardware.  It works by building a list
      of to be flushed IOTLB entries and a bitmap list of which DMAR engine they are
      from.
      
      After either a high water mark (250 accessible via debugfs) or 10ms the list
      of iova's will be reclaimed and the DMAR engines associated are IOTLB-flushed.
      
      This approach recovers 15 to 20% of the performance lost when using the IOMMU
      for my netperf udp stream benchmark with small packets.  It can be disabled
      with a kernel boot parameter "intel_iommu=strict".
      
      Its use does weaken the IOMMU protections a bit.
      Signed-off-by: NMark Gross <mgross@linux.intel.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      5e0d2a6f
  8. 25 3月, 2008 1 次提交
    • M
      PCI: iova: lockdep false alarm fix · 8a443df4
      Mark Gross 提交于
      lockdep goes off on the iova copy_reserved_iova() because it and a function
      it calls grabs locks in the from, and the to of the copy operation.
      
      The function grab locks of the same lock classes triggering the warning.  The
      first lock grabbed is for the constant reserved areas that is never accessed
      after early boot.  Technically you could do without grabbing the locks for the
      "from" structure its copying reserved areas from.
      
      But dropping the from locks to me looks wrong, even though it would be ok.
      
      The affected code only runs in early boot as its setting up the DMAR
      engines.
      
      This patch gives the reserved_ioval_list locks special lockdep classes.
      Signed-off-by: NMark Gross <mgross@linux.intel.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      8a443df4
  9. 24 2月, 2008 1 次提交
  10. 09 2月, 2008 2 次提交
  11. 07 2月, 2008 1 次提交
  12. 02 2月, 2008 1 次提交
  13. 30 10月, 2007 2 次提交
  14. 29 10月, 2007 1 次提交
  15. 23 10月, 2007 1 次提交
  16. 22 10月, 2007 9 次提交
    • F
      intel-iommu sg chaining support · c03ab37c
      FUJITA Tomonori 提交于
      x86_64 defines ARCH_HAS_SG_CHAIN. So if IOMMU implementations don't
      support sg chaining, we will get data corruption.
      Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
      Acked-by: NAnil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
      Cc: Jens Axboe <jens.axboe@oracle.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      c03ab37c
    • K
      intel-iommu: fix for IOMMU early crash · 358dd8ac
      Keshavamurthy, Anil S 提交于
      pci_dev's->sysdata is highly overloaded and currently IOMMU is broken due
      to IOMMU code depending on this field.
      
      This patch introduces new field in pci_dev's dev.archdata struct to hold
      IOMMU specific per device IOMMU private data.
      Signed-off-by: NAnil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
      Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Greg KH <greg@kroah.com>
      Cc: Jeff Garzik <jeff@garzik.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      358dd8ac
    • K
      intel-iommu: optimize sg map/unmap calls · f76aec76
      Keshavamurthy, Anil S 提交于
      This patch adds PageSelectiveInvalidation support replacing existing
      DomainSelectiveInvalidation for intel_{map/unmap}_sg() calls and also
      enables to mapping one big contiguous DMA virtual address which is mapped
      to discontiguous physical address for SG map/unmap calls.
      
      "Doamin selective invalidations" wipes out the IOMMU address translation
      cache based on domain ID where as "Page selective invalidations" wipes out
      the IOMMU address translation cache for that address mask range which is
      more cache friendly when compared to Domain selective invalidations.
      
      Here is how it is done.
      1) changes to iova.c
      alloc_iova() now takes a bool size_aligned argument, which
      when when set, returns the io virtual address that is
      naturally aligned to 2 ^ x, where x is the order
      of the size requested.
      
      Returning this io vitual address which is naturally
      aligned helps iommu to do the "page selective
      invalidations" which is IOMMU cache friendly
      over "domain selective invalidations".
      
      2) Changes to driver/pci/intel-iommu.c
      Clean up intel_{map/unmap}_{single/sg} () calls so that
      s/g map/unamp calls is no more dependent on
      intel_{map/unmap}_single()
      
      intel_map_sg() now computes the total DMA virtual address
      required and allocates the size aligned total DMA virtual address
      and maps the discontiguous physical address to the allocated
      contiguous DMA virtual address.
      
      In the intel_unmap_sg() case since the DMA virtual address
      is contiguous and size_aligned, PageSelectiveInvalidation
      is used replacing earlier DomainSelectiveInvalidations.
      Signed-off-by: NAnil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
      Cc: Greg KH <greg@kroah.com>
      Cc: Ashok Raj <ashok.raj@intel.com>
      Cc: Suresh B <suresh.b.siddha@intel.com>
      Cc: Andi Kleen <ak@suse.de>
      Cc: Arjan van de Ven <arjan@infradead.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      f76aec76
    • K
      Intel IOMMU: Iommu floppy workaround · 49a0429e
      Keshavamurthy, Anil S 提交于
      This config option (DMAR_FLPY_WA) sets up 1:1 mapping for the floppy device so
      that the floppy device which does not use DMA api's will continue to work.
      
      Once the floppy driver starts using DMA api's this config option can be turn
      off or this patch can be yanked out of kernel at that time.
      
      [akpm@linux-foundation.org: cleanups, rename things, build fix]
      [jengelh@computergmbh.de: Kconfig fixes]
      Signed-off-by: NAnil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
      Cc: Andi Kleen <ak@suse.de>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Muli Ben-Yehuda <muli@il.ibm.com>
      Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com>
      Cc: Arjan van de Ven <arjan@infradead.org>
      Cc: Ashok Raj <ashok.raj@intel.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Christoph Lameter <clameter@sgi.com>
      Cc: Greg KH <greg@kroah.com>
      Signed-off-by: NJan Engelhardt <jengelh@gmx.de>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      49a0429e
    • K
      Intel IOMMU: Iommu Gfx workaround · e820482c
      Keshavamurthy, Anil S 提交于
      When we fix all the opensource gfx drivers to use the DMA api's, at that time
      we can yank this config options out.
      
      [jengelh@computergmbh.de: Kconfig fixes]
      Signed-off-by: NAnil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
      Cc: Andi Kleen <ak@suse.de>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Muli Ben-Yehuda <muli@il.ibm.com>
      Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com>
      Cc: Arjan van de Ven <arjan@infradead.org>
      Cc: Ashok Raj <ashok.raj@intel.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Christoph Lameter <clameter@sgi.com>
      Cc: Greg KH <greg@kroah.com>
      Signed-off-by: NJan Engelhardt <jengelh@gmx.de>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      e820482c
    • K
      Intel IOMMU: DMAR fault handling support · 3460a6d9
      Keshavamurthy, Anil S 提交于
      MSI interrupt handler registrations and fault handling support for Intel-IOMMU
      hadrware.
      
      This patch enables the MSI interrupts for the DMA remapping units and in the
      interrupt handler read the fault cause and outputs the same on to the console.
      Signed-off-by: NAnil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
      Cc: Andi Kleen <ak@suse.de>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Muli Ben-Yehuda <muli@il.ibm.com>
      Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com>
      Cc: Arjan van de Ven <arjan@infradead.org>
      Cc: Ashok Raj <ashok.raj@intel.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Christoph Lameter <clameter@sgi.com>
      Cc: Greg KH <greg@kroah.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      3460a6d9
    • K
      Intel IOMMU: Intel iommu cmdline option - forcedac · 7d3b03ce
      Keshavamurthy, Anil S 提交于
      Introduce intel_iommu=forcedac commandline option.  This option is helpful to
      verify the pci device capability of handling physical dma'able address greater
      than 4G.
      Signed-off-by: NAnil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
      Cc: Andi Kleen <ak@suse.de>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Muli Ben-Yehuda <muli@il.ibm.com>
      Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com>
      Cc: Arjan van de Ven <arjan@infradead.org>
      Cc: Ashok Raj <ashok.raj@intel.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Christoph Lameter <clameter@sgi.com>
      Cc: Greg KH <greg@kroah.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      7d3b03ce
    • K
      Intel IOMMU: Avoid memory allocation failures in dma map api calls · eb3fa7cb
      Keshavamurthy, Anil S 提交于
      Intel IOMMU driver needs memory during DMA map calls to setup its internal
      page tables and for other data structures.  As we all know that these DMA map
      calls are mostly called in the interrupt context or with the spinlock held by
      the upper level drivers(network/storage drivers), so in order to avoid any
      memory allocation failure due to low memory issues, this patch makes memory
      allocation by temporarily setting PF_MEMALLOC flags for the current task
      before making memory allocation calls.
      
      We evaluated mempools as a backup when kmem_cache_alloc() fails
      and found that mempools are really not useful here because
       1) We don't know for sure how much to reserve in advance
       2) And mempools are not useful for GFP_ATOMIC case (as we call
          memory alloc functions with GFP_ATOMIC)
      
      (akpm: point 2 is wrong...)
      
      With PF_MEMALLOC flag set in the current->flags, the VM subsystem avoids any
      watermark checks before allocating memory thus guarantee'ing the memory till
      the last free page.  Further, looking at the code in mm/page_alloc.c in
      __alloc_pages() function, looks like this flag is useful only in the
      non-interrupt context.
      
      If we are in the interrupt context and memory allocation in IOMMU driver fails
      for some reason, then the DMA map api's will return failure and it is up to
      the higher level drivers to retry.  Suppose, if upper level driver programs
      the controller with the buggy DMA virtual address, the IOMMU will block that
      DMA transaction when that happens thus preventing any corruption to main
      memory.
      
      So far in our test scenario, we were unable to create any memory allocation
      failure inside dma map api calls.
      Signed-off-by: NAnil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
      Cc: Andi Kleen <ak@suse.de>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Muli Ben-Yehuda <muli@il.ibm.com>
      Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com>
      Cc: Arjan van de Ven <arjan@infradead.org>
      Cc: Ashok Raj <ashok.raj@intel.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Christoph Lameter <clameter@sgi.com>
      Cc: Greg KH <greg@kroah.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      eb3fa7cb
    • K
      Intel IOMMU: Intel IOMMU driver · ba395927
      Keshavamurthy, Anil S 提交于
      Actual intel IOMMU driver.  Hardware spec can be found at:
      http://www.intel.com/technology/virtualization
      
      This driver sets X86_64 'dma_ops', so hook into standard DMA APIs.  In this
      way, PCI driver will get virtual DMA address.  This change is transparent to
      PCI drivers.
      
      [akpm@linux-foundation.org: remove unneeded cast]
      [akpm@linux-foundation.org: build fix]
      [bunk@stusta.de: fix duplicate CONFIG_DMAR Makefile line]
      Signed-off-by: NAnil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
      Cc: Andi Kleen <ak@suse.de>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Muli Ben-Yehuda <muli@il.ibm.com>
      Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com>
      Cc: Arjan van de Ven <arjan@infradead.org>
      Cc: Ashok Raj <ashok.raj@intel.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Christoph Lameter <clameter@sgi.com>
      Cc: Greg KH <greg@kroah.com>
      Signed-off-by: NAdrian Bunk <bunk@stusta.de>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      ba395927