- 08 5月, 2018 1 次提交
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由 Mylène Josserand 提交于
Move the assembly code for cluster cache enabling and resuming into an assembly file instead of having it directly in C code. Remove the CFLAGS because we are using the ARM directive "arch" instead. Signed-off-by: NMylène Josserand <mylene.josserand@bootlin.com> Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com>
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- 10 3月, 2018 3 次提交
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由 Chen-Yu Tsai 提交于
The multi-cluster SMP code maps the address spaces of several hardware control blocks. The device nodes for them are SoC-specific. To help with supporting other SoCs to re-use this code, these bits should be split out to a separate function tied to the enable-method string. This patch splits out and groups the device node lookup sequence, and adds new data structures to have the newly created function tied to the enable method string. This structure can also be used to encode other differences between the SoCs. Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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由 Chen-Yu Tsai 提交于
Instead of having an early init function check the machine compatible and installing multi-cluster SMP support for the A80 if it matches, use a new cpu enable-method string. This makes the platform support future proof in case anyone manages to add PSCI support. The original init code for the SMP support is changed into the .prepare_cpus callback in the smp_operations structure. Instead of panicing when resources are missing like on some platforms, our code merely guards against engaging SMP or CPU hotplug and returns an error. Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: NRob Herring <robh@kernel.org> Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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由 Chen-Yu Tsai 提交于
The sunxi_mc_smp_lookback function is modeled after the mcpm_loopback function in the MCPM framework. "lookback" was a typo introduced when the new function was added. Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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- 20 2月, 2018 3 次提交
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由 Chen-Yu Tsai 提交于
The BROM has a branch that checks if the primary core is hotplugging. If the magic flag is set, execution jumps to the address set in the software entry register. (Secondary cores always branch to the that address.) This patch sets the flags that makes BROM jump execution on the primary core (cpu0) to the SMP software entry code when the core is powered back up. After it is re-integrated into the system, the flag is cleared. A custom .cpu_can_disable callback that returns true for all cpus, so that cpu0 can really be brought down. Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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由 Chen-Yu Tsai 提交于
This patch adds common code used to power down all cores and clusters. The code was previously based on the MCPM framework. It has now been adapted to hook into struct smp_operations directly, but the code structure still shows signs of prior work. The primary core (cpu0) requires setting flags to have the BROM bounce execution to the SMP software entry code. This is done in a subsequent patch to keep the changes cleanly separated. By default the ARM SMP code blocks cpu0 from being turned off, so splitting this out is safe. Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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由 Chen-Yu Tsai 提交于
The A80 is a big.LITTLE SoC with 1 cluster of 4 Cortex-A7s and 1 cluster of 4 Cortex-A15s. This patch adds support to bring up the second cluster and thus all cores using custom platform SMP code. Core/cluster power down has not been implemented, thus CPU hotplugging is not supported. Parts of the trampoline and re-entry code for the boot cpu was adapted from the MCPM framework. Signed-off-by: NChen-Yu Tsai <wens@csie.org>
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