- 25 9月, 2014 1 次提交
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由 Aaron Lu 提交于
The virtual GPIO introduced in ACPI table of Baytrail-T based system is used to solve a problem under Windows. We do not have such problems under Linux so we do not actually need them. But we have to tell GPIO library that the Crystal Cove GPIO chip has this many GPIO pins or the common GPIO handler will refuse any access to those high number GPIO pins, which will resulted in a failure evaluation of every ACPI control method that is used to turn on/off power resource and/or report sensor temperatures. Signed-off-by: NAaron Lu <aaron.lu@intel.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> [changed vgpio number from 0x5e to 94] Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 23 9月, 2014 1 次提交
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由 Linus Walleij 提交于
Some drivers accidentally still use the return value from gpiochip_remove(). Get rid of them so we can simplify this function and get rid of the return value. Cc: Abdoulaye Berthe <berthe.ab@gmail.com> Acked-by: NAlexandre Courbot <acourbot@nvidia.com> Acked-by: NJavier Martinez Canillas <javier@dowhile0.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 19 6月, 2014 1 次提交
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由 Lee Jones 提交于
drivers/gpio/gpio-crystalcove.c: In function 'crystalcove_gpio_dbg_show': drivers/gpio/gpio-crystalcove.c:286:3: error: implicit declaration of function 'seq_printf' seq_printf(s, " gpio-%-2d %s %s %s %s ctlo=%2x,%s %s %s\n", Reported-by: NStephen Rothwell <sfr@canb.auug.org.au> Acked-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLee Jones <lee.jones@linaro.org>
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- 17 6月, 2014 1 次提交
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由 Zhu, Lejun 提交于
Devices based on Intel SoC products such as Baytrail have a Power Management IC. In the PMIC there are subsystems for voltage regulation, A/D conversion, GPIO and PWMs. The PMIC in Baytrail-T platform is called Crystal Cove. This patch adds support for the GPIO function in Crystal Cove. Signed-off-by: NYang, Bin <bin.yang@intel.com> Signed-off-by: NZhu, Lejun <lejun.zhu@linux.intel.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org>
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