The virtual GPIO introduced in ACPI table of Baytrail-T based system is
used to solve a problem under Windows. We do not have such problems
under Linux so we do not actually need them. But we have to tell GPIO
library that the Crystal Cove GPIO chip has this many GPIO pins or the
common GPIO handler will refuse any access to those high number GPIO
pins, which will resulted in a failure evaluation of every ACPI control
method that is used to turn on/off power resource and/or report sensor
temperatures.
Signed-off-by: NAaron Lu <aaron.lu@intel.com>
Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
[changed vgpio number from 0x5e to 94]
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This driver is only useful on BCM281xx, so let the driver depend on
ARCH_BCM_MOBILE but allow compile coverage testing.
The main benefit is that the driver isn't available to be selected for
machines that don't have the matching hardware.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: NSherman Yin <syin@broadcom.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This change makes it easier to configure a kernel for a real machine by
not showing the option to enable it at all if COMPILE_TEST is off.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: NMarkus Mayer <mmayer@broadcom.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The __initconst is in the wrong place, and when moved to the correct place
it uncovers an error where the variable is used by non-init data structures.

Instead merely make them const and put the const in the right spot.
Signed-off-by: NBehan Webster <behanw@converseincode.com>
Reviewed-by: NMark Charlebois <charlebm@gmail.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NMatt Porter <mporter@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

If one adds gpio-controller; to the chip in the devicetree, then
initialization fails with 'gpiochip_find_base: cannot find free range',
because ngpio is 0. This patch fixes the bug.

This version includes the suggestions from Linus Walleij.

Tested on ml507 board.
Signed-off-by: NGernot Vormayr <gvormayr@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The statements BUG_ON(ctx == 0) was implicitly casting a pointer
to an integer for comparison. Do this with a bool test instead
to get away from sparse warnings.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This driver depends on OF_GPIO, so it won't be built if !CONFIG_OF.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NVarka Bhadram <varkab@cdac.in>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Some GPIO chips (e.g. the DLN2 USB adapter) have blocking get/set
operation but do not need a threaded irq handler.
Signed-off-by: NOctavian Purdila <octavian.purdila@intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

In case of error, the function devm_ioremap_nocache() returns NULL
pointer not ERR_PTR(). The IS_ERR() test in the return value check
should be replaced with NULL test.
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

When viewing the /proc/interrupts, there is no information about which
GPIO bank a specific gpio interrupt is hooked on to. This is more than a
bit irritating as such information can esily be provided back to the
user and at times, can be crucial for debug.

So, instead of displaying something like:
31:	0	0  GPIO   0  palmas
32:	0	0  GPIO  27  mmc0

Display the following with appropriate device name:
31:	0	0  4ae10000.gpio   0  palmas
32:	0	0  4805d000.gpio  27  mmc0

This requires that we create irq_chip instance specific for each GPIO
bank which is trivial to achieve.
Signed-off-by: NNishanth Menon <nm@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: NKevin Hilman <khilman@linaro.org>
Acked-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Commit d78c16cc ("ARM: SAMSUNG: Remove remaining legacy code")
removed the Kconfig symbol S5P_GPIO_DRVSTR. It didn't remove one check
for the related macro. Remove that check and the dead code it hides.
Signed-off-by: NPaul Bolle <pebolle@tiscali.nl>
Reviewed-by: NTomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Some newer Intel SoCs, like Braswell already have more than 256 GPIOs
available so the default limit is exceeded. Instead of adding more
architecture specific gpio.h files with custom ARCH_NR_GPIOs we increase
the gpiolib default limit to be twice the current.

Current generic ARCH_NR_GPIOS limit is 256 which starts to be too small
for newer Intel SoCs like Braswell. In order to support GPIO controllers
on these SoCs we increase ARCH_NR_GPIOS to be 512 which should be
sufficient for now.

The kernel size increases a bit with this change. Below is an example of
x86_64 kernel image.

ARCH_NR_GPIOS=256
 text     data    bss     dec      hex    filename
 11476173 1971328 1265664 14713165 e0814d vmlinux

ARCH_NR_GPIOS=512
 text     data    bss     dec      hex    filename
 11476173 1971328 1269760 14717261 e0914d vmlinux

So the BSS size and this the kernel image size increases by 4k.
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Use container_of instead of casting first structure member.
Signed-off-by: NFabian Frederick <fabf@skynet.be>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch enables suspend and resume mode for the power management, and
it is based on Josef Ahmad's previous work.
Reviewed-by: NHock Leong Kweh <hock.leong.kweh@intel.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: NWeike Chen <alvin.chen@intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch enables 'debounce' for the designware GPIO, and
it is based on Josef Ahmad's previous work.
Reviewed-by: NHock Leong Kweh <hock.leong.kweh@intel.com>
Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWeike Chen <alvin.chen@intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch replaces 'readl&writel' with 'dwapb_read&dwapb_write'.
Reviewed-by: NShevchenko, Andriy <andriy.shevchenko@intel.com>
Signed-off-by: NWeike Chen <alvin.chen@intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The Synopsys DesignWare APB GPIO driver only supports open firmware devices.
But, like Intel Quark X1000 SOC, which has a single PCI function exporting
a GPIO and an I2C controller, it is a Multifunction device. This patch is
to enable the current Synopsys DesignWare APB GPIO driver to support the
Multifunction device which exports the designware GPIO controller.
Reviewed-by: NHock Leong Kweh <hock.leong.kweh@intel.com>
Signed-off-by: NWeike Chen <alvin.chen@intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This avoids handling gpiochip remove error in device
remove handler.
Signed-off-by: NAbdoulaye Berthe <berthe.ab@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

We are trying to smoke out the use of the return value from
gpiochip_remove() from the kernel, this has been missed.
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Some drivers accidentally still use the return value from
gpiochip_remove(). Get rid of them so we can simplify this function
and get rid of the return value.

Cc: Abdoulaye Berthe <berthe.ab@gmail.com>
Acked-by: NAlexandre Courbot <acourbot@nvidia.com>
Acked-by: NJavier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Some drivers accidentally still use the return value from
gpiochip_remove(). Get rid of them so we can simplify this function
and get rid of the return value.

Cc: Abdoulaye Berthe <berthe.ab@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

this remove all reference to gpio_remove retval in all driver
except pinctrl and gpio. the same thing is done for gpio and
pinctrl in two different patches.
Signed-off-by: NAbdoulaye Berthe <berthe.ab@gmail.com>
Acked-by: NMichael Büsch <m@bues.ch>
Acked-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
Acked-by: NMauro Carvalho Chehab <m.chehab@samsung.com>
Acked-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

On Keystone SOCs, ARM host can send interrupts to DSP cores using the
DSP GPIO controller IP. Each DSP GPIO controller provides 28 IRQ signals for
each DSP core. This is one of the component used by the IPC mechanism used
on Keystone SOCs.

Keystone 2 DSP GPIO controller has specific features:
- each GPIO can be configured only as output pin;
- setting GPIO value to 1 causes IRQ generation on target DSP core;
- reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still
  pending.

This patch updates gpio-syscon driver to be reused by Keystone 2 SoCs,
because the Keystone 2 DSP GPIO controller is controlled through Syscon
devices and, as requested by Linus Walleij, such kind of GPIO controllers
should be integrated with drivers/gpio/gpio-syscon.c driver.
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch adds handling of new "gpio,syscon-dev" DT property,
which allows to specify syscon node and data/direction registers
offsets in DT.

"gpio,syscon-dev" has following format:
	gpio,syscon-dev = <&syscon_dev data_reg_offset [direction_reg_offset]>;

where
 - syscon_dev - phandle on syscon node
 - data_reg_offset - offset of data register (in bytes)
 - direction_reg_offset - offset of dirrection register (optional, in bytes)

for example:
	gpio,syscon-dev = <&devctrl 0x254>;

In such way, the support of multiple Syscon GPIO devices is added.
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Some SoCs (like Keystone) may require to perform special
sequence of operations to assign output GPIO value, so default
implementation of .set() callback from gpio-syscon driver
can't be used.

Hence, add optional, SoC specific callback to assign output
gpio value.
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Device tree is not enabled in some architecture where gpio
driver mcp23s08 is still required.

v2-changes:
- Parse device tree properties into platform data other than
  individual variables.
v3-changes:
- Use of_node in gpio_chip device structure, because the
  struct device * always has an of_node which is NULL when
  OF is not used.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Use of unmask/mask in set_wake was an incorrect implementation. The new
implementation correctly sets wakeup for the gpio chip's IRQ so the gpio chip
will not sleep while wakeup-enabled gpio are in use.
Signed-off-by: NEzra Savard <ezra.savard@xilinx.com>
Reviewed-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Added flag to the GPIO chip so that IRQ from non-wakeup GPIO will
not wake the system.
Signed-off-by: NEzra Savard <ezra.savard@xilinx.com>
Reviewed-by: NSoren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

When looking up the IRQ the bank offset needs to be taken into account.
Otherwise interrupts for banks other than bank 0 get incorrectly reported as
interrupts for bank 0.
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This switches the ADNP GPIO driver to use the gpiolib
irqchip helpers. Also do some random refactoring to make it
look like most other GPIO drivers.

Cc: Roland Stigge <stigge@antcom.de>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The current prototype of gpiochip_request_own_desc() requires to obtain
a pointer to a descriptor. This is in contradiction to all other GPIO
request schemes, and imposes an extra step of obtaining a descriptor to
drivers. Most drivers actually cannot even perform that step since the
function that does it (gpichip_get_desc()) is gpiolib-private.

Change gpiochip_request_own_desc() to return a descriptor from a
(chip, hwnum) tuple and update users of this function (currently
gpiolib-acpi only).
Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com>
Tested-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

GPIO descriptors are changing from unique and permanent tokens to
allocated resources. Therefore gpiochip_get_desc() cannot be used as a
way to obtain a global GPIO descriptor anymore.

This patch updates the gpiolib ACPI support code to keep and use the
descriptor returned by a centralized call to gpiochip_get_desc().
Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com>
Tested-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

zynq_gpio_irqhandler() uses up to 7 tabs of indention in some parts. Refactor
things to use a helper function for the inner loop to reduce the indention to a
sane level.
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add another example to describe bindings that work for PXA3xx boards.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

There is no need to init .owner field.

Based on the patch from Peter Griffin <peter.griffin@linaro.org>
"mmc: remove .owner field for drivers using module_platform_driver"

This patch removes the superflous .owner field for drivers which
use the module_platform_driver API, as this is overriden in
platform_driver_register anyway."
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Documentation for APM X-Gene SoC GPIO controller DTS binding.
Signed-off-by: NFeng Kan <fkan@apm.com>
Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>