1. 17 9月, 2014 1 次提交
    • T
      ARM: OMAP3: Fix I/O chain clock line assertion timed out error · 7db143b8
      Tony Lindgren 提交于
      We are getting "PRM: I/O chain clock line assertion timed out" errors
      on early omaps for device tree based booting. This is because we are
      unconditionally calling reconfigure_io_chain while legacy booting
      has omap3_has_io_chain_ctrl() checks in place in omap_hwmod.c.
      
      For device tree based booting, we are calling reconfigure_io_chain
      unconditionally from pinctrl framework. So we need to add a check for
      omap3_has_io_chain_ctrl() to avoid the errors for trying to access
      a register that does not exist.
      
      For es3.0, the documentation in "4.11.2 Device Off-Mode Configuration"
      just mentions PM_WKEN_WKUP[8] bit. For es3.1, there's a new chapter in
      documentation for "4.11.2.2 I/O Wake-Up Mechanism" that describes the
      PM_WKEN_WKUP[16] ST_IO_CHAIN bit. So PM_WKEN_WKUP[16] bit did not get
      added until in es3.1 probaly to fix issues with flakey wake-up events.
      
      We are doing proper checks for ST_IO_CHAIN already in id.c and with
      omap3_has_io_chain_ctrl(). For more information, see also commit
      b02b9172 ("ARM: OMAP3: PM: fix I/O wakeup and I/O chain clock
      control detection").
      
      Let's fix the issue by selecting the right function during init for
      reconfigure_io_chain depending on the omap revision. For es3.0 and
      earlier we need to just toggle EN_IO. By doing this, we can move the
      check for omap3_has_io_chain_ctrl() from omap_hwmod.c to the init code
      in prm_3xxx.c. And then we can unconditionally call reconfigure_io_chain.
      
      Thanks to Paul Walmsley and Nishanth Menon for help with debugging the
      issue.
      
      Fixes: 30a69ef7 ("ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap")
      Cc: Kevin Hilman <khilman@kernel.org>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Tero Kristo <t-kristo@ti.com>
      Reviewed-by: NNishanth Menon <nm@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      7db143b8
  2. 08 9月, 2014 1 次提交
  3. 04 7月, 2014 8 次提交
  4. 16 5月, 2014 4 次提交
  5. 12 1月, 2013 1 次提交
    • T
      ARM: OMAP2+: Use omap initcalls · b76c8b19
      Tony Lindgren 提交于
      This way the initcalls don't run on other SoCs on multiplatform
      kernels. Otherwise we'll get something like this when booting
      on vexpress:
      
      omap_hwmod: _ensure_mpu_hwmod_is_setup: MPU initiator hwmod mpu not yet registered
      ...
      WARNING: at arch/arm/mach-omap2/pm.c:82 _init_omap_device+0x74/0x94()
      _init_omap_device: could not find omap_hwmod for mpu
      ...
      omap-dma-engine omap-dma-engine: OMAP DMA engine driver
      ...
      Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      b76c8b19
  6. 03 1月, 2013 1 次提交
    • P
      ARM: OMAP2/3: PRM: fix bogus OMAP2xxx powerstate return values · 7e7fff82
      Paul Walmsley 提交于
      On OMAP2xxx chips, the register bitfields for the
      PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED are
      different than those used on OMAP3/4.  The order is reversed.  So, for
      example, on OMAP2xxx, 0x0 indicates 'ON'; but on OMAP3/4, 0x0
      indicates 'OFF'.  Similarly, on OMAP2xxx, 0x3 indicates 'OFF', but on
      OMAP3/4, 0x3 indicates 'ON'.
      
      To fix this, we treat the OMAP3/4 values as the powerdomain API
      values, and create new low-level powerdomain functions for the
      OMAP2xxx chips which translate between the OMAP2xxx values and the
      OMAP3/4 values.
      
      Without this patch, the conversion of the OMAP2xxx PM code to the
      functional powerstate code results in a non-booting kernel.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      7e7fff82
  7. 18 12月, 2012 1 次提交
  8. 22 11月, 2012 1 次提交
  9. 09 11月, 2012 2 次提交
  10. 21 10月, 2012 3 次提交
    • P
      ARM: OMAP2+: PRM: create PRM reset source API for the watchdog timer driver · 2bb2a5d3
      Paul Walmsley 提交于
      The OMAP watchdog timer driver needs to determine what caused the SoC
      to reset for its GETBOOTSTATUS ioctl.  So, define a set of standard
      reset sources across OMAP SoCs.  For OMAP2xxx, 3xxx, and 4xxx SoCs,
      define mappings from the SoC-specific reset source register bits to
      the standardized reset source IDs.  Create SoC-specific PRM functions
      that read the appropriate per-SoC register and use the mapping to
      return the standardized reset bits.  Register the SoC-specific PRM
      functions with the common PRM code via prm_register().  Create a
      function in the common PRM code, prm_read_reset_sources(), that
      calls the SoC-specific function, registered during boot.
      
      This patch does not yet handle some SoCs, such as AM33xx.  Those SoCs
      were not handled by the code this will replace.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      2bb2a5d3
    • P
      ARM: OMAP2+: powerdomain/PRM: move the low-level powerdomain functions into PRM · 49815399
      Paul Walmsley 提交于
      Move the low-level SoC-specific powerdomain control functions into
      prm*.c.  For example, OMAP2xxx low-level powerdomain functions go into
      prm2xxx.c.  Then remove the unnecessary powerdomain*xxx*.c files.
      
      The objective is to centralize low-level PRM register accesses into
      the prm*.[ch] files, and then to export an OMAP SoC-independent API to
      higher-level OMAP power management code.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      Cc: Vaibhav Hiremath <hvaibhav@ti.com>
      Acked-by: NRajendra Nayak <rnayak@ti.com>
      Reviewed-by: NRuss Dill <Russ.Dill@ti.com>
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      49815399
    • P
      ARM: OMAP2+: PRM: split PRM functions into OMAP2, OMAP3-specific files · 139563ad
      Paul Walmsley 提交于
      Move OMAP3xxx-specific PRM functions & macros into prm3xxx.[ch] and
      OMAP2xxx-specific macros into prm2xxx.h.  (prm2xxx.c will be created
      by a subsequent patch when it's needed.)  Move basic PRM register
      access functions into static inline functions in prm2xxx_3xxx.h, leaving
      only OMAP2/3 hardreset functions in prm2xxx_3xxx.c.
      
      Also clarify the initcall function naming to reinforce that this code
      is specifically for the PRM IP block.
      
      This is in preparation for the upcoming powerdomain series and the
      upcoming move of this code to drivers/.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Reviewed-by: NRuss Dill <Russ.Dill@ti.com>
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      139563ad
  11. 13 9月, 2012 2 次提交
    • T
      ARM: OMAP: Split plat/hardware.h, use local soc.h for omap2+ · dbc04161
      Tony Lindgren 提交于
      As the plat and mach includes need to disappear for single zImage work,
      we need to remove plat/hardware.h.
      
      Do this by splitting plat/hardware.h into omap1 and omap2+ specific files.
      
      The old plat/hardware.h already has omap1 only defines, so it gets moved
      to mach/hardware.h for omap1. For omap2+, we use the local soc.h
      that for now just includes the related SoC headers to keep this patch more
      readable.
      
      Note that the local soc.h still includes plat/cpu.h that can be dealt
      with in later patches. Let's also include plat/serial.h from common.h for
      all the board-*.c files. This allows making the include files local later
      on without patching these files again.
      
      Note that only minimal changes are done in this patch for the
      drivers/watchdog/omap_wdt.c driver to keep things compiling. Further
      patches are needed to eventually remove cpu_is_omap usage in the drivers.
      
      Also only minimal changes are done to sound/soc/omap/* to remove the
      unneeded includes and to define OMAP44XX_MCPDM_L3_BASE locally so there's
      no need to include omap44xx.h.
      
      While at it, also sort some of the includes in the standard way.
      
      Cc: linux-watchdog@vger.kernel.org
      Cc: alsa-devel@alsa-project.org
      Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
      Cc: Jarkko Nikula <jarkko.nikula@bitmer.com>
      Cc: Liam Girdwood <lrg@ti.com>
      Acked-by: NWim Van Sebroeck <wim@iguana.be>
      Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      dbc04161
    • T
      ARM: OMAP2+: Prepare for irqs.h removal · 7d7e1eba
      Tony Lindgren 提交于
      As the interrupts should only be defined in the platform_data, and
      eventually coming from device tree, there's no need to define them
      in header files.
      
      Let's remove the hardcoded references to irqs.h and fix up the includes
      so we don't rely on headers included in irqs.h. Note that we're
      defining OMAP_INTC_START as 0 to the interrupts. This will be needed
      when we enable SPARSE_IRQ. For some drivers we need to add
      #include <plat/cpu.h> for now until these drivers are fixed to
      remove cpu_is_omapxxxx() usage.
      
      While at it, sort som of the includes the standard way, and add
      the trailing commas where they are missing in the related data
      structures.
      
      Note that for drivers/staging/tidspbridge we just define things
      locally.
      
      Cc: Paul Walmsley <paul@pwsan.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      7d7e1eba
  12. 29 6月, 2012 1 次提交
    • K
      ARM: OMAP2+: PM: fix IRQ_NOAUTOEN removal by mis-merge · d660e9b9
      Kevin Hilman 提交于
      commit 99b59df0 (ARM: OMAP3: PM: fix shared PRCM interrupt leave
      disabled at boot) added IRQ_NOAUTOEN to the PRCM interrupt so it could
      be enabled later if needed.  However, this commit was partially undone
      when merging the IO daisy chain rework in 9a17d88e (Merge tag
      'omap-devel-c-for-3.6' of
      git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into
      devel-pm
      
      This patch adds back the IRQ_NOAUTOEN fix that was removed by the
      merge resolution.
      
      This also fixes the following boot-time warning that showed up after
      merging the IO daisy chain rework:
      
      [    3.849334] WARNING: at kernel/irq/manage.c:436 enable_irq+0x3c/0x78()
      [    3.856231] Unbalanced enable for IRQ 297
      [    3.860473] Modules linked in:
      [    3.863739] [<c001a114>] (unwind_backtrace+0x0/0xf0) from [<c003c7e8>] (warn_slowpath_common+0x4c/0x64)
      [    3.873687] [<c003c7e8>] (warn_slowpath_common+0x4c/0x64) from [<c003c894>] (warn_slowpath_fmt+0x30/0x40)
      [    3.883819] [<c003c894>] (warn_slowpath_fmt+0x30/0x40) from [<c00993e0>] (enable_irq+0x3c/0x78)
      [    3.893035] [<c00993e0>] (enable_irq+0x3c/0x78) from [<c067b1e8>] (omap3_pm_init+0x328/0x5f4)
      [    3.902099] [<c067b1e8>] (omap3_pm_init+0x328/0x5f4) from [<c067161c>] (init_machine_late+0x1c/0x28)
      [    3.911773] [<c067161c>] (init_machine_late+0x1c/0x28) from [<c0008648>] (do_one_initcall+0x34/0x178)
      [    3.921539] [<c0008648>] (do_one_initcall+0x34/0x178) from [<c066e8f4>] (kernel_init+0xfc/0x1c0)
      [    3.930847] [<c066e8f4>] (kernel_init+0xfc/0x1c0) from [<c00140b0>] (kernel_thread_exit+0x0/0x8)
      [    3.940246] ---[ end trace 55a0ad32ca2ca682 ]---
      Reported-by: NJavier Martinez Canillas <javier@dowhile0.org>
      Cc: Paul Walmsley <paul@pwsan.com>
      Signed-off-by: NKevin Hilman <khilman@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      d660e9b9
  13. 22 6月, 2012 2 次提交
    • T
      ARM: OMAP3+: PRM: Enable IO wake up · 8a680ea2
      Tero Kristo 提交于
      Enable IO Wake up for OMAP3/4 as part of PRM Init. Currently this has been
      managed in cpuidle path which is not the right place. Subsequent patch
      will remove IO Daisy chain handling in cpuidle path once daisy chain is
      handled as part of hwmod mux. This patch also moves the OMAP4 IO wakeup
      enable code from the trigger function to init time setup.
      Signed-off-by: NTero Kristo <t-kristo@ti.com>
      Reviewed-by: NRajendra Nayak <rnayak@ti.com>
      [paul@pwsan.com: harmonize function names with other PRM functions; add
       kerneldoc; resolve checkpatch warnings]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      8a680ea2
    • V
      ARM: OMAP3: PM: Move IO Daisychain function to omap3 prm file · 09659fa7
      Vishwanath BS 提交于
      Since IO Daisychain modifies only PRM registers, it makes sense to move
      it to PRM File. Also changed the timeout value for IO chain enable to
      100us and added a wait for status disable at the end.
      
      Thanks to Nishanth Menon <nm@ti.com> for contributing a fix to the
      timeout code waiting for WUCLKOUT to go high.
      Signed-off-by: NVishwanath BS <vishwanath.bs@ti.com>
      Signed-off-by: NTero Kristo <t-kristo@ti.com>
      Cc: Nishanth Menon <nm@ti.com>
      Reviewed-by: NRajendra Nayak <rnayak@ti.com>
      [paul@pwsan.com: renamed omap3_trigger_io_chain() to better describe the
       end result and to match other PRM functions; removed
       omap3_disable_io_chain(); moved MAX_IOPAD_LATCH_TIME to prcm-common as it
       will also be used by the OMAP4 code; removed unnecessary barrier;
       added kerneldoc; added credit for fix from Nishanth]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      09659fa7
  14. 12 5月, 2012 1 次提交
    • K
      ARM: OMAP3: PM: fix shared PRCM interrupts: leave disabled at boot · 99b59df0
      Kevin Hilman 提交于
      By default, request_irq() will auto-enable the requested IRQ.
      
      For PRCM interrupts, we may want to avoid that until the PM core code
      is fully ready to handle the interrupts.  This is particularily true
      for IO pad interrupts on OMAP3, which are shared between the hwmod
      core and the PRM core.
      
      In order to avoid PRCM IO-chain interrupts until the PM core is ready
      to handle them, ready, set the IRQ_NOAUTOEN flag for the PRCM IO-chain
      interrupt,  which means it will remain disabled after request_irq().
      
      Then, explicitly enable the PRCM interrupts after the request_irq() in
      the PM core (but not in the hwmod core.)
      
      Special thanks to Tero Kristo for suggesting to isolate the fix to
      only the IO-chain interrupt on OMAP3 instead of all PRCM interrupts.
      
      Cc: Tero Kristo <t-kristo@ti.com>
      Acked-by: NPaul Walmsley <paul@pwsan.com>
      Signed-off-by: NKevin Hilman <khilman@ti.com>
      99b59df0
  15. 26 1月, 2012 1 次提交
    • P
      ARM: OMAP2/3: PRM: fix missing plat/irqs.h build breakage · d19e8f2e
      Paul Walmsley 提交于
      Commit 22f51371 ("ARM: OMAP3: pm: use
      prcm chain handler") breaks the build on a 2420-only config, due to
      a missing include for plat/irqs.h:
      
        CC      arch/arm/mach-omap2/prm2xxx_3xxx.o
      arch/arm/mach-omap2/prm2xxx_3xxx.c:41:11: error: 'INT_34XX_PRCM_MPU_IRQ' undeclared here (not in a function)
      
      Fix by explicitly including it.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Tero Kristo <t-kristo@ti.com>
      Cc: Kevin Hilman <khilman@ti.com>
      d19e8f2e
  16. 17 12月, 2011 3 次提交
    • T
      ARM: OMAP3: pm: use prcm chain handler · 22f51371
      Tero Kristo 提交于
      PM interrupt handling is now done through the PRCM chain handler. The
      interrupt handling logic is also split in two parts, to serve IO and
      WKUP events separately. This allows us to handle IO chain events in a
      clean way.
      
      Core event code is also changed in accordance to this, as PRCM
      interrupt handling is done by independent handlers, and the core
      handler should not clear the IO events anymore.
      Signed-off-by: NTero Kristo <t-kristo@ti.com>
      Tested-by: NKevin Hilman <khilman@ti.com>
      Reviewed-by: NKevin Hilman <khilman@ti.com>
      [paul@pwsan.com: use pr_err(); combined with portions of earlier patches and
       the "do not enable PRCM MPU interrupts manually" patch]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      22f51371
    • T
      ARM: OMAP: PRCM: add suspend prepare / finish support · 91285b6f
      Tero Kristo 提交于
      PRCM chain handler needs to disable forwarding of interrupts during
      suspend, because runtime PM is disabled and most of the drivers
      are potentially not able to handle interrupts coming at this time.
      
      This patch masks all the PRCM interrupt events if a PRCM interrupt
      occurs during suspend, but does not ack them. Once suspend finish
      is called, all the masked events will be re-enabled, which causes
      immediate PRCM interrupt and handles the postponed event.
      
      The suspend prepare and complete  callbacks will be called from
      pm34xx.c / pm44xx.c files in the following patches.
      
      The functions defined in this patch should eventually be moved to
      suspend->prepare and suspend->finish driver hooks, once the PRCM
      chain handler will be made as its own driver.
      Signed-off-by: NTero Kristo <t-kristo@ti.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Tested-by: NKevin Hilman <khilman@ti.com>
      Reviewed-by: NKevin Hilman <khilman@ti.com>
      [paul@pwsan.com: add kerneldoc, add omap_prcm_irq_setup.saved_mask, add fn
       ptrs for save_and_clear_irqen() and restore_irqen()]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      91285b6f
    • P
      ARM: OMAP3/4: PRM: add functions to read pending IRQs, PRM barrier · 26c98c56
      Paul Walmsley 提交于
      Add PRM functions to test for pending PRM IRQs.  This will be used in
      a subsequent patch to implement the PRM interrupt handler on the MPU.
      
      Add PRM functions to ensure that all outstanding writes from the MPU
      to the PRM IP block have completed before continuing execution.  This
      will be used in a subsequent patch to ensure that all PRM interrupt
      status bits are cleared in the hardware before exiting the ISR.
      Normally we would not expose such a low-level function to other code.
      But the current implementation of the PRM interrupt code, which uses
      the generic IRQ chip code, doesn't give us a choice.
      
      The pending PRM IRQ functions are based on code originally written by
      Tero Kristo <t-kristo@ti.com>.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Tero Kristo <t-kristo@ti.com>
      26c98c56
  17. 18 11月, 2011 1 次提交
  18. 16 9月, 2011 2 次提交
  19. 10 3月, 2011 1 次提交
    • O
      OMAP2+: hwmod: use status bit info for reset line · cc1226e7
      omar ramirez 提交于
      On OMAP2 and OMAP3 the reset ctrl shift doesn't match the
      status bit, as it does on OMAP4, when handling the reset lines.
      
      This patch adds a new member in the reset info structure, so now it
      can be added as part of hwmod data, and checked accordingly for
      OMAP2 or 3; otherwise, there could be cases when the shift masks
      doesn't match both of the registers, and a successful reset might
      throw an error message or vice versa.
      Signed-off-by: NOmar Ramirez Luna <omar.ramirez@ti.com>
      [paul@pwsan.com: added a warning if st_shift used on OMAP4; renamed 'r'
       variable; improved some documentation]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      cc1226e7
  20. 22 12月, 2010 3 次提交