1. 26 5月, 2012 2 次提交
    • C
      arch/tile: Allow tilegx to build with either 16K or 64K page size · d5d14ed6
      Chris Metcalf 提交于
      This change introduces new flags for the hv_install_context()
      API that passes a page table pointer to the hypervisor.  Clients
      can explicitly request 4K, 16K, or 64K small pages when they
      install a new context.  In practice, the page size is fixed at
      kernel compile time and the same size is always requested every
      time a new page table is installed.
      
      The <hv/hypervisor.h> header changes so that it provides more abstract
      macros for managing "page" things like PFNs and page tables.  For
      example there is now a HV_DEFAULT_PAGE_SIZE_SMALL instead of the old
      HV_PAGE_SIZE_SMALL.  The various PFN routines have been eliminated and
      only PA- or PTFN-based ones remain (since PTFNs are always expressed
      in fixed 2KB "page" size).  The page-table management macros are
      renamed with a leading underscore and take page-size arguments with
      the presumption that clients will use those macros in some single
      place to provide the "real" macros they will use themselves.
      
      I happened to notice the old hv_set_caching() API was totally broken
      (it assumed 4KB pages) so I changed it so it would nominally work
      correctly with other page sizes.
      
      Tag modules with the page size so you can't load a module built with
      a conflicting page size.  (And add a test for SMP while we're at it.)
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      d5d14ed6
    • C
      arch/tile: allow building Linux with transparent huge pages enabled · 73636b1a
      Chris Metcalf 提交于
      The change adds some infrastructure for managing tile pmd's more generally,
      using pte_pmd() and pmd_pte() methods to translate pmd values to and
      from ptes, since on TILEPro a pmd is really just a nested structure
      holding a pgd (aka pte).  Several existing pmd methods are moved into
      this framework, and a whole raft of additional pmd accessors are defined
      that are used by the transparent hugepage framework.
      
      The tile PTE now has a "client2" bit.  The bit is used to indicate a
      transparent huge page is in the process of being split into subpages.
      
      This change also fixes a generic bug where the return value of the
      generic pmdp_splitting_flush() was incorrect.
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      73636b1a
  2. 13 5月, 2011 1 次提交
    • C
      arch/tile: finish enabling support for TILE-Gx 64-bit chip · 18aecc2b
      Chris Metcalf 提交于
      This support was partially present in the existing code (look for
      "__tilegx__" ifdefs) but with this change you can build a working
      kernel using the TILE-Gx toolchain and ARCH=tilegx.
      
      Most of these files are new, generally adding a foo_64.c file
      where previously there was just a foo_32.c file.
      
      The ARCH=tilegx directive redirects to arch/tile, not arch/tilegx,
      using the existing SRCARCH mechanism in the top-level Makefile.
      
      Changes to existing files:
      
      - <asm/bitops.h> and <asm/bitops_32.h> changed to factor the
        include of <asm-generic/bitops/non-atomic.h> in the common header.
      
      - <asm/compat.h> and arch/tile/kernel/compat.c changed to remove
        the "const" markers I had put on compat_sys_execve() when trying
        to match some recent similar changes to the non-compat execve.
        It turns out the compat version wasn't "upgraded" to use const.
      
      - <asm/opcode-tile_64.h> and <asm/opcode_constants_64.h> were
        previously included accidentally, with the 32-bit contents.  Now
        they have the proper 64-bit contents.
      
      Finally, I had to hack the existing hacky drivers/input/input-compat.h
      to add yet another "#ifdef" for INPUT_COMPAT_TEST (same as x86_64).
      Signed-off-by: NChris Metcalf <cmetcalf@tilera.com>
      Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> [drivers/input]
      18aecc2b