- 18 7月, 2016 1 次提交
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由 John Crispin 提交于
Signed-off-by: NJohn Crispin <john@phrozen.org> Cc: devicetree@vger.kernel.org Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 28 5月, 2016 8 次提交
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由 Antony Pavlov 提交于
Here is the quote from [1]: The unit-address must match the first address specified in the reg property of the node. If the node has no reg property, the @ and unit-address must be omitted and the node-name alone differentiates the node from other nodes at the same level This patch adjusts MIPS dts-files and devicetree binding documentation in accordance with [1]. [1] Power.org(tm) Standard for Embedded Power Architecture(tm) Platform Requirements (ePAPR). Version 1.1 – 08 April 2011. Chapter 2.2.1.1 Node Name Requirements Signed-off-by: NAntony Pavlov <antonynpavlov@gmail.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13345/Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Purna Chandra Mandal 提交于
Update binding example based on new clock binding scheme. [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt Signed-off-by: NPurna Chandra Mandal <purna.mandal@microchip.com> Acked-by: NRob Herring <robh@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: linux-gpio@vger.kernel.org Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13270/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Purna Chandra Mandal 提交于
Update binding example based on new clock binding scheme. [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt Signed-off-by: NPurna Chandra Mandal <purna.mandal@microchip.com> Acked-by: NRob Herring <robh@kernel.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Joshua Henderson <digitalpeer@digitalpeer.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13269/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Purna Chandra Mandal 提交于
Update binding example based on new clock binding scheme. [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt Signed-off-by: NPurna Chandra Mandal <purna.mandal@microchip.com> Acked-by: NRob Herring <robh@kernel.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Joshua Henderson <digitalpeer@digitalpeer.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13268/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Purna Chandra Mandal 提交于
Update binding example based on new clock binding scheme. [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt Signed-off-by: NPurna Chandra Mandal <purna.mandal@microchip.com> Acked-by: NRob Herring <robh@kernel.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Joshua Henderson <digitalpeer@digitalpeer.com> Cc: Andrei Pistirica <andrei.pistirica@microchip.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13267/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Purna Chandra Mandal 提交于
Update binding example based on new clock binding scheme. [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt Signed-off-by: NPurna Chandra Mandal <purna.mandal@microchip.com> Acked-by: NRob Herring <robh@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Joshua Henderson <digitalpeer@digitalpeer.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13266/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Purna Chandra Mandal 提交于
Update binding example based on new clock binding documentation. [1] Documentation/devicetree/bindings/clock/microchip,pic32.txt Signed-off-by: NPurna Chandra Mandal <purna.mandal@microchip.com> Acked-by: NRob Herring <robh@kernel.org> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Kumar Gala <galak@codeaurora.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Joshua Henderson <digitalpeer@digitalpeer.com> Cc: Andrei Pistirica <andrei.pistirica@microchip.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13265/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Baruch Siach 提交于
Commit 32698aaf (Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value, 2016-04-22) deprecated "soft_bch". Update the example to match. Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Acked-by: NRafał Miłecki <zajec5@gmail.com> Acked-by: NRob Herring <robh@kernel.org> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 26 5月, 2016 1 次提交
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由 Wenyou Yang 提交于
This reverts commit 5ddc7bd4 ("mtd: atmel_nand: Support variable RB_EDGE interrupts") Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy line edge status bit. It is a datasheet bug. Cc: <stable@vger.kernel.org> Fixes: commit 5ddc7bd4 ("mtd: atmel_nand: Support variable RB_EDGE interrupts") Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 21 5月, 2016 1 次提交
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由 Fabio Estevam 提交于
Commit da47b457 ("phy: add support for a reset-gpio specification") causes the following xtensa qemu crash according to Guenter Roeck: [ 9.366256] libphy: ethoc-mdio: probed [ 9.367389] (null): could not attach to PHY [ 9.368555] (null): failed to probe MDIO bus [ 9.371540] Unable to handle kernel paging request at virtual address 0000001c [ 9.371540] pc = d0320926, ra = 903209d1 [ 9.375358] Oops: sig: 11 [#1] This reverts commit da47b457. Reported-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Acked-by: NFlorian Fainelli <f.fainelli@gmail.com> Tested-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 20 5月, 2016 2 次提交
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由 Geert Uytterhoeven 提交于
Fix typo in interrupt-names Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
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由 Sergey Yanovich 提交于
DS1302 is an half-duplex SPI device. The driver respects this fact now. Pin configurations should be implemented using SPI subsystem. Signed-off-by: NSergei Ianovich <ynvich@gmail.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
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- 19 5月, 2016 2 次提交
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由 Marek Vasut 提交于
Add vendor ID for Creative technology. Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Cc: Antony Pavlov <antonynpavlov@gmail.com> Cc: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: NRob Herring <robh@kernel.org>
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由 Christian Lamparter 提交于
This patch adds binding information for IBM/AMCC/APM GPIO Controllers of the PowerPC 4XX series and compatible SoCs. The "PowerPC 405EP Embedded Processor Data Sheet" has the following to say about the GPIO controllers: " - Controller functions and GPIO registers are programmed and accessed via memory-mapped OPB bus master accesses - All GPIOs are pin-shared with other functions. DCRs control whether a particular pin that has GPIO capabilities acts as a GPIO or is used for another purpose. - Each GPIO outputs is separately programmable to emulate an open-drain driver (i.e. drives to zero, threestated if output bit is 1) " The ppc4xx_gpio.c driver is part of the platform/sysdev drivers in arch/powerpc/sysdev. Signed-off-by: NChristian Lamparter <chunkeey@googlemail.com> Signed-off-by: NRob Herring <robh@kernel.org>
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- 17 5月, 2016 5 次提交
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由 Laxman Dewangan 提交于
Sometimes, thermal sensors like NCT thermistors are connected to the ADC channel. The temperature is read by reading the voltage across the sensor resistance via ADC and referring the lookup table for ADC value to temperature. Add DT binding doc for the ADC based thermal sensor driver to detail the DT property and provide the example for how to use it. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Acked-by: NRob Herring <rob@kernel.org> Signed-off-by: NEduardo Valentin <edubezval@gmail.com>
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由 Marc Gonzalez 提交于
The Tango thermal driver provides support for the primitive temperature sensor embedded in Tango chips since the SMP8758. This sensor only generates a 1-bit signal to indicate whether the die temperature exceeds a programmable threshold. Signed-off-by: NMarc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: NEduardo Valentin <edubezval@gmail.com>
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由 Simon Horman 提交于
The latest information that I have is that there is no thermal IP block present on the r8a7794 SoC so remove the corresponding binding. Cc: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NEduardo Valentin <edubezval@gmail.com>
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由 Wei Ni 提交于
The "critical" type trip in thermal zone can be set to SOC_THERM hardware, it can trigger shut down or reset event from hardware. Signed-off-by: NWei Ni <wni@nvidia.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NEduardo Valentin <edubezval@gmail.com>
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由 Uwe Kleine-König 提交于
The framework only asserts (for now) that the reset gpio is not active. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 5月, 2016 1 次提交
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由 Simon Horman 提交于
Correct what appears to be a typo in the name of the sd-uhs-sdr50. Also fix mixed tab/space indentation. Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 15 5月, 2016 2 次提交
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由 Niklas Söderlund 提交于
Make it possible to transfer i2c message buffers via DMA. Start/Stop/Sending_Slave_Address and some data is still handled using the old state machine, it is sending the bulk of the data that is done via DMA. The first byte of a transmission and the last two bytes of reception are sent/received using PIO. This is needed for the HW to have access to the first byte before DMA transmit and to be able to set the STOP condition for DMA reception. Signed-off-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Acked-by: NRob Herring <robh@kernel.org> Tested-by: NWolfram Sang <wsa+renesas@sang-engineering.com> [wsa: fixed a checkpatch warning] Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Wolfram Sang 提交于
Add support for watchdogs (RWDT and SWDT) found on RCar Gen3 based SoCs from Renesas. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
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- 14 5月, 2016 1 次提交
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由 Tim Harvey 提交于
The IMX6 watchdog supports assertion of a signal (WDOG_B) which can be pinmux'd to an external pin. This is typically used for boards that have PMIC's in control of the IMX6 power rails. In fact, failure to use such an external reset on boards with external PMIC's can result in various hangs due to the IMX6 not being fully reset [1] as well as the board failing to reset because its PMIC has not been reset to provide adequate voltage for the CPU when coming out of reset at 800Mhz. This uses a new device-tree property 'fsl,ext-reset-output' to indicate the board has such a reset and to cause the watchdog to be configured to assert WDOG_B instead of an internal reset both on a watchdog timeout and in system_restart. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2015-March/333689.html Cc: Fabio Estevam <festevam@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Stefan Roese <sr@denx.de> Cc: Iain Paton <ipaton0@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NTim Harvey <tharvey@gateworks.com> Reviewed-by: NLucas Stach <l.stach@pengutronix.de> Acked-by: NShawn Guo <shawn.guo@linaro.org> Tested-by: NAkshay Bhat <akshay.bhat@timesys.com> Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NWim Van Sebroeck <wim@iguana.be>
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- 13 5月, 2016 15 次提交
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由 Purna Chandra Mandal 提交于
Document the devicetree bindings for the clock driver found on Microchip PIC32 class devices. Signed-off-by: NPurna Chandra Mandal <purna.mandal@microchip.com> Acked-by: NRob Herring <robh@kernel.org> Acked-by: NMichael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Purna Chandra Mandal <purna.mandal@microchip.com> Cc: Kumar Gala <galak@codeaurora.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-clk@vger.kernel.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13246/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Purna Chandra Mandal 提交于
Document the devicetree bindings for the deadman timer peripheral found on Microchip PIC32 SoC class devices. Signed-off-by: NPurna Chandra Mandal <purna.mandal@microchip.com> Signed-off-by: NJoshua Henderson <joshua.henderson@microchip.com> Acked-by: NRob Herring <robh@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Wim Van Sebroeck <wim@iguana.be> Cc: Guenter Roeck <linux@roeck-us.net> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-watchdog@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12702/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Joshua Henderson 提交于
Document the devicetree bindings for the watchdog peripheral found on Microchip PIC32 SoC class devices. Signed-off-by: NJoshua Henderson <joshua.henderson@microchip.com> Acked-by: NRob Herring <robh@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Wim Van Sebroeck <wim@iguana.be> Cc: Guenter Roeck <linux@roeck-us.net> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-watchdog@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12700/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Álvaro Fernández Rojas 提交于
This SoC is very similar to BCM63168 and Broadcom usually refers to them as BCM63268. Add BCM63268 and missing BCM63168 to device tree documentation. Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Acked-by: NRob Herring <robh@kernel.org> Cc: f.fainelli@gmail.com Cc: jogo@openwrt.org Cc: cernekee@gmail.com Cc: robh@kernel.org Cc: simon@fire.lp0.eu Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13042/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Álvaro Fernández Rojas 提交于
This adds a device tree example for SFR Neufbox4 (Sercomm version), which also serves as a real example for brcm,bcm6358-leds. Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Acked-by: NRob Herring <robh@kernel.org> Cc: f.fainelli@gmail.com Cc: jogo@openwrt.org Cc: cernekee@gmail.com Cc: robh@kernel.org Cc: simon@fire.lp0.eu Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13041/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Simon Arlott 提交于
Add device tree binding for the BCM6345 interrupt controller. This controller is similar to the SMP-capable BCM7038 and the BCM3380 but with packed interrupt registers. Signed-off-by: NSimon Arlott <simon@fire.lp0.eu> Acked-by: NRob Herring <robh@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11804/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Andrei Pistirica 提交于
Document the devicetree bindings for the UART peripheral found on Microchip PIC32 class devices. Signed-off-by: NAndrei Pistirica <andrei.pistirica@microchip.com> Signed-off-by: NJoshua Henderson <joshua.henderson@microchip.com> Acked-by: NRob Herring <robh@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12100/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Antony Pavlov 提交于
Please see https://www.dptechnics.com/contact for details. Signed-off-by: NAntony Pavlov <antonynpavlov@gmail.com> Acked-by: NRob Herring <robh@kernel.org> Cc: Daan Pape <daan@dptechnics.com> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12885/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Antony Pavlov 提交于
Please see https://onion.io/contact for details. Signed-off-by: NAntony Pavlov <antonynpavlov@gmail.com> Acked-by: NRob Herring <robh@kernel.org> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12883/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Antony Pavlov 提交于
Please see http://www.dragino.com/about/about.html for details. Signed-off-by: NAntony Pavlov <antonynpavlov@gmail.com> Acked-by: NRob Herring <robh@kernel.org> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12881/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Add irq_chip support for both IPI and "normal" interrupts of the CIU3 controller. Document the device tree binding for the CIU3. Some functions are non-static as they will be used by follow-on support for MSI-X. Signed-off-by: NDavid Daney <david.daney@cavium.com> Acked-by: NRob Herring <robh@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: devicetree@vger.kernel.org Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12500/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Florian Meier 提交于
Some definitions to support the PCM5102A codec by Texas Instruments. Signed-off-by: NFlorian Meier <florian.meier@koalo.de> Changes to original patch by Florian Meier: * rebased (Makefile and Kconfig * fixed checkpath errors (spaces, newlines) * added dt-binding documentation Signed-off-by: NMartin Sperl <kernel@martin.sperl.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Kedareswara rao Appana 提交于
This patch updates the binding doc with clock description for AXI DMA's. Acked-by: NRob Herring <robh@kernel.org> Acked-by: NSören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NKedareswara rao Appana <appanad@xilinx.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Jon Hunter 提交于
Add device-tree binding documentation for the Tegra210 Audio DMA controller. Signed-off-by: NJon Hunter <jonathanh@nvidia.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Maxime Ripard 提交于
The A10 SoCs and its relatives has a special clock controller to drive the display engines (both frontend and backend), that have a lot in common with the clock to drive the first TCON channel. Add a driver to support both. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Acked-by: NRob Herring <robh@kernel.org> [sboyd@codeaurora.org: Silence variable sized array warning] Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 12 5月, 2016 1 次提交
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由 Bhuvanchandra DV 提交于
Add support for TPK U.S.A. LLC Fusion 7", 10.1" panels to the DRM simple panel driver. Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NThierry Reding <treding@nvidia.com>
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