Signed-off-by: NPhil Sutter <phil.sutter@viprinet.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

The main goal was to have it not do anything when a zero len parameter
was being passed (which could lead to a null pointer dereference, as in
this case p->src_sg is null, either). Using the min() macro, the lower
part of the loop gets simpler, too.
Signed-off-by: NPhil Sutter <phil.sutter@viprinet.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

Signed-off-by: NPhil Sutter <phil.sutter@viprinet.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

Signed-off-by: NPhil Sutter <phil.sutter@viprinet.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

The code in mv_hash_final is actually a superset of mv_hash_finup's
body. Since the driver works fine without, drop it.
Signed-off-by: NPhil Sutter <phil.sutter@viprinet.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

Signed-off-by: NPhil Sutter <phil.sutter@viprinet.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

Signed-off-by: NPhil Sutter <phil.sutter@viprinet.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

during recent descriptor development, an Invalid Sequence Command
error triggered a:

BUG: recent printk recursion!

due to insufficient memory allocated for the error text.

The Invalid Sequence Command error text is the longest.
The length of the maximum error string is computed as
the sum of:

"DECO: ": 6
"jump tgt desc idx 255: ": 23
Invalid Sequence Command text: 272
zero termination character: 1

i.e, 302 characters.

Define this maximum error string length in error.h and fix
caam_jr_strstatus callsites.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

PPC 970FX Evaluation kit (Maple) boards bear AMD8111 southbridge.
Allow this driver to be compiled in if PPC_MAPLE is selected.
Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Acked-by: NMatt Mackall <mpm@selenic.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

As amd driver doesn't bind to PCI device, we'd better manage reource
allocation on our own to disallow (possible) conflicts.
Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Acked-by: NMatt Mackall <mpm@selenic.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

This patch adds System z hardware acceleration support for AES, DES
and 3DES in CTR mode. The hardware support is available starting with
System z196.
Signed-off-by: NGerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: NJan Glauber <jang@linux.vnet.ibm.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

Add the CTR mode speed test for AES.
Signed-off-by: NJan Glauber <jang@linux.vnet.ibm.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

Cleanup the remaining s390 crypto options by mentioning the earliest machine
type that supports an accelerated algorithm.
Signed-off-by: NJan Glauber <jang@linux.vnet.ibm.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

This patch adds System z hardware acceleration support for the GHASH
algorithm for GCM (Galois/Counter Mode).
The hardware support is available beginning with System z196.
Signed-off-by: NJan Glauber <jang@linux.vnet.ibm.com>
Signed-off-by: NGerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

This patch adds System z hardware acceleration support for the AES XTS mode.
The hardware support is available beginning with System z196.
Signed-off-by: NJan Glauber <jang@linux.vnet.ibm.com>
Signed-off-by: NGerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

Remove a stale file left over from 1efbd15c
and and cleanup the DES code a bit to make it easier to add new code.
Signed-off-by: NJan Glauber <jang@linux.vnet.ibm.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

The specification which crypto facility is required for an algorithm is added
as a parameter to the availability check which is done before an algorithm is
registered. With this change it is easier to add new algorithms that require
different facilities.
Signed-off-by: NJan Glauber <jang@linux.vnet.ibm.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

the fix add testcase for testing aes ofb mode.
Signed-off-by: NPuneet Saxena <puneets@nvidia.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

keep the hex error value reporting version (a) to be consistent
with decrypt_done(), and (b) to keep our hardware guys happy.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

remains from descriptor debugging - not required for normal operation.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

The presence of a h/w Queue Interface would fail due to this
cut-n-paste snafu.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

- add IRQF_SHARED to request_irq flags to support parts such as
the p1023 that has one IRQ line per couple of rings.

- resetting a job ring triggers an interrupt, so move request_irq
prior to jr_reset to avoid 'got IRQ but nobody cared' messages.

- disable IRQs in h/w to avoid contention between reset and
interrupt status

- delete invalid comment - if there were incomplete jobs,
module would be in use, preventing an unload.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

This patch fixes 2 hmac inter-dependent bugs.

1. "omap-sham: hash-in-progress is stored in hw format" commit introduced
optimization where temporary hash had been stored in OMAP specific format
(big endian).
For SHA1 it is different to real hash format, which is little endian.
Final HMAC value was calculated using incorrect hash.
Because CONFIG_CRYPTO_MANAGER_TESTS was disabled this error remained
unnoticed. After enabling this option, bug has been found.

2. HMAC was calculated using temporrary hash value.
For a single-request updates, temporary hash was the final one and
HMAC result was correct. But in fact only the final hash had to be used.
All crypto tests for HMAC produces only single request and
could not catch the problem. This problem is fixed here.
Signed-off-by: NDmitry Kasatkin <dmitry.kasatkin@nokia.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

EMU chips also have crypto HW as HS chips.
Signed-off-by: NDmitry Kasatkin <dmitry.kasatkin@nokia.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

Signed-off-by: NDmitry Kasatkin <dmitry.kasatkin@nokia.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

SHA1 accelerator can also be busy. Add -EBUSY status return option and
return busy status from omap_sham_finup().
Signed-off-by: NMarkku Kylanpaa <ext-markku.kylanpaa@nokia.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

This change adds support for AES encrypting and decrypting using
advanced crypto engine found on Samsung S5PV210 and S5PC110 SoCs.
Signed-off-by: NVladimir Zapolskiy <vzapolskiy@gmail.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

Error handling code following a kmalloc should free the allocated data.

The semantic match that finds the problem is as follows:
(http://www.emn.fr/x-info/coccinelle/)

// <smpl>
@r exists@
local idexpression x;
statement S;
expression E;
identifier f,f1,l;
position p1,p2;
expression *ptr != NULL;
@@

x@p1 = \(kmalloc\|kzalloc\|kcalloc\)(...);
...
if (x == NULL) S
<... when != x
     when != if (...) { <+...x...+> }
(
x->f1 = E
|
 (x->f1 == NULL || ...)
|
 f(...,x->f1,...)
)
...>
(
 return \(0\|<+...x...+>\|ptr\);
|
 return@p2 ...;
)

@script:python@
p1 << r.p1;
p2 << r.p2;
@@

print "* file: %s kmalloc %s return %s" % (p1[0].file,p1[0].line,p2[0].line)
// </smpl>
Signed-off-by: NJulia Lawall <julia@diku.dk>
Acked-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

The SPAcc's have 2 equally sized FIFO's - a command FIFO and a status
FIFO.  The command FIFO takes the requests that are to be performed and
the status FIFO reports the results.  It is possible to get into the
situation where there are more free spaces in the command FIFO than the
status FIFO if we don't empty the status FIFO quickly enough resulting
in a possible overflow of the status FIFO.  This can result in incorrect
status being reported in the status FIFO.

Make sure that when we are submitting requests the number of requests
that have been dispatched but not yet popped from the status FIFO does
not exceed the size of a single FIFO.
Signed-off-by: NJamie Iles <jamie@jamieiles.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

Add new SHA-1/256 module that never needs any fallback and just calls the
PadLock hardware instruction supported from VIA Nano processors to implement
the "update" and "final" function.

They are respectively named "sha1_alg_nano" and "sha256_alg_nano", and will
be used on any VIA Nano processor or the later ones. On VIA C7 CPU, the
"sha1_alg" and "sha256_alg" modules will still be used as before.
Signed-off-by: NBrilly Wu <brillywu@viatech.com.cn>
Signed-off-by: NKary Jin <karyjin@viatech.com.cn>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

- all the integration parameters have been captured by the binding.
- the block name really uniquely identifies this hardware.

Some advocate putting SoC names everywhere in case software needs
to work around some chip-specific bug, but more precise SoC
information already exists in SVR, and board information already
exists in the top-level device tree node.

Note that sometimes the SoC name is a worse identifier than the
block version, as the block version can change between revisions
of the same SoC.

As a matter of historical reference, neither SEC versions 2.x
nor 3.x (driven by talitos) ever needed CHIP references.
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Cc: Kumar Gala <kumar.gala@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Acked-off-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

ARRAY_SIZE() was intended here instead of sizeof().  sizeof() is four
times larger than ARRAY_SIZE().  outstr is normally 256 chars so 
printing garbage to it could overfill the buffer and corrupt memory.
Signed-off-by: NDan Carpenter <error27@gmail.com>
Acked-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

t_alg is an ERR_PTR here so we can't dereference it.
Signed-off-by: NDan Carpenter <error27@gmail.com>
Acked-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

Help clarify that the number trailing in compatible nomenclature
is the version number of the device, i.e., change:

"fsl,p4080-sec4.0", "fsl,sec4.0";

to:

"fsl,p4080-sec-v4.0", "fsl,sec-v4.0";
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Cc: Kumar Gala <kumar.gala@freescale.com>
Cc: Steve Cornelius <sec@pobox.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

The SEC4 supercedes the SEC2.x/3.x as Freescale's
Integrated Security Engine.  Its programming model is
incompatible with all prior versions of the SEC (talitos).

The SEC4 is also known as the Cryptographic Accelerator
and Assurance Module (CAAM); this driver is named caam.

This initial submission does not include support for Data Path
mode operation - AEAD descriptors are submitted via the job
ring interface, while the Queue Interface (QI) is enabled
for use by others.  Only AEAD algorithms are implemented
at this time, for use with IPsec.

Many thanks to the Freescale STC team for their contributions
to this driver.
Signed-off-by: NSteve Cornelius <sec@pobox.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

This patch fixes problem with packets that are not multiple of 64bytes.
Signed-off-by: NAdrian Hoban <adrian.hoban@intel.com>
Signed-off-by: NAidan O'Mahony <aidan.o.mahony@intel.com>
Signed-off-by: NGabriele Paoloni <gabriele.paoloni@intel.com>
Signed-off-by: NTadeusz Struk <tadeusz.struk@intel.com>
Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>

* 'syscore' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/suspend-2.6:
  Introduce ARCH_NO_SYSDEV_OPS config option (v2)
  cpufreq: Use syscore_ops for boot CPU suspend/resume (v2)
  KVM: Use syscore_ops instead of sysdev class and sysdev
  PCI / Intel IOMMU: Use syscore_ops instead of sysdev class and sysdev
  timekeeping: Use syscore_ops instead of sysdev class and sysdev
  x86: Use syscore_ops instead of sysdev classes and sysdevs

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband:
  RDMA/nes: Fix test of uninitialized netdev

* git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6: (55 commits)
  [SCSI] tcm_loop: Add multi-fabric Linux/SCSI LLD fabric module
  [SCSI] qla4xxx: Use polling mode for disable interrupt mailbox completion
  [SCSI] Revert "[SCSI] Retrieve the Caching mode page"
  [SCSI] bnx2fc: IO completion not processed due to missed wakeup
  [SCSI] qla4xxx: Update driver version to 5.02.00-k6
  [SCSI] qla4xxx: masking required bits of add_fw_options during initialization
  [SCSI] qla4xxx: added new function qla4xxx_relogin_all_devices
  [SCSI] qla4xxx: add support for ql4xsess_recovery_tmo cmd line param
  [SCSI] qla4xxx: Add support for ql4xmaxqdepth command line parameter
  [SCSI] qla4xxx: cleanup function qla4xxx_process_ddb_changed
  [SCSI] qla4xxx: Prevent other port reinitialization during remove_adapter
  [SCSI] qla4xxx: remove unused ddb flag DF_NO_RELOGIN
  [SCSI] qla4xxx: cleanup DDB relogin logic during initialization
  [SCSI] qla4xxx: Do not retry ISP82XX initialization if H/W state is failed
  [SCSI] qla4xxx: Do not send mbox command if FW is in failed state
  [SCSI] qla4xxx: cleanup qla4xxx_initialize_ddb_list()
  [SCSI] ses: add subenclosure support
  [SCSI] bnx2fc: Bump version to 1.0.1
  [SCSI] bnx2fc: Remove unnecessary module state checks
  [SCSI] bnx2fc: Fix MTU issue by using static MTU
  ...