1. 16 4月, 2009 3 次提交
  2. 07 4月, 2009 2 次提交
  3. 30 3月, 2009 1 次提交
  4. 27 3月, 2009 1 次提交
  5. 20 3月, 2009 1 次提交
    • R
      [ARM] pass reboot command line to arch_reset() · be093beb
      Russell King 提交于
      OMAP wishes to pass state to the boot loader upon reboot in order to
      instruct it whether to wait for USB-based reflashing or not.  There is
      already a facility to do this via the reboot() syscall, except we ignore
      the string passed to machine_restart().
      
      This patch fixes things to pass this string to arch_reset().  This means
      that we keep the reboot mode limited to telling the kernel _how_ to
      perform the reboot which should be independent of what we request the
      boot loader to do.
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      be093beb
  6. 13 3月, 2009 26 次提交
  7. 27 2月, 2009 2 次提交
  8. 03 2月, 2009 1 次提交
  9. 22 1月, 2009 1 次提交
  10. 20 1月, 2009 1 次提交
    • G
      i.MX31: Image Processing Unit DMA and IRQ drivers · 5296b56d
      Guennadi Liakhovetski 提交于
      i.MX3x SoCs contain an Image Processing Unit, consisting of a Control
      Module (CM), Display Interface (DI), Synchronous Display Controller (SDC),
      Asynchronous Display Controller (ADC), Image Converter (IC), Post-Filter
      (PF), Camera Sensor Interface (CSI), and an Image DMA Controller (IDMAC).
      CM contains, among other blocks, an Interrupt Generator (IG) and a Clock
      and Reset Control Unit (CRCU). This driver serves IDMAC and IG. They are
      supported over dmaengine and irq-chip APIs respectively.
      
      IDMAC is a specialised DMA controller, its DMA channels cannot be used for
      general-purpose operations, even though it might be possible to configure
      a memory-to-memory channel for memcpy operation. This driver will not work
      with generic dmaengine clients, clients, wishing to use it must use
      respective wrapper structures, they also must specify which channels they
      require, as channels are hard-wired to specific IPU functions.
      Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
      Signed-off-by: NGuennadi Liakhovetski <lg@denx.de>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      5296b56d
  11. 08 1月, 2009 1 次提交