- 23 3月, 2015 8 次提交
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由 Boris Brezillon 提交于
Add LCDC pin definitions. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
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由 Boris Brezillon 提交于
Define the HLCDC (HLCD Controller) IP available on some sama5d3 SoCs (i.e. sama5d31, sama5d33, sama5d34 and sama5d36) in sama5d3 dtsi file. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Tested-by: NAnthony Harivel <anthony.harivel@emtrion.de> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Boris Brezillon 提交于
Define alternative pin muxing for the LCDC pins. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Tested-by: NAnthony Harivel <anthony.harivel@emtrion.de> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Boris Brezillon 提交于
The HLCDC (HLCD Controller) IP supports 4 different output mode (RGB444, RGB565, RGB666 and RGB888) and the pin muxing will depend on the chosen RGB mode. Split pin definitions to be able to set pin config according to the selected mode. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Tested-by: NAnthony Harivel <anthony.harivel@emtrion.de> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Enable RTC for all the at91sam9x5 CPU Modules: this will enable it for all the EK boards. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 05 3月, 2015 20 次提交
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由 Josh Wu 提交于
Add ISI dt node and pinctrl settings in sama5d4.dtsi. Signed-off-by: NJosh Wu <josh.wu@atmel.com> [nicolas.ferre@atmel.com: sort nodes in order. remove useless comments] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Bo Shen 提交于
Signed-off-by: NBo Shen <voice.shen@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Leilei Zhao 提交于
Signed-off-by: NLeilei Zhao <leilei.zhao@atmel.com> Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Bo Shen 提交于
Enable audio support for sama5d4ek board. Signed-off-by: NBo Shen <voice.shen@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Bo Shen 提交于
Add wm8904 codec node and enable it. Signed-off-by: NBo Shen <voice.shen@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Bo Shen 提交于
Enable SSC0 node, which will be used for audio. Signed-off-by: NBo Shen <voice.shen@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Bo Shen 提交于
Add SSC 0 and 1 nodes. Signed-off-by: NBo Shen <voice.shen@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Add i2c0 aka twi0 on sama5d4 xplained board. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Josh Wu 提交于
Add at91 sama5d4 xplained board support. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Josh Wu 提交于
macb0 DT node can have phy child nodes, so add the #{address, size}_cells for macb0 node. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Josh Wu 提交于
Add the leds DT node in the dts file. In the leds, d10 is set as heartbeat led. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Philip Attfield 提交于
Add alias, node declaration and pinctrl for i2c1 (aka: twi1). Signed-off-by: NPhilip Attfield <phil.attfield@seqlabs.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Gpio-keys nodes are not using the "reg" property in their sub nodes. So, there is no need to define #address-cells and #size-cells properties in gpio-keys nodes: we remove them in these new boards. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Wenyou Yang 提交于
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
File name had at91 prefix, which is not the case anymore for SAMA5D3. AT91SAM9x5 was mentioned instead of SAMA5D3 SoC. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Bo Shen 提交于
Enable usb device port on at91sam9n12ek board. Signed-off-by: NBo Shen <voice.shen@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Bo Shen 提交于
Add usb device node for at91sam9n12. Signed-off-by: NBo Shen <voice.shen@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Josh Wu 提交于
Enable ISI and ov2640 for at91sam9g25ek board. Meantime, we need to disable the mmc1 and spi0 as they have pin conflict with ISI. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Josh Wu 提交于
Add the camera sensor ov2640 dt support. And connect sensor to isi node as well. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Josh Wu 提交于
Add a new file: at91sam9x5_isi.dtsi, which includes ISI node and pinctrls. Signed-off-by: NJosh Wu <josh.wu@atmel.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 04 3月, 2015 4 次提交
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由 Michel Marti 提交于
Since turning on idle-halt in commit fe46aa67 (ARM: at91/dt: add sam9 watchdog default options to SoCs), SoCs compatible with at91sam9260-wdt no longer reboot if the watchdog times out while the CPU is in idle state. Removing the 'idle-halt' flag that was set by default fixes this. Signed-off-by: NMichel Marti <mma@objectxp.com> Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Acked-by: NSylvain Rochet <sylvain.rochet@finsecur.com> [nicolas.ferre@atmel.com: rework the commit message] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Jonas Andersson 提交于
Corrected pins used by usart3. Signed-off-by: NJonas Andersson <jonas@microbit.se> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Alexander Stein 提交于
Commit ff04660e48b20 ("ARM: at91/dt: add SRAM nodes") used the same base address for sram0 and sram1 leading to the following warning: WARNING: CPU: 0 PID: 1 at fs/sysfs/dir.c:31 sysfs_warn_dup+0x50/0x70() sysfs: cannot create duplicate filename '/devices/platform/300000.sram' Fix the base address for sram1. Signed-off-by: NAlexander Stein <alexanders83@web.de> Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 17 2月, 2015 3 次提交
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由 Arnaud Ebalard 提交于
"isil" and "isl" prefixes are used at various locations inside the kernel to reference Intersil corporation. This patch is part of a series fixing those locations were "isl" is used in compatible strings to use the now expected "isil" prefix instead (NASDAQ symbol for Intersil and most used version). Note: isl9305 is an I2C device so the patch does not in fact currently depend on the introduction of "isil"-based compatible string in isl9305 driver (provided by another patch) because I2C core does not check the prefix yet. Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Uwe Kleine-Knig <uwe@kleine-koenig.org> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Peter Huewe <peter.huewe@infineon.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Mark Brown <broonie@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Darshana Padmadas <darshanapadmadas@gmail.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Landley <rob@landley.net> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Cc: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Ray Jui 提交于
Add I2C device nodes and its properties in bcm-cygnus.dtsi but keep them disabled there. Individual I2C devices can be enabled in board specific dts file when I2C slave devices are enabled in the future Signed-off-by: NRay Jui <rjui@broadcom.com> Reviewed-by: NScott Branden <sbranden@broadcom.com> Reviewed-by: NKevin Cernekee <cernekee@chromium.org> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
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由 Florian Fainelli 提交于
The L2 cache properties were completely off with respect to what the hardware is configured for. Fix the cache-size, cache-line-size and cache-sets to reflect the L2 cache controller we have: 512KB, 16 ways and 32 bytes per cache-line. Fixes: 46d4bca0 ("ARM: BCM63XX: add BCM63138 minimal Device Tree") Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
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- 14 2月, 2015 2 次提交
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由 Gregory CLEMENT 提交于
The Marvell Armada 38x SoCs contains an RTC which differs from the RTC used in the other mvebu SoCs until now. This commit adds the Device Tree description of this interface at the SoC level. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Arnaud Ebalard <arno@natisbad.org> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Boris BREZILLON <boris.brezillon@free-electrons.com> Cc: Lior Amsalem <alior@marvell.com> Cc: Tawfik Bayouk <tawfik@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Arnaud Ebalard 提交于
Now that alarm support for ISL12057 chip is available w/ the specific "isil,irq2-can-wakeup-machine" property, let's use that feature of the driver dedicated to NETGEAR ReadyNAS 102, 104 and 2120 specific routing of RTC Alarm IRQ#2 pin; on those devices, this pin is not connected to the SoC but to a PMIC, which allows the device to be powered up when RTC alarm rings. For that to work, the chip needs to be explicitly marked as a device wakeup source using this "isil,irq2-can-wakeup-machine" boolean property. This makes 'wakealarm' sysfs entry available to configure the alarm. Signed-off-by: NArnaud Ebalard <arno@natisbad.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Peter Huewe <peter.huewe@infineon.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Thierry Reding <treding@nvidia.com> Cc: Mark Brown <broonie@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Darshana Padmadas <darshanapadmadas@gmail.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Landley <rob@landley.net> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Cc: Kumar Gala <galak@codeaurora.org> Cc: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 09 2月, 2015 2 次提交
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由 Sylwester Nawrocki 提交于
Now when the CDCLK I2S output clock can be handled through the clock API the Odroid X2/U3 can be switched to the simple-audio-card DT binding. Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Sylwester Nawrocki 提交于
Clock related properties are added to the Exynos4 I2S device nodes so they can be referred to as clock providers. Missing i2s_opclk1 clock is added to the I2S0 node and clock properties are added to the MAX98090 codec node to allow it to control/read frequency of the MCLK clock directly. Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 06 2月, 2015 1 次提交
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由 Sylwester Nawrocki 提交于
I2S1, I2S2 on Exynos4 SoC series have limited functionality compared to I2S0, "samsung,s3c6410-i2s" compatible should be used for them. Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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