- 11 12月, 2012 2 次提交
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由 Kumar, Anil 提交于
Since the aemif driver conversion to DT along with its movement to drivers/ folder is not yet done, fix NAND binding documentation to have NAND specific DT details only. Signed-off-by: NKumar, Anil <anilkumar.v@ti.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Gregory CLEMENT 提交于
The support was already written, but the binding documentation was lacking. Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 07 12月, 2012 6 次提交
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由 Daniel Drake 提交于
The OLPC XO-1.75 laptop includes a SDHCI controller which is 1.8v capable, and it truthfully reports so in its capabilities. This alternate voltage is used for driving new "UHS-I" SD cards at their full speed. However, what the controller doesn't know is that the motherboard physically doesn't have a 1.8v supply available, so attempting to switch to the 1.8v level will result in a situation that cannot be recovered from without physically replugging the SD card. Add a device tree flag that can be used on systems like these, and hook it up to the equivalent SDHCI quirk. Signed-off-by: NDaniel Drake <dsd@laptop.org> Reviewed-by: NPhilip Rakity <prakity@nvidia.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Tomasz Figa 提交于
This patch adds support for pin configuration using pinctrl subsystem to the sdhci-s3c driver. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Acked-by: NThomas Abraham <thomas.abraham@linaro.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Hebbar, Gururaja 提交于
HSMMC IP on AM33xx need a special setting to handle High-speed cards. Other platforms like TI81xx, OMAP4 may need this as-well. This depends on the HSMMC IP timing closure done for the high speed cards. From AM335x TRM (SPRUH73F - 18.3.12 Output Signals Generation): The MMC/SD/SDIO output signals can be driven on either falling edge or rising edge depending on the SD_HCTL[2] HSPE bit. This feature allows to reach better timing performance, and thus to increase data transfer frequency. There are few pre-requisites for enabling the HSPE bit - Controller should support High-Speed-Enable Bit and - Controller should not be using DDR Mode and - Controller should advertise that it supports High Speed in capabilities register and - MMC/SD clock coming out of controller > 25MHz Signed-off-by: NHebbar, Gururaja <gururaja.hebbar@ti.com> Signed-off-by: NVenkatraman S <svenkatr@ti.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Abhilash Kesavan 提交于
Add documentation for pm capabilties such as MMC_PM_KEEP_POWER and MMC_PM_WAKE_SDIO_IRQ. Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Abhilash Kesavan 提交于
Fix typo in the synopsis dwmmc controller dt binding filename. Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Tony Prisk 提交于
This patch adds support for the SD/MMC host controller found on Wondermedia 8xxx series SoCs, currently supported under arm/arch-vt8500. A binding document is also included, based on mmc.txt with additional properties. Signed-off-by: NTony Prisk <linux@prisktech.co.nz> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 06 12月, 2012 2 次提交
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由 Grant Likely 提交于
Merely reorganizing documentation. No functional changes. It makes more sense for the gpio-leds binding to be grouped with other led bindings than with gpio drivers. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 James Hogan 提交于
The "powervr" prefix which is currently described as "Imagination Technologies" isn't really appropriate for non-PowerVR hardware, so deprecate it, changing the description of "powervr" to "PowerVR (deprecated, use img)", and add a separate "img" prefix for "Imagination Technologies Ltd.". Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 21 11月, 2012 3 次提交
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由 Marek Belisko 提交于
There are several drivers that use LEDs and depend on exactly the same device tree binding. However, the binding documentation has simply been cut-and-paste into each of the binding documents. Rather than continue to duplicate it, this patch adds a common led binding document that all can reference. Signed-off-by: NMarek Belisko <marek.belisko@open-nandra.com> Reviewed-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Stephen Warren 提交于
Their stock ticker is 3407.T which wouldn't make a good DT vendor prefix. Use the company name initials instead. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NRob Herring <rob.herring@calxeda.com>
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由 Srinivas Kandagatla 提交于
This patch adds a device tree vendor prefix for Synopsys Inc. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: NRob Herring <rob.herring@calxeda.com>
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- 20 11月, 2012 1 次提交
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由 Srinivas Kandagatla 提交于
When the mdio-gpio driver is probed via device trees, the platform device id is set as -1, However the pdev->id is re-used as bus-id for while creating mdio gpio bus. So For device tree case the mdio-gpio bus name appears as "gpio-ffffffff" where as for non-device tree case the bus name appears as "gpio-<bus-num>" Which means the bus_id is fixed in device tree case, so we can't have two mdio gpio buses via device trees. Assigning a logical bus number via device tree solves the problem and the bus name is much consistent with non-device tree bus name. Without this patch 1. we can't support two mdio-gpio buses via device trees. 2. we should always pass gpio-ffffffff as bus name to phy_connect, very different to non-device tree bus name. So, setting up the bus_id via aliases from device tree is the right solution and other drivers do similar thing. Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 19 11月, 2012 2 次提交
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由 Joachim Eastwood 提交于
Based on AT91 PIT DT patch from Jean-Christophe PLAGNIOL-VILLARD. Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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add : set_deglitch: enable/disable deglitch set_debounce: enable/disable debounce set_pulldown: enable/disable pulldown disable_schmitt_trig: disable schmitt trigger Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 17 11月, 2012 1 次提交
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由 Fabio Estevam 提交于
Use a better name for the USB PHY clock. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 15 11月, 2012 1 次提交
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由 Wolfram Sang 提交于
Filenames of devictree binding documentation seems to be arbitrary and for me it is unneeded hazzle to find the corresponding documentation for a specific driver. Naming the description the same as the driver is a lot easier and makes sense to me since the driver defines the binding it understands. Also, remove a reference in one source to the binding documentation, since path information easily gets stale. Signed-off-by: NWolfram Sang <wolfram@the-dreams.de> Cc: Rob Herring <robherring2@gmail.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 12 11月, 2012 1 次提交
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由 Shiraz Hashim 提交于
pinctrl subsystem needs gpio chip base to prepare set of gpio pin ranges, which a given pinctrl driver can handle. This is important to handle pinctrl gpio request calls in order to program a given pin properly for gpio operation. As gpio base is allocated dynamically during gpiochip registration, presently there exists no clean way to pass this information to the pinctrl subsystem. After few discussions from [1], it was concluded that may be gpio controller reporting the pin range it supports, is a better way than pinctrl subsystem directly registering it. [1] http://comments.gmane.org/gmane.linux.ports.arm.kernel/184816 Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com> [Edited documentation a bit] Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 11 11月, 2012 1 次提交
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由 Thierry Reding 提交于
The used vendor prefix corresponds to the stock symbol (ONNN) for ON Semiconductor Corp. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NRob Herring <rob.herring@calxeda.com>
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- 26 10月, 2012 1 次提交
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由 Josh Cartwright 提交于
The list of attributes above details the use of the 'filter-ranges' property, but the example improperly used 'filter-latency'. Make these consistent by fixing up the example. Signed-off-by: NJosh Cartwright <josh.cartwright@ni.com> Signed-off-by: NRob Herring <rob.herring@calxeda.com>
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- 25 10月, 2012 2 次提交
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由 Hui Wang 提交于
The irq_to_gpio() is old, most platforms use GENERIC_GPIO framework and don't support this API anymore. The i.MX6q sabrelite platform equips an egalax touchscreen controller, and this platform already transfered to GENERIC_GPIO framework, to support this driver, we use a more generic way to get gpio. Add a return value checking for waking up the controller in the probe function, this guarantee only a workable device can pass init. [dmitry.torokhov@gmail.com: Make driver depend on CONFIG_OF as it is now required.] Acked-by Zhang Jiejing <jiejing.zhang@freescale.com> Reviewed-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NHui Wang <jason77.wang@gmail.com> Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
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由 Josh Wu 提交于
Signed-off-by: NJosh Wu <josh.wu@atmel.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: stable <stable@vger.kernel.org> [v3.4]
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- 18 10月, 2012 1 次提交
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由 Pritesh Raithatha 提交于
change nvidia,slew_rate* to nvidia,slew-rate* Cc: stable@kernel.org Signed-off-by: NPritesh Raithatha <praithatha@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 13 10月, 2012 2 次提交
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This is also include the gpio controller as the IP share both. Each soc will have to describe the SoC limitation and pin configuration via DT. This will allow to do not need to touch the C code when adding new SoC if the IP version is supported. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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On the at91sam9x5 SoC series, GPIO banks B and D only have 19 and 22 pins. So add a property to set this parameter. Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 08 10月, 2012 3 次提交
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由 Marek Vasut 提交于
This patch implements DMA support into mxs-i2c. DMA transfers are now enabled via DT. The DMA operation is enabled by default. Signed-off-by: NMarek Vasut <marex@denx.de> Tested-by: NFabio Estevam <fabio.estevam@freescale.com> [wsa: rebased to 3.6-rc7] Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
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由 Viresh Kumar 提交于
clk_{un}prepare is mandatory for platforms using common clock framework. Since this driver is used by SPEAr platform, which supports common clock framework, add clk_{un}prepare() support for it. Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Viresh Kumar 提交于
This adds simple DT bindings for SDHCI SPEAr controller. It uses cd-gpios from common mmc bindings. This also fixes spear300-evb.dts with correct name for card detect binding. Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 07 10月, 2012 2 次提交
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由 Stephen Warren 提交于
The compatible value shouldn't include ".txt", which was probably cut and paste from the filename. Reported-by: NDomenico Andreoli <cavokz@gmail.com> Signed-off-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Thierry Reding 提交于
The second cell in the PWM specifier denotes the period in nanoseconds, not the duty cycle. The latter can be freely configured at runtime and a PWM with a fixed duty cycle would be rather pointless. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: "Benoît Thébaudeau" <benoit.thebaudeau@advansee.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NShawn Guo <shawn.guo@linaro.org>
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- 06 10月, 2012 2 次提交
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由 Lee Jones 提交于
Here we apply the bindings required for successful Device Tree probing of the i2c-nomadik driver. Signed-off-by: NLee Jones <lee.jones@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NWolfram Sang <w.sang@pengutronix.de>
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由 Shawn Guo 提交于
Add an RTC driver for Freescale Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Reviewed-by: NStephen Boyd <sboyd@codeaurora.org> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 03 10月, 2012 3 次提交
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由 Thomas Abraham 提交于
Add device tree based discovery support for Samsung's sdhci controller. Cc: Ben Dooks <ben-linux@fluff.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org> Reviewed-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Thomas Abraham 提交于
Samsung Exynos SoC's extend the dw-mshc controller for additional clock and bus control. Add support for these extensions and include provide device tree based discovery suppory as well. Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Thomas Abraham 提交于
Add device tree based discovery support. Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 02 10月, 2012 4 次提交
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由 Haojian Zhuang 提交于
Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
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由 Rob Herring 提交于
Some highbank DMA masters can support coherent (ACP) or non-coherent DMA. This sets up dma_map_ops for masters which are configured for coherent DMA. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
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由 David S. Miller 提交于
This reverts commit d7559982. It wasn't meant to be applied, commit 342b7b74 ("net: ti cpsw ethernet: set IFCTL_A bit in MACCONTROL") was redone in such a way to make this commit unnecessary. Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Daniel Mack 提交于
Allow users to specify the phy interface of the CPSW slaves. The new node parameter is called "phy_if_mode" and is optional. The original behaviour of the driver is preserved when not given. Signed-off-by: NDaniel Mack <zonque@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: David S. Miller <davem@davemloft.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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