If the write protect pad of the controller is not connected to the write
protect pin of the slot, the driver should be notified of this condition
so that incorrect check for write protection by reading the WRTORT
register can avoided. The get_ro platform callback can be used for in
such cases, but with device tree support enabled, such platform callbacks
cannot be supported.

Add a new quirk for notifying the driver about the missing write protect
line so the driver can assume that the card write protection is disabled.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Some platforms allow for clock gating and control of bus interface unit
clock and card interface unit clock. Add support for clock lookup of
optional biu and ciu clocks for clock gating and clock speed
determination.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Instead of aborting the probe when a slot initialization fails, allow
initialization of as many slots as possible. If there is at least one
instance of a slot that is successfully initialized, allow the driver
probe to succeed.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

The 'struct dw_mci' maintains a copy of the pdev->dev instance instead of
maintaining a reference to that 'struct device' instance. Any resource
allocated using the device resource management kernel API with the instance
of 'struct device' in 'struct dw_mci' is then incorrect. Fix this by
converting the copy of 'struct device' in 'struct dw_mci' to a reference.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Fixed the below message.

WARNING: drivers/mmc/host/built-in.o(.text+0x5ee8): Section mismatch in reference from the function dw_mci_probe() to the function .init.text:dw_mci_init_slot()
The function dw_mci_probe() references
the function __init dw_mci_init_slot().
This is often because dw_mci_probe lacks a __init
annotation or the annotation of dw_mci_init_slot is wrong
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

The documentation for the dw_mmc part says that the low power
mode should normally only be set for MMC and SD memory and should
be turned off for SDIO cards that need interrupts detected.

The best place I could find to do this is when the SDIO interrupt
was first enabled.  I rely on the fact that dw_mci_setup_bus()
will be called when it's time to reenable.
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Acked-by: NSeungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Data transfer will be continued until all the bytes are transmitted,
even if data crc error occurs during a multiple-block data transfer.
This means RXDR/TXDR interrupts will occurs until data transfer is
terminated. Early setting of host->sg to NULL prevents going into
xxx_data_pio functions, hence permanent unhandled RXDR/TXDR interrupts
occurs. And checking error interrupt status in the xxx_data_pio functions
is no need because dw_mci_interrupt does do the same. This patch also
removes it.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Datasheet of SYNOPSYS mentions that DTO(Data Transfer Over) interrupt
will be raised even if some error interrupts, however it is actually
found that DTO does not occur. SYNOPSYS has confirmed this issue.
Current implementation defers the call of tasklet_schedule until DTO
when the error interrupts is happened. This patch fixes error handling.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

RINTSTS status includes masked interrupts as well as unmasked.
data_status and cmd_status are set by value of RINTSTS in interrupt handler
and tasklet finally uses it to decide whether error is happened or not.
In addition, MINTSTS status is used for setting data_status in PIO.
Masked error interrupt will not be handled and that status can be considered
non-error case.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Reviewed By: Girish K S <girish.shivananjappa@linaro.org>
Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

host->dma_ops is not valid if host->usa dma is 0 so protect
host->dma_ops reference in dw_mci_resume
Signed-off-by: NJonathan Kliegman <kliegs@chromium.org>
Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

In the current dwmmc driver there is support for selecting IDMAC from
the menu config option. If the support for IDMAC is enabled in the menu
config and the hardware configuration register's DMA_INTERFACE field is
0, the driver will still try to do the DMA initialization.

The dw_mci_idmac_init function currently implemented returns only success
indicating that the DMA initialization is always successful. This patch
adds a check for existence of the DMA IP to allow the DMA initialization.
Signed-off-by: NGirish K S <girish.shivananjappa@linaro.org>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

In case of "host->bus_hz < slot->clock", divider value is
miscalculated. And clock divider register value is multiple of 2. If
calculated divider value is odd number, result can be over-clocking.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Acked-by: NWill Newton <will.newton@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Setting host->data to NULL is incorrect sequence in
dw_mci_command_complete. This early setting makes the skip of
dma_unmap_sg in dw_mci_dma_cleanup.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Acked-by: NWill Newton <will.newton@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

IDMAC may not be cleaned in driver probe if it has been already used in
boot time. So IDMAC needs sw reset newly. And DMA interface reset
precedes the internal DMAC reset. Additionally SDMMC_IDMAC_SWRESET is
replaced with magic code.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Acked-by: NWill Newton <will.newton@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

DTO interrupt can be later than transmit interrupt(IDMAC) in case of
write. Current handling of IDMAC interrupt sets EVENT_DATA_COMPLETE as
well as EVENT_XFER_COMPLETE regardless of DTO rising. This makes the
current request finish in tasklet and permits the next request even
though current data transfer is still in progress. As a result, sequence
is broken and lock-up happens. Setting EVENT_DATA_COMPLETE is not proper
after IDMAC interrupt. It should be taken after DTO interrupt is
generated.
Reported-by: NDmitry Shmidt <dimitrysh@android.com>
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: NHyeonsu Kim <hyeonsu.kim@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

The sdio interrupt mask bits are arranged in [31:16].
(1 << SDMMC_INT_SDIO(slot->id))) does 16 bits left shift twice.
So this patch changes to do 16 bits left shift only one time.
Signed-off-by: NKyoungil Kim <ki0351.kim@samsung.com>
Acked-by: NShashidhar Hiremath <shashidharh@vayavyalabs.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

The variable 'dw_mci_card_workqueue' is a global variable shared between
multiple instances of the dw_mmc host controller. Due to this, data
corruption has been noticed when multiple instances of dw_mmc controllers
are actively reading/writing the media. Fix this by adding a instance
of 'struct workqueue_struct' for each host instance and removing the
global 'dw_mci_card_workqueue' instance.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Now, dma_ops is assumed that use the IDMAC.  But if dma_ops is assigned
the pdata->dma_ops, we didn't ensure that callback function is defined.

If the callback isn't defined, then we should run in PIO mode.
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

When dw_mci_pre_dma_transfer returns failure in some reasons,
dw_mci_submit_data will prepare to switch the PIO mode from DMA.
After switching to PIO mode, DMA(IDMAC in particular) is still
enabled. This makes the corruption in handling interrupt and
the driver lock-up.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

3ec7699d3bb1b0ee7 ("mmc: dw_mmc: Add support for pre_req and post_req")
broke non-IDMAC DMA, because dw_mci_pre_dma_transfer() is valid only if
using internal DMA. In case of using other DMA it returns -ENOSYS. It
prevents the DMA operations.  This patch makes dw_mci_pre_dma_transfer()
effective in all DMA cases again.
Reported-by: NJames Hogan <james@albanarts.com>
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Reviewed-by: NNamjae Jeon <linkinjeon@gmail.com>
Acked-by: NJames Hogan <james.hogan@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

When disable CONFIG_MMC_DW_IDMAC, can see the compiler error.
Because in dw_mci_post_req(), called the dw_mci_get_dma_dir().
But that function is in #ifdef CONFIG_MMC_DW_IDMAC.

I think that function is generic function.
Not need the CONFIG_MMC_DW_IDMAC.
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Acked-by: NSeungwon Jeon <tgih.jun@samsung.com>
Acked-by: NJames Hogan <james.hogan@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

In CLKENA register, can support 16-SD card clocks.
If support correctly, must shift with slot-id.
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

This patch implements pre_req and post_req in dw_mmc to support
asynchronous mmc request.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Acked-by: NJaehoon Chung <jh80.chung@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

When use the IDMAC, we can also want to use the pdata->blk-setting.
So if pdata->blk-setting is unset, use the default value.
if not, use the pdata->blk-setting.
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Support of PCI mode for the dw_mmc driver. This Patch adds the
support for the scenario where the Synopsys Designware IP
is present on the PCI bus. The patch adds the minimal modifications
necessary for the driver to work on PCI platform. Also added separate
files for PCI and PLATFORM modes of operation.
Signed-off-by: NShashidhar Hiremath <shashidharh@vayavyalabs.com>
Acked-by: NJames Hogan <james.hogan@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

This patch adds the capability of power off notify for dw-mmc controller.
In order to use Girish's patch:
mmc: core: Add Power Off Notify Feature eMMC 4.5
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Current PIO mode makes a kernel crash with CONFIG_HIGHMEM.
Highmem pages have a NULL from sg_virt(sg).
This patch fixes the following problem.

Unable to handle kernel NULL pointer dereference at virtual address 00000000
pgd = c0004000
[00000000] *pgd=00000000
Internal error: Oops: 817 [#1] PREEMPT SMP
Modules linked in:
CPU: 0    Not tainted  (3.0.15-01423-gdbf465f #589)
PC is at dw_mci_pull_data32+0x4c/0x9c
LR is at dw_mci_read_data_pio+0x54/0x1f0
pc : [<c0358824>]    lr : [<c035988c>]    psr: 20000193
sp : c0619d48  ip : c0619d70  fp : c0619d6c
r10: 00000000  r9 : 00000002  r8 : 00001000
r7 : 00000200  r6 : 00000000  r5 : e1dd3100  r4 : 00000000
r3 : 65622023  r2 : 0000007f  r1 : eeb96000  r0 : e1dd3100
Flags: nzCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment
xkernel
Control: 10c5387d  Table: 61e2004a  DAC: 00000015
Process swapper (pid: 0, stack limit = 0xc06182f0)
Stack: (0xc0619d48 to 0xc061a000)
9d40:                   e1dd3100 e1a4f000 00000000 e1dd3100 e1a4f000 00000200
9d60: c0619da4 c0619d70 c035988c c03587e4 c0619d9c e18158f4 e1dd3100 e1dd3100
9d80: 00000020 00000000 00000000 00000020 c06e8a84 00000000 c0619e04 c0619da8
9da0: c0359b24 c0359844 e18158f4 e1dd3164 e1dd3168 e1dd3150 3d02fc79 e1dd3154
9dc0: e1dd3178 00000000 00000020 00000000 e1dd3150 00000000 c10dd7e8 e1a84900
9de0: c061e7cc 00000000 00000000 0000008d c06e8a84 c061e780 c0619e4c c0619e08
9e00: c00c4738 c0359a34 3d02fc79 00000000 c0619e4c c05a1698 c05a1670 c05a165c
9e20: c04de8b0 c061e780 c061e7cc e1a84900 ffffed68 0000008d c0618000 00000000
9e40: c0619e6c c0619e50 c00c48b4 c00c46c8 c061e780 c00423ac c061e7cc ffffed68
9e60: c0619e8c c0619e70 c00c7358 c00c487c 0000008d ffffee38 c0618000 ffffed68
9e80: c0619ea4 c0619e90 c00c4258 c00c72b0 c00423ac ffffee38 c0619ecc c0619ea8
9ea0: c004241c c00c4234 ffffffff f8810000 0000006d 00000002 00000001 7fffffff
9ec0: c0619f44 c0619ed0 c0048bc0 c00423c4 220ae7a9 00000000 386f0d30 0005d3a4
9ee0: c00423ac c10dd0b8 c06f2cd8 c0618000 c0594778 c003a674 7fffffff c0619f44
9f00: 386f0d30 c0619f18 c00a6f94 c005be3c 80000013 ffffffff 386f0d30 0005d3a4
9f20: 386f0d30 0005d2d1 c10dd0a8 c10dd0b8 c06f2cd8 c0618000 c0619f74 c0619f48
9f40: c0345858 c005be00 c00a2440 c0618000 c0618000 c00410d8 c06c1944 c00410fc
9f60: c0594778 c003a674 c0619f9c c0619f78 c004a7e8 c03457b4 c0618000 c06c18f8
9f80: 00000000 c0039c70 c06c18d4 c003a674 c0619fb4 c0619fa0 c04ceafc c004a714
9fa0: c06287b4 c06c18f8 c0619ff4 c0619fb8 c0008b68 c04cea68 c0008578 00000000
9fc0: 00000000 c003a674 00000000 10c5387d c0628658 c003aa78 c062f1c4 4000406a
9fe0: 413fc090 00000000 00000000 c0619ff8 40008044 c0008858 00000000 00000000
Backtrace:
[<c03587d8>] (dw_mci_pull_data32+0x0/0x9c) from [<c035988c>] (dw_mci_read_data_pio+0x54/0x1f0)
 r6:00000200 r5:e1a4f000 r4:e1dd3100
 [<c0359838>] (dw_mci_read_data_pio+0x0/0x1f0) from [<c0359b24>] (dw_mci_interrupt+0xfc/0x4a4)
[<c0359a28>] (dw_mci_interrupt+0x0/0x4a4) from [<c00c4738>] (handle_irq_event_percpu+0x7c/0x1b4)
[<c00c46bc>] (handle_irq_event_percpu+0x0/0x1b4) from [<c00c48b4>] (handle_irq_event+0x44/0x64)
[<c00c4870>] (handle_irq_event+0x0/0x64) from [<c00c7358>] (handle_fasteoi_irq+0xb4/0x124)
 r7:ffffed68 r6:c061e7cc r5:c00423ac r4:c061e780
 [<c00c72a4>] (handle_fasteoi_irq+0x0/0x124) from [<c00c4258>] (generic_handle_irq+0x30/0x38)
 r7:ffffed68 r6:c0618000 r5:ffffee38 r4:0000008d
 [<c00c4228>] (generic_handle_irq+0x0/0x38) from [<c004241c>] (asm_do_IRQ+0x64/0xe0)
 r5:ffffee38 r4:c00423ac
 [<c00423b8>] (asm_do_IRQ+0x0/0xe0) from [<c0048bc0>] (__irq_svc+0x80/0x14c)
Exception stack(0xc0619ed0 to 0xc0619f18)
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

In FIFOTH register, the RX_WMark field (bits[27:16]) defaults to
FIFO_DEPTH - 1. When reading it, bits[26:16] were being used, so
fix it to use the mask 0xfff instead of 0x7ff.
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: NJames Hogan <james.hogan@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

UHS_REG should be cleared for non-DDR mode. But currently there is
no way to clear DDR mode, if it is already set once. This patch adds
clearing DDR mode for non-DDR mode.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

This patch adds the support for predefined multiple block r/w.
dw_mmc can support MMC_CAP_CMD23 capability.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Signed-off-by: NChris Ball <cjb@laptop.org>

This patch adds another capabilities field for MMC_CAPS2_XXX.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

This patch modifies dw_mmc to use dev_pm_ops.
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Acked-by: NJames Hogan <james.hogan@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

In dw_mmc 2.40a spec, Data register's offset is changed.
Before we used Data register offset 0x100. but if somebody uses a
2.40a controller, we must use 0x200 for Data register.

This patch adds a version-id checking point and uses SDMMC_DATA(x)
instead of SDMMC_DATA.  It assumes 2.40a is the latest version.
Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Acked-by: NJames Hogan <james.hogan@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

All the files using printk function for displaying kernel messages
in the mmc driver have been replaced with corresponding macro.
Signed-off-by: NGirish K S <girish.shivananjappa@linaro.org>
Signed-off-by: NChris Ball <cjb@laptop.org>

The Patch adds the support for SDIO interrupts for all slots.
It includes enabling of SDIO interrupts through dw_mci_enable_sdio_irq
and the handling of the slot specific interrupts in the Interrupt Service
Routine.
Signed-off-by: NShashidhar Hiremath <shashidharh@vayavyalabs.com>
Acked-by: NJames Hogan <james.hogan@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Host driver can't get a hint of DDR mode through ios->ddr flag anymore.
ios->timing is currently used to inform DDR mode as a substitute.
And capability of MMC_CAP_MMC_HIGHSPEED is added for DDR support.
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

The mask used inside this macro was assuming Buffer_Size1's [BS1's]
width to be 14 bits, it is actually 13 bits.  Modify masks used in
IDMAC_SET_BUFFER1_SIZE such that they use only 13 bits instead of
current 14.
Signed-off-by: NShashidhar Hiremath <shashidharh@vayavyalabs.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

If an error occurs mid way through a transaction (such as a missing CRC
status response after the 2nd block written out of 3), then the FIFO may
still contain data which will interfere with the next transaction.
Therefore after an error has been detected, reset the fifo using the
CTRL register.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Tested-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

When a data write isn't acknowledged by the card (so no CRC status token
is detected after the data), the error -EIO is returned instead of the
-ETIMEDOUT expected by mmc_test 15 - "Correct xfer_size at write (start
failure)" and 17 "Correct xfer_size at write (midway failure)". In PIO
mode the reported number of bytes transferred is also exaggerated since
the last block actually failed.

Handle the "Write no CRC" error specially, setting the error to
-ETIMEDOUT and setting the bytes_xferred to 0.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Tested-by: NJaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: NChris Ball <cjb@laptop.org>