1. 09 5月, 2014 1 次提交
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    • V
      gpio: rcar: Fix level interrupt handling · 8808b64d
      Valentine Barshak 提交于
      According to the manual, if a port is set for level detection using
      the corresponding bit in the edge/level select register and an external
      level interrupt signal is asserted, the corresponding bit in INTDT
      does not use the FF to hold the input.
      Thus, writing 1 to the corresponding bits in INTCLR cannot clear the
      corresponding bits in the INTDT register. Instead, when an external
      input signal is stopped, the corresponding bit in INTDT is cleared
      automatically.
      
      Since the INTDT bit cannot be cleared for the level interrupts until
      the interrupt signal is stopped, we end up with the infinite loop
      when using deferred (threaded) IRQ handling.
      
      Since a deferred interrupt is disabled by the low-level handler and
      re-enabled only when the deferred handler is completed, Fix the issue
      by dropping disabled interrupts from the pending mask as suggested by
      Laurent Pinchart <laurent.pinchart@ideasonboard.com>
      
      Changes in V2:
      * Drop disabled interrupts from pending mask altogether instead of
        dropping level interrupts one by one once they get handled.
      Signed-off-by: NValentine Barshak <valentine.barshak@cogentembedded.com>
      Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
      Acked-by: NMagnus Damm <damm@opensource.se>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      8808b64d
  5. 03 12月, 2013 1 次提交
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  14. 03 4月, 2013 2 次提交