- 06 10月, 2011 4 次提交
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由 Borislav Petkov 提交于
Drop third nbcfg argument which is old remains and not required anymore. No functionality change. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
MCE decoding code is reporting the core which encountered the error unconditionally now so drop this piece. Besides, it reported the coreid in the local processor package which is not that valuable as a datapoint. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
The MCi_STATUS bank has a AddrV bit which, when set, denotes that the corresponding MCi_ADDR MSR contains a valid address belonging to the MCE currently being reported. Dump it since it is definitely relevant information. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
Currently, correctable ECCs go through mcelog and do not print the scary MCE banner. In that case, however, reporting the core where the CECC happened is important information so dump it along with the decoded string albeit at risk of having a minor redundancy. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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- 19 8月, 2011 1 次提交
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由 Mathias Krause 提交于
Based on a patch from the PaX Team, found during a clang analysis pass. Signed-off-by: NMathias Krause <minipli@googlemail.com> Acked-by: NMauro Carvalho Chehab <mchehab@redhat.com> Cc: PaX Team <pageexec@freemail.hu> Cc: stable@kernel.org [v2.6.35+] Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 11 8月, 2011 2 次提交
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由 Linus Torvalds 提交于
This reverts commit af9d220b. It turns out that one was meant to be applied on top of the edac.git tree in -next that has more i7core_edac changes, but that wasn't clear in the original email. Reported-by: NStephen Rothwell <sfr@canb.auug.org.au> Acked-by: NBorislav Petkov <borislav.petkov@amd.com> Cc: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Borislav Petkov 提交于
Both AMD and Intel i7 EDAC drivers use MCE features and are thus dependent of this functionality present in the kernel. Express this in Kconfig so that randconfig builds don't break. Reported-by: NRandy Dunlap <rdunlap@xenotime.net> Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com> Acked-by: NRandy Dunlap <rdunlap@xenotime.net> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 27 7月, 2011 2 次提交
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由 Arun Sharma 提交于
This allows us to move duplicated code in <asm/atomic.h> (atomic_inc_not_zero() for now) to <linux/atomic.h> Signed-off-by: NArun Sharma <asharma@fb.com> Reviewed-by: NEric Dumazet <eric.dumazet@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: David Miller <davem@davemloft.net> Cc: Eric Dumazet <eric.dumazet@gmail.com> Acked-by: NMike Frysinger <vapier@gentoo.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Kai.Jiang 提交于
Parameter offset_in_page in edac_mc_handle_ce() should mask the higher bits above the page size, not the lower bits. The original input sometimes causes a crash. Signed-off-by: NKai.Jiang <Kai.Jiang@freescale.com> Signed-off-by: NShaohui Xie <Shaohui.Xie@freescale.com> Cc: Anton Vorontsov <avorontsov@mvista.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: "David S. Miller" <davem@davemloft.net> Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 10 6月, 2011 1 次提交
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由 Joe Perches 提交于
Several fixes as well where the +1 was missing. Done via coccinelle scripts like: @@ struct resource *ptr; @@ - ptr->end - ptr->start + 1 + resource_size(ptr) and some grep and typing. Mostly uncompiled, no cross-compilers. Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 27 5月, 2011 1 次提交
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由 Lai Jiangshan 提交于
synchronize_rcu() does the stuff as needed. Signed-off-by: NLai Jiangshan <laijs@cn.fujitsu.com> Cc: Doug Thompson <dougthompson@xmission.com> Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> Cc: Mauro Carvalho Chehab <mchehab@infradead.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 25 5月, 2011 1 次提交
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由 Roland Dreier 提交于
The presense of a writeq() implementation on 32-bit x86 that splits the 64-bit write into two 32-bit writes turns out to break the mpt2sas driver (and in general is risky for drivers as was discussed in <http://lkml.kernel.org/r/adaab6c1h7c.fsf@cisco.com>). To fix this, revert 2c5643b1 ("x86: provide readq()/writeq() on 32-bit too") and follow-on cleanups. This unfortunately leads to pushing non-atomic definitions of readq() and write() to various x86-only drivers that in the meantime started using the definitions in the x86 version of <asm/io.h>. However as discussed exhaustively, this is actually the right thing to do, because the right way to split a 64-bit transaction is hardware dependent and therefore belongs in the hardware driver (eg mpt2sas needs a spinlock to make sure no other accesses occur in between the two halves of the access). Build tested on 32- and 64-bit x86 allmodconfig. Link: http://lkml.kernel.org/r/x86-32-writeq-is-broken@mdm.bga.comAcked-by: NHitoshi Mitake <h.mitake@gmail.com> Cc: Kashyap Desai <Kashyap.Desai@lsi.com> Cc: Len Brown <lenb@kernel.org> Cc: Ravi Anand <ravi.anand@qlogic.com> Cc: Vikas Chaudhary <vikas.chaudhary@qlogic.com> Cc: Matthew Garrett <mjg@redhat.com> Cc: Jason Uhlenkott <juhlenko@akamai.com> Acked-by: NJames Bottomley <James.Bottomley@parallels.com> Acked-by: NIngo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: NRoland Dreier <roland@purestorage.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 19 5月, 2011 1 次提交
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由 Grant Likely 提交于
Commit b826291c, "drivercore/dt: add a match table pointer to struct device" added an of_match pointer to struct device to cache the of_match_table entry discovered at driver match time. This was unsafe because matching is not an atomic operation with probing a driver. If two or more drivers are attempted to be matched to a driver at the same time, then the cached matching entry pointer could get overwritten. This patch reverts the of_match cache pointer and reworks all users to call of_match_device() directly instead. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 26 4月, 2011 3 次提交
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由 Borislav Petkov 提交于
F15h CPUs may report a non-DRAM address when reporting an error address belonging to a CC6 state save area. Add a workaround to detect this condition and compute the actual DRAM address of the error as documented in the Revision Guide for AMD Family 15h Models 00h-0Fh Processors. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
F15h and later use a portion of DRAM as a CC6 storage area. BIOS programs D18F1x[17C:140,7C:40] DRAM Base/Limit accordingly by subtracting the storage area from the DRAM limit setting. However, in order for edac to consider that part of DRAM too, we need to include it into the per-node range. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
This warning was wrongfully added for a normal condition - intlvsel actually selects the destination node when node interleaving is enabled and it is not a mismatch. For a detailed example, see section 2.8.10.2 "Node Interleaving" in F10h BKDG. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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- 21 4月, 2011 1 次提交
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由 Markus Trippelsdorf 提交于
This patch removes superfluous debugging output in the sysfs scrub rate handler. It also consolidates the error handling in the scrub rate accessors. Signed-off-by: NMarkus Trippelsdorf <markus@trippelsdorf.de> Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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- 19 4月, 2011 1 次提交
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由 Michal Marek 提交于
The kernel already prints its build timestamp during boot, no need to repeat it in random drivers and produce different object files each time. Cc: Doug Thompson <dougthompson@xmission.com> Cc: bluesmoke-devel@lists.sourceforge.net Cc: linux-edac@vger.kernel.org Acked-by: NMauro Carvalho Chehab <mchehab@redhat.com> Signed-off-by: NMichal Marek <mmarek@suse.cz>
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- 04 4月, 2011 1 次提交
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由 Kumar Gala 提交于
Only the e500v1/v2 cores have HID1[RXFE] so we should attempt to set or clear this register bit on them. Otherwise we get crashes like: NIP: c0579f84 LR: c006d550 CTR: c0579f84 REGS: ef857ec0 TRAP: 0700 Not tainted (2.6.38.2-00072-gf15ba3c) MSR: 00021002 <ME,CE> CR: 22044022 XER: 00000000 TASK = ef8559c0[1] 'swapper' THREAD: ef856000 CPU: 0 GPR00: c006d538 ef857f70 ef8559c0 00000000 00000004 00000000 00000000 00000000 GPR08: c0590000 c30170a8 00000000 c30170a8 00000001 0fffe000 00000000 00000000 GPR16: 00000000 7ffa0e60 00000000 00000000 7ffb0bd8 7ff3b844 c05be000 00000000 GPR24: 00000000 00000000 c05c28b0 c0579fac 00000000 00029002 00000000 c0579f84 NIP [c0579f84] mpc85xx_mc_clear_rfxe+0x0/0x28 LR [c006d550] on_each_cpu+0x34/0x50 Call Trace: [ef857f70] [c006d538] on_each_cpu+0x1c/0x50 (unreliable) [ef857f90] [c057a070] mpc85xx_mc_init+0xc4/0xdc [ef857fa0] [c0001cd4] do_one_initcall+0x34/0x1a8 [ef857fd0] [c055d9d8] kernel_init+0x17c/0x218 [ef857ff0] [c000cda4] kernel_thread+0x4c/0x68 Instruction dump: 40be0018 3c60c052 3863c70c 4be9baad 3be0ffed 4bd7c99d 80010014 7fe3fb78 83e1000c 38210010 7c0803a6 4e800020 <7c11faa6> 54290024 81290008 3d60c06e Oops: Exception in kernel mode, sig: 4 [#2] ---[ end trace 49ff3b8f93efde1a ]--- Also use the HID1_RFXE define rather than a magic number. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 31 3月, 2011 1 次提交
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由 Lucas De Marchi 提交于
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>
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- 30 3月, 2011 1 次提交
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由 Borislav Petkov 提交于
We check the pointers together but at least one of them could be invalid due to failed allocation. Since we cannot continue if either of the two allocations has failed, exit early by freeing them both. Cc: <stable@kernel.org> # 38.x Reported-by: NMauro Carvalho Chehab <mchehab@redhat.com> Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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- 17 3月, 2011 19 次提交
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由 Borislav Petkov 提交于
Those should all be unsigned. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
Fix amd64_debug_display_dimm_sizes() arguments order per convention (pvt is always first). Also, the now second arg denotes the DCT so adjust its type. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
The dram ranges make sense only as an unsigned type. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
Use the macro directly instead Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
Adjust argument types to the PCI config API's types. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
Return unsigned u8 values only. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
A node id can never be negative since we use it as an index into the DRAM ranges array. This also makes one of the BUG_ON conditions redundant. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
Those were moved to the mce_amd.h header. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
Add the PCI device ids required for driver registration. Remove pvt->ctl_name and use the family descriptor directly, instead. Then, bump driver version and fixup its format. Finally, enable DRAM ECC decoding on F15h. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
F15h has the same ECC symbol size options as F10h revD and later so adjust checks to that. Simplify code a bit. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
Drop per-instance variable and compute min scrubrate dynamically. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
Drop static tables which map the bits in F2x80 to a chip select size in favor of functions doing the mapping with some bit fiddling. Also, add F15 support. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
This function is relevant for F10h and higher, and it has only one callsite so drop its function pointer from the low_ops struct. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
F15h sys_addr to chip select mapping is almost identical to F10h's so reuse that. Rename functions on that path accordingly. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
Add paranoid checks for the sys address before going off and decoding it. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
Replace per-DCT macros with smarter ones, drop hack and look for the spare rank on all chip selects on a channel. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
Remove the channel interleave select bit properly. See F2x110[DctSelIntLvAddr] for details. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
When node interleaving is enabled, a subset of the addr[14:12] bits has to be removed in order to get the normalized DCT address of the DRAM channel. The actual number of bits to remove is determined by F1x[1, 0][7C:40][IntlvEn]. Do this correctly. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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由 Borislav Petkov 提交于
On revC3 and revE Fam10h machines and later, non-interleaved graphics framebuffer memory under the 16G mark can be swapped with a region located at the bottom of memory so that the GPU can use the interleaved region and thus two channels. Add support for that. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com>
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