- 22 8月, 2011 1 次提交
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由 Nicolas Pitre 提交于
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: NArnd Bergmann <arnd@arndb.de>
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- 22 7月, 2011 1 次提交
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由 Ralf Baechle 提交于
Aside of the usual motivation for constification, this function has a history of being abused a hook for interrupt and other fixups so I turned this function const ages ago in the MIPS code but it should be done treewide. Due to function pointer passing in varous places a few other functions had to be constified as well. Signed-off-by: NRalf Baechle <ralf@linux-mips.org> To: Anton Vorontsov <avorontsov@mvista.com> To: Chris Metcalf <cmetcalf@tilera.com> To: Colin Cross <ccross@android.com> Acked-by: N"David S. Miller" <davem@davemloft.net> To: Eric Miao <eric.y.miao@gmail.com> To: Erik Gilling <konkers@android.com> Acked-by: NGuan Xuetao <gxt@mprc.pku.edu.cn> To: "H. Peter Anvin" <hpa@zytor.com> To: Imre Kaloz <kaloz@openwrt.org> To: Ingo Molnar <mingo@redhat.com> To: Ivan Kokshaysky <ink@jurassic.park.msu.ru> To: Jesse Barnes <jbarnes@virtuousgeek.org> To: Krzysztof Halasa <khc@pm.waw.pl> To: Lennert Buytenhek <kernel@wantstofly.org> To: Matt Turner <mattst88@gmail.com> To: Nicolas Pitre <nico@fluxnic.net> To: Olof Johansson <olof@lixom.net> Acked-by: NPaul Mundt <lethal@linux-sh.org> To: Richard Henderson <rth@twiddle.net> To: Russell King <linux@arm.linux.org.uk> To: Thomas Gleixner <tglx@linutronix.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: linux-alpha@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-pci@vger.kernel.org Cc: linux-sh@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: sparclinux@vger.kernel.org Cc: x86@kernel.org Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 13 7月, 2011 3 次提交
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由 Rob Herring 提交于
Convert the incorrectly named PCIMEM_BASE to a variable called vga_base. This removes the dependency on mach/hardware.h. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: NArnd Bergmann <arnd@arndb.de>
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由 Rob Herring 提交于
Convert PCIBIOS_MIN_IO and PCIBIOS_MIN_MEM to variables to allow multi-platform builds. This also removes the requirement for a platform to have a mach/hardware.h. The default values for i/o and mem are 0x1000 and 0x01000000, respectively. Per Arnd Bergmann, other values are likely to be incorrect, but this commit does not try to address that issue. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: NArnd Bergmann <arnd@arndb.de>
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由 Rob Herring 提交于
Convert pcibios_assign_all_busses from a define to inline so platforms can control this setting. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: NArnd Bergmann <arnd@arndb.de>
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- 10 6月, 2011 1 次提交
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由 Joe Perches 提交于
Several fixes as well where the +1 was missing. Done via coccinelle scripts like: @@ struct resource *ptr; @@ - ptr->end - ptr->start + 1 + resource_size(ptr) and some grep and typing. Mostly uncompiled, no cross-compilers. Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 17 5月, 2011 7 次提交
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由 Andrew Lunn 提交于
mv78xx0 and kirkwood use identical mpp code. It should also be possible to rewrite the orion5x mpp to use this platform code. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Changing eg 0xffffffff to DMA_BIT_MASK(32) etc allows easier side by side comparision of identical code which can be consolidated. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 29 3月, 2011 1 次提交
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由 Thomas Gleixner 提交于
Convert to the new function names. Automated with coccinelle. Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 04 3月, 2011 2 次提交
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由 Lennert Buytenhek 提交于
This patch makes the various mach dirs that use the plat-orion GPIO code pass in GPIO-related platform info (GPIO controller base address, secondary base IRQ number, etc) explicitly, instead of having plat-orion get those values by including a mach dir include file -- the latter mechanism is problematic if you want to support multiple ARM platforms in the same kernel image. Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Lennert Buytenhek 提交于
This patch makes the various mach dirs that use the plat-orion time code pass in timer and bridge addresses explicitly, instead of having plat-orion get those values by including a mach dir include file -- the latter mechanism is problematic if you want to support multiple ARM platforms in the same kernel image. Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 18 2月, 2011 1 次提交
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由 Russell King 提交于
This uncouple PHYS_OFFSET from the platform definitions, thereby facilitating run-time computation of the physical memory offset. Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NMagnus Damm <damm@opensource.se> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NWan ZongShun <mcuos.com@gmail.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Acked-by: NEric Miao <eric.y.miao@gmail.com> Acked-by: NJiandong Zheng <jdzheng@broadcom.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 29 11月, 2010 1 次提交
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由 Evgeniy Dushistov 提交于
The constant DDR_WINDOW_CPU1_BASE has wrong value. Because of that mv78xx0_mbus_dram_info is not filled properly on start, and in its turn drivers, that used mv78xx0_mbus_dram_info, in my case mv643xx_eth.c, not work on second core. According to MV76100, MV78100, and MV78200 DiscoveryTM Innovation Series CPU Family Functional Specifications address should be 0x1570. Signed-off-by: NEvgeniy Dushistov <dushistov@mail.ru> Acked-by: NLennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 06 11月, 2010 1 次提交
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由 Mike Rapoport 提交于
Wrong MPP configuration would cause <cpu>_mpp_conf loop infinitely because the mpp list iterator would not be incremented. Signed-off-by: NMike Rapoport <mike@compulab.co.il> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 20 10月, 2010 2 次提交
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由 Nicolas Pitre 提交于
Since we're now using addruart to establish the debug mapping, we can remove the io_pg_offst and phys_io members of struct machine_desc. The various declarations were removed using the following script: grep -rl MACHINE_START arch/arm | xargs \ sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }' [ Initial patch was from Jeremy Kerr, example script from Russell King ] Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Eric Miao <eric.miao at canonical.com>
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由 Jeremy Kerr 提交于
Rather than checking the MMU status in every instance of addruart, do it once in kernel/debug.S, and change the existing addruart macros to return both physical and virtual addresses. The main debug code can then select the appropriate address to use. This will also allow us to retreive the address of a uart for the MMU state that we're not current in. Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com> and Tony Lindgren <tony@atomide.com>, and fix for versatile express from Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>. Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: NJason Wang <jason77.wang@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Tested-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 24 2月, 2010 2 次提交
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由 Sebastien Requiem 提交于
* Modification of Kconfig to add the Option * 1 new file : buffalo-wxl-setup.c This file is inspired from the db-78xx0-setup.c already present. The following is done: - Configure MPP Lines for the plateform (see my patch for MPP) This is taken from the stock kernel provided by buffalotech (the vendor) - GigaBit Ethernet - Sata - Uart are initiallized in a different way than on the dev board as we have one core only. - USB The kernel has been running for some days now on my plateform. Signed-off-by: NSebastien Requiem <sebastien@kolios.dk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Sebastien Requiem 提交于
This patch is composed of two new files : - mpp.c which is mainly inspired by the same file as in mach-kirkwood - mpp.h that is written from the documentation provided by Marvell http://www.marvell.com/products/processors/embedded/discovery_innovation/HW_MV78100_OpenSource.pdf Moreover, due to some implementation problem, I have defined some MPPX_UNUSED that offer developers the possibility to SET MPP to some unused value (such as for Buffalo WXL). Note: This patch doesn't support MV78200 yet (only 78100 MPP lines have been written) Signed-off-by: NSebastien Requiem <sebastien@kolios.dk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 16 2月, 2010 1 次提交
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由 Fenkart/Bostandzhyan 提交于
Makes it consistent with VMALLOC_START Tested-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NAndreas Fenkart <andreas.fenkart@streamunlimited.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 13 2月, 2010 1 次提交
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由 Tony Lindgren 提交于
Otherwise more complicated uart configuration won't be possible. We can use r1 for tmp register for both head.S and debug.S. NOTE: This patch depends on another patch to add the the tmp register into all debug-macro.S files. That can be done with: $ sed -i -e "s/addruart,rx|addruart, rx/addruart, rx, tmp/" arch/arm/*/include/*/debug-macro.S Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 06 11月, 2009 1 次提交
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由 Lennert Buytenhek 提交于
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 09 6月, 2009 1 次提交
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由 Erik Benada 提交于
Signed-off-by: NErik Benada <erikbenada@yahoo.ca> [ nico: fix locking, additional cleanups ] Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 23 5月, 2009 1 次提交
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由 Nicolas Pitre 提交于
Since commit eb0519b5, mv643xx_eth is non functional on ARM because the platform device declaration does not include any coherent DMA mask and coherent memory allocations fail. Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 22 5月, 2009 1 次提交
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由 Martin Michlmayr 提交于
Remove explicit names from platform device resources since they will automatically be named after the platform device they're associated with. Signed-off-by: NMartin Michlmayr <tbm@cyrius.com> Acked-by: NRussell King <linux@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 24 4月, 2009 1 次提交
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由 Nicolas Pitre 提交于
Symbols like SOFT_RESET are way too generic to be exported at large. To avoid this, let's move the mbus bridge register defines into a separate file and include it where needed. This affects mach-kirkwood, mach-loki, mach-mv78xx0 and mach-orion5x simultaneously as they all share code in plat-orion which relies on those defines. Some other defines have been moved to narrower scopes, or simply deleted when they had no user. This fixes compilation problem with mpt2sas on the above listed platforms. Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 20 3月, 2009 1 次提交
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由 Russell King 提交于
OMAP wishes to pass state to the boot loader upon reboot in order to instruct it whether to wait for USB-based reflashing or not. There is already a facility to do this via the reboot() syscall, except we ignore the string passed to machine_restart(). This patch fixes things to pass this string to arch_reset(). This means that we keep the reboot mode limited to telling the kernel _how_ to perform the reboot which should be independent of what we request the boot loader to do. Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 16 3月, 2009 1 次提交
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由 Lennert Buytenhek 提交于
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Acked-by: NStanislav Samsonov <samsonov@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 04 3月, 2009 1 次提交
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由 Riku Voipio 提交于
All the pieces were ready, just matter of assembling them together. Signed-off-by: NRiku Voipio <riku.voipio@iki.fi> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 20 2月, 2009 3 次提交
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由 Lennert Buytenhek 提交于
The A0 revision of the mv78xx0 development board has four ethernet ports, with PHY IDs 8-11, whereas the Z0 version has two, with PHY addresses 8-9. This patch configures the third and fourth ethernet port to use the PHY addresses on the A0 board to enable use of those ports -- if we are running on a Z0 board, the ge10/11 setup code in common.c will force these back to PHYless mode. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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由 Lennert Buytenhek 提交于
On pre-A0 revisions of the mv78xx0 SoC, the third and fourth ethernet interface are not brought out to pins, but are internally cross-connected, so if we run on pre-A0 silicon, we'll force eth2 and eth3 to PHYless mode. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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由 Lennert Buytenhek 提交于
During boot, identify which chip stepping we're running on (determined by looking at the first PCIe unit's device ID and revision registers), and print a message with the details about what we found. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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- 18 2月, 2009 1 次提交
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由 Nicolas Pitre 提交于
The GPIO interrupts can be configured as either level triggered or edge triggered, with a default of level triggered. When an edge triggered interrupt is requested, the gpio_irq_set_type method is called which currently switches the given IRQ descriptor between two struct irq_chip instances: orion_gpio_irq_level_chip and orion_gpio_irq_edge_chip. This happens via __setup_irq() which also calls irq_chip_set_defaults() to assign default methods to uninitialized ones. The problem is that irq_chip_set_defaults() is called before the irq_chip reference is switched, leaving the new irq_chip (orion_gpio_irq_edge_chip in this case) with uninitialized methods such as chip->startup() causing a kernel oops. Many solutions are possible, such as making irq_chip_set_defaults() global and calling it from gpio_irq_set_type(), or calling __irq_set_trigger() before irq_chip_set_defaults() in __setup_irq(). But those require modifications to the generic IRQ code which might have adverse effect on other architectures, and that would still be a fragile arrangement. Manually copying the missing methods from within gpio_irq_set_type() would be really ugly and it would break again the day new methods with automatic defaults are added. A better solution is to have a single irq_chip instance which can deal with both edge and level triggered interrupts. It is also a good idea to switch the IRQ handler instead, as the edge IRQ handler allows for one edge IRQ event to be queued as the IRQ is actually masked only when that second IRQ is received, at which point the hardware can queue an additional IRQ event, making edge triggered interrupts a bit more reliable. Tested-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 09 1月, 2009 1 次提交
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由 Nicolas Pitre 提交于
Commit ba84be23 broke the build. Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 21 12月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 04 12月, 2008 1 次提交
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由 Ronen Shitrit 提交于
The Orion ehci driver serves the Orion, kirkwood and DD Soc families. Since each of those integrate a different USB phy we should have the ability to use few initialization sequences or to leave the boot loader phy settings as is. Signed-off-by: NRonen Shitrit <rshitrit@marvell.com>
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