- 19 6月, 2013 37 次提交
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由 Vaibhav Hiremath 提交于
clkout2 comes out on the pad and is being used by various external on-board peripherals like, Audio codecs and stuff. So enable the clkout2 by default during init sequence itself. Also, add the missing entry of "clkout2_ck" to the clock table. Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com> Acked-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Vaibhav Hiremath 提交于
Represent debugSS clock interface as provided in CM_WKUP_DEBUGSS_CLKCTRL register, includes - Clock gate for optional DEBUG_CLKA and DBGSYSCLK - Clock Mux for TRC_PMD and STM_PMD - Clock divider for STM and TPIU Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com> Acked-by: NPaul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 J Keerthy 提交于
Add Palmas MFD node and the regulator nodes for OMAP5. The node definitions are based on: https://lkml.org/lkml/2013/6/6/25 Boot tested on omap5-uevm board. Signed-off-by: NGraeme Gregory <gg@slimlogic.co.uk> Signed-off-by: NJ Keerthy <j-keerthy@ti.com> Reviewed-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Philip Avinash 提交于
PWM output from ecap2 uses as backlight source. Also adds low threshold value to have a uniform divisions in brightness-levels scales with inverse polarity. Signed-off-by: NPhilip Avinash <avinashphilip@ti.com> Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Philip Avinash 提交于
PWM output from ecap0 uses as backlight source. Also adds low threshold value to have a uniform divisions in brightness-levels scales. Signed-off-by: NPhilip Avinash <avinashphilip@ti.com> Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Philip Avinash 提交于
Add PWMSS device tree nodes in relation with ECAP & EHRPWM DT nodes to AM33XX SoC family. Also populates device tree nodes for ECAP & EHRPWM by adding necessary properties like pwm-cells, base reg & set disabled as status. Signed-off-by: NPhilip Avinash <avinashphilip@ti.com> Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Eduardo Valentin 提交于
Add bandgap devices for OMAP4460 devices. Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Eduardo Valentin 提交于
Add the bandgap entry for OMAP4430 devices. Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Russell King <linux@arm.linux.org.uk> [benoit.cousson@linaro.org: Add blank line and fix reg presentation] Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Kevin Hilman 提交于
On most OMAP3 platforms, the twl4030 IRQ line is connected to the SYS_NIRQ line on OMAP. Add another DTS include file (twl4030_omap3.dtsi) for boards that hook up the twl4030 this way to include. This allows RTC wake from off-mode to work again on OMAP3-based platforms with twl4030. Tested on 3530/Beagle, 3730/Beagle-xM, 3530/Overo, 3730/Overo-STORM. Special thanks to Florian Vaussard for suggesting use of preprocessor feature. Cc: Florian Vaussard <florian.vaussard@epfl.ch> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Kevin Hilman 提交于
Using the gpio-keys bindings, configure the user button on Beagle boards. Since the user button is enabled as a wakeup source, also ensure the GPIO pin is mux'd correctly and has IO ring wakeups enabled, so it can also wakeup from off mode. Special thanks to Florian Vaussard for suggesting the preprocessor feature. Cc: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Kevin Hilman 提交于
Ensure the console uart (UART3) on these boards is mux'd correctly, and IO ring wakeup is enabled. This is needed for serial console wakeups when using DT boot. Thanks to Florian Vaussard for suggestion to use preprocessor features. Cc: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Sourav Poddar 提交于
Booting omap5 uevm results in the following error "did not get pins for uart error: -19" This happens because omap5 uevm dts file is not adapted to use uart through pinctrl framework. Populate uart pinctrl data to get rid of the error. Signed-off-by: NSourav Poddar <sourav.poddar@ti.com> [r.sricharan@ti.com: Replaced constants with preprocessor macros] Signed-off-by: NSricharan R <r.sricharan@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Dan Murphy 提交于
Add support for blue LED 1 off of GPIO 153. Make the LED a heartbeat LED Configure the MUX for GPIO output. Signed-off-by: NDan Murphy <dmurphy@ti.com> [r.sricharan@ti.com: Replaced constants with preprocessor macros] Signed-off-by: NSricharan R <r.sricharan@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Roger Quadros 提交于
Provide the RESET regulators for the USB PHYs, the USB Host port modes and the PHY devices. Also provide pin multiplexer information for the USB host pins. Signed-off-by: NRoger Quadros <rogerq@ti.com> [r.sricharan@ti.com: Replaced constants with preprocessor macros] Signed-off-by: NSricharan R <r.sricharan@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Sricharan R 提交于
The uevm is the only official board supported for the OMAP5 soc in mainline. The existent sevm platform will no more be supported. Hence cleaning up the board dts file to have only the data required for uevm. Renaming the board dts file and adding the following cleanups. * There are no devices connected on I2C 2,3,4 buses. So remove the pinmux data for the same. * OMAP5432 and DDR3 memory is used in the uevm. Temperature polling is not supported with DDR3 memories. Because of DDR3 phy limitation the voltage change across DVFS and all shadow registers for DVFS on DDR3 is not supported. Hence the emif kernel driver is not required, so removing the DDR3 device file and emif nodes for uevm. * Keypad is not supported on uevm. So remove the device node. Signed-off-by: NSricharan R <r.sricharan@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Florian Vaussard 提交于
When making the dtbs target on OMAP/AM35xx, some trees are not built. Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Florian Vaussard 提交于
Using constants for pinctrl allows a better readability, and removes redundancy with comments. Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch> Tested-by: NAfzal Mohammed <afzal@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Florian Vaussard 提交于
Use standard GPIO constants to enhance the readability of DT GPIOs. Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch> Tested-by: NAfzal Mohammed <afzal@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Florian Vaussard 提交于
Replace /include/ by #include for AM33XX and AM35XX device tree files, in order to use the C pre-processor, making use of #define features possible. Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch> Tested-by: NAfzal Mohammed <afzal@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Afzal Mohammed 提交于
DT source (minimal) for AM4372 SoC to represent AM43x SoC's. Those represented here are the minimal DT nodes necessary to get kernel booting. In DT nodes, "ti,hwmod" property has not been added, this would be added along with PRCM support for AM43x. Signed-off-by: NAnkur Kishore <a-kishore@ti.com> Signed-off-by: NAfzal Mohammed <afzal@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Dan Murphy 提交于
Update the dt property ti,audpwron-gpio to use the gpio macro definition for GPIO_ACTIVE_HIGH. Signed-off-by: NDan Murphy <dmurphy@ti.com> Reviewed-by: NFlorian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Dan Murphy 提交于
The GPIO for LED D1 on the omap4-panda a1-a3 rev and the omap4-panda-es are different. A1-A3 = gpio_wk7 ES = gpio_110 There is no change to LED D2 Abstract away the pinmux and the LED definitions for the two boards into the respective DTS files. Signed-off-by: NDan Murphy <dmurphy@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Florian Vaussard 提交于
Using constants for pinctrl allows a better readability, and removes redundancy with comments. Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Florian Vaussard 提交于
Use the constants defined in include/dt-bindings/interrupt-controller/ to enhance readability. Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Florian Vaussard 提交于
Use standard GPIO constants to enhance the readability of DT GPIOs. Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Florian Vaussard 提交于
Replace /include/ by #include for OMAP2+ DT, in order to use the C pre-processor, making use of #define features possible. Signed-off-by: NFlorian Vaussard <florian.vaussard@epfl.ch> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Philip Avinash 提交于
GPMC controller on AM335x-EVM has a NAND flash connected to it. This patch updates following in am335x-evm.dts: - adds nandflash specific pin-mux configs - adds nand node as child of GPMC contoller, with information about NAND flash interface, NAND partition table, ECC scheme, elm handle id. - updates GPMC node for newer GPMC DT properties added in linux-3.10. Signed-off-by: NPhilip Avinash <avinashphilip@ti.com> Signed-off-by: NGupta, Pekon <pekon@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Philip, Avinash 提交于
ELM hardware engine is used for locating bit-flips in NAND data This patch is required for working of hardware based NAND ECC schemes with DT support. Signed-off-by: NPhilip Avinash <avinashphilip@ti.com> Acked-by: NPeter Korsgaard <jacmet@sunsite.dk> Signed-off-by: NPekon Gupta <pekon@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Javier Martinez Canillas 提交于
The IGEP COM Module has an 512MB NAND flash memory. Add a device node for this NAND and its partition layout. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Javier Martinez Canillas 提交于
The IGEPv2 board has an 512MB NAND flash memory. Add a device node for this NAND and its partition layout. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Javier Martinez Canillas 提交于
The IGEPv2 board has an SMSC LAN9221i ethernet chip connected to the OMAP3 processor though the General-Purpose Memory Controller. This patch adds a device node for the ethernet chip as a GPMC child and all its dependencies (regulators, GPIO and pin muxs). Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Vaibhav Hiremath 提交于
xdma_event_intr1.clkout2 pad can be used to source clock from either 32K OSC or any of the PLL (except MPU) outputs. On the existing AM335x based boards (EVM, EVM-SK and Bone), this pad is used to feed the clock to audio codes. So, this patch configures the pinmux to get clkout2 on the pad. Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Vaibhav Hiremath 提交于
Add pin control binding for UART0 device nodes in all board specific DT files. Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com> Acked-by: NMatt Porter <mporter@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Vaibhav Hiremath 提交于
With DT support, where naming convention is based on base-addr and not id, so we should follow TRM/Spec numbering label. This patch changes UART numbering as per TRM, as uart0-5. Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com> Acked-by: NMatt Porter <mporter@ti.com> Cc: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Vaibhav Hiremath 提交于
Now gpio-leds driver is using devm_pinctrl_get_select_default() api to set default pinmux configuration required for the functionality of the driver, so this patch moves respective pinctrl binding inside leds node. Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Vaibhav Hiremath 提交于
Add pin control binding for I2C device nodes in all board specific DT files (as per current usage), EVM: Both i2c0 and i2c1 EVM-SK and Bone: Only i2c0 Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com> Acked-by: NMatt Porter <mporter@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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由 Suman Anna 提交于
The carveouts that have been reserved for multimedia usecases are not being used currently by any driver and so have been cleaned up. Memory will be allocated runtime through CMA for enabling the multimedia usecases. Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NBenoit Cousson <benoit.cousson@linaro.org>
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- 15 6月, 2013 3 次提交
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由 Benjamin Herrenschmidt 提交于
When replaying interrupts (as a result of the interrupt occurring while soft-disabled), in the case of the decrementer, we are exclusively testing for a pending timer target. However we also use decrementer interrupts to trigger the new "irq_work", which in this case would be missed. This change the logic to force a replay in both cases of a timer boundary reached and a decrementer interrupt having actually occurred while disabled. The former test is still useful to catch cases where a CPU having been hard-disabled for a long time completely misses the interrupt due to a decrementer rollover. CC: <stable@vger.kernel.org> [v3.4+] Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: NSteven Rostedt <rostedt@goodmis.org>
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由 Paul Mackerras 提交于
Normally, the kernel emulates a few instructions that are unimplemented on some processors (e.g. the old dcba instruction), or privileged (e.g. mfpvr). The emulation of unimplemented instructions is currently not working on the PowerNV platform. The reason is that on these machines, unimplemented and illegal instructions cause a hypervisor emulation assist interrupt, rather than a program interrupt as on older CPUs. Our vector for the emulation assist interrupt just calls program_check_exception() directly, without setting the bit in SRR1 that indicates an illegal instruction interrupt. This fixes it by making the emulation assist interrupt set that bit before calling program_check_interrupt(). With this, old programs that use no-longer implemented instructions such as dcba now work again. CC: <stable@vger.kernel.org> Signed-off-by: NPaul Mackerras <paulus@samba.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Michael Ellerman 提交于
It's possible for us to crash when running with ftrace enabled, eg: Bad kernel stack pointer bffffd12 at c00000000000a454 cpu 0x3: Vector: 300 (Data Access) at [c00000000ffe3d40] pc: c00000000000a454: resume_kernel+0x34/0x60 lr: c00000000000335c: performance_monitor_common+0x15c/0x180 sp: bffffd12 msr: 8000000000001032 dar: bffffd12 dsisr: 42000000 If we look at current's stack (paca->__current->stack) we see it is equal to c0000002ecab0000. Our stack is 16K, and comparing to paca->kstack (c0000002ecab3e30) we can see that we have overflowed our kernel stack. This leads to us writing over our struct thread_info, and in this case we have corrupted thread_info->flags and set _TIF_EMULATE_STACK_STORE. Dumping the stack we see: 3:mon> t c0000002ecab0000 [c0000002ecab0000] c00000000002131c .performance_monitor_exception+0x5c/0x70 [c0000002ecab0080] c00000000000335c performance_monitor_common+0x15c/0x180 --- Exception: f01 (Performance Monitor) at c0000000000fb2ec .trace_hardirqs_off+0x1c/0x30 [c0000002ecab0370] c00000000016fdb0 .trace_graph_entry+0xb0/0x280 (unreliable) [c0000002ecab0410] c00000000003d038 .prepare_ftrace_return+0x98/0x130 [c0000002ecab04b0] c00000000000a920 .ftrace_graph_caller+0x14/0x28 [c0000002ecab0520] c0000000000d6b58 .idle_cpu+0x18/0x90 [c0000002ecab05a0] c00000000000a934 .return_to_handler+0x0/0x34 [c0000002ecab0620] c00000000001e660 .timer_interrupt+0x160/0x300 [c0000002ecab06d0] c0000000000025dc decrementer_common+0x15c/0x180 --- Exception: 901 (Decrementer) at c0000000000104d4 .arch_local_irq_restore+0x74/0xa0 [c0000002ecab09c0] c0000000000fe044 .trace_hardirqs_on+0x14/0x30 (unreliable) [c0000002ecab0fb0] c00000000016fe3c .trace_graph_entry+0x13c/0x280 [c0000002ecab1050] c00000000003d038 .prepare_ftrace_return+0x98/0x130 [c0000002ecab10f0] c00000000000a920 .ftrace_graph_caller+0x14/0x28 [c0000002ecab1160] c0000000000161f0 .__ppc64_runlatch_on+0x10/0x40 [c0000002ecab11d0] c00000000000a934 .return_to_handler+0x0/0x34 --- Exception: 901 (Decrementer) at c0000000000104d4 .arch_local_irq_restore+0x74/0xa0 ... and so on __ppc64_runlatch_on() is called from RUNLATCH_ON in the exception entry path. At that point the irq state is not consistent, ie. interrupts are hard disabled (by the exception entry), but the paca soft-enabled flag may be out of sync. This leads to the local_irq_restore() in trace_graph_entry() actually enabling interrupts, which we do not want. Because we have not yet reprogrammed the decrementer we immediately take another decrementer exception, and recurse. The fix is twofold. Firstly make sure we call DISABLE_INTS before calling RUNLATCH_ON. The badly named DISABLE_INTS actually reconciles the irq state in the paca with the hardware, making it safe again to call local_irq_save/restore(). Although that should be sufficient to fix the bug, we also mark the runlatch routines as notrace. They are called very early in the exception entry and we are asking for trouble tracing them. They are also fairly uninteresting and tracing them just adds unnecessary overhead. [ This regression was introduced by fe1952fc "powerpc: Rework runlatch code" by myself --BenH ] CC: <stable@vger.kernel.org> [v3.4+] Signed-off-by: NMichael Ellerman <michael@ellerman.id.au> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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