1. 25 2月, 2012 2 次提交
  2. 05 11月, 2011 1 次提交
    • B
      ARM: OMAP2+: clock data: Remove redundant timer clkdev · 2847111c
      Benoit Cousson 提交于
      The commit 318c3e15
      added some "fck" clock alias to timer devices that are
      not needed anymore since hwmod framework will create
      them automatically.
      
      A warning was added to highlight and thus fix the redundancy.
      
      [    0.616424]  omap_timer.1: alias fck already exists
      [    0.621948]  omap_timer.2: alias fck already exists
      [    0.627380]  omap_timer.3: alias fck already exists
      [    0.632781]  omap_timer.4: alias fck already exists
      [    0.638214]  omap_timer.5: alias fck already exists
      [    0.643615]  omap_timer.6: alias fck already exists
      [    0.649078]  omap_timer.7: alias fck already exists
      [    0.654479]  omap_timer.8: alias fck already exists
      [    0.659881]  omap_timer.9: alias fck already exists
      [    0.665283]  omap_timer.10: alias fck already exists
      [    0.670776]  omap_timer.11: alias fck already exists
      
      Remove all the clkdev entries for timer fck alias.
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      2847111c
  3. 22 9月, 2011 1 次提交
  4. 10 7月, 2011 1 次提交
    • B
      OMAP: omap_device: Create clkdev entry for hwmod main_clk · bf1e0776
      Benoit Cousson 提交于
      Extend the existing function to create clkdev for every optional
      clocks to add a well one "fck" alias for the main_clk of the
      omap_hwmod.
      It will allow to remove these static clkdev entries from the
      clockXXX_data.c file.
      Signed-off-by: NBenoit Cousson <b-cousson@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Cc: Todd Poynor <toddpoynor@google.com>
      [paul@pwsan.com: remove all of the "fck" role clkdev aliases from the
       clock data files; fixed error message]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      bf1e0776
  5. 11 3月, 2011 2 次提交
  6. 08 3月, 2011 10 次提交
  7. 26 2月, 2011 1 次提交
  8. 22 12月, 2010 2 次提交
  9. 21 12月, 2010 1 次提交
  10. 10 12月, 2010 1 次提交
  11. 09 10月, 2010 2 次提交
    • P
      OMAP: control: move plat-omap/control.h to mach-omap2/control.h · 4814ced5
      Paul Walmsley 提交于
      Only OMAP2+ platforms have the System Control Module (SCM) IP block.
      In the past, we've kept the SCM header file in plat-omap.  This has
      led to abuse - device drivers including it; includes being added that
      create implicit dependencies on OMAP2+ builds; etc.
      
      In response, move the SCM headers into mach-omap2/.
      
      As part of this, remove the direct SCM access from the OMAP UDC
      driver.  It was clearly broken.  The UDC code needs an indepth review for
      use on OMAP2+ chips.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Cory Maccarrone <darkstar6262@gmail.com>
      Cc: Kyungmin Park <kyungmin.park@samsung.com>
      4814ced5
    • P
      OMAP2420: clock: add MCBSP_CLKS node and clkdev aliases · 1bccb345
      Paul Walmsley 提交于
      Add the MCBSP_CLKS clock and the clksel structures needed to support clock
      framework-based source switching for McBSP 1 and 2.  Also, add clkdev
      aliases on the parent clocks for the McBSP source switching code, added
      in a subsequent patch.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      1bccb345
  12. 28 9月, 2010 1 次提交
  13. 03 9月, 2010 1 次提交
  14. 21 5月, 2010 2 次提交
    • P
      OMAP2+ clock: remove DEFAULT_RATE clksel_rate flag · d74b4949
      Paul Walmsley 提交于
      The DEFAULT_RATE clksel_rate flag is essentially useless.  It was set
      on some of the lowest divisors, which, when switching to a much
      higher-rate parent, could have potentially resulted in rates that
      exceeded the hardware specifications for downstream clocks in the
      window between the clk_set_parent(), and a subsequent clk_set_rate().
      It seems much safer to just remove the flag and always use the highest
      available divisor (resulting in the lowest possible rate) after the
      switch, and this patch does so.
      
      Ideally, it would be best to first attempt to switch to a divisor that
      matches the clock's rate with the previous parent, if at all possible.
      But that is a project for some other day or some other person.  The
      parent changing code is rarely used.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      d74b4949
    • P
      OMAP2 PRCM: convert OMAP2 PRCM macros to the _SHIFT/_MASK suffixes · f38ca10a
      Paul Walmsley 提交于
      Fix all of the remaining OMAP2 PRCM register shift/bitmask macros that
      did not use the _SHIFT/_MASK suffixes to use them.  This makes the use
      of these macros consistent.  It is intended to reduce error, as code
      can be inspected visually by reviewers to ensure that bitshifts and
      bitmasks are used in the appropriate places.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Kevin Hilman <khilman@deeprootsystems.com>
      f38ca10a
  15. 03 5月, 2010 1 次提交
  16. 12 3月, 2010 1 次提交
  17. 25 2月, 2010 8 次提交
    • P
      OMAP clock: drop RATE_FIXED clock flag · 51c19541
      Paul Walmsley 提交于
      The RATE_FIXED clock flag is pointless.  In the OMAP1 clock code, it
      simply causes the omap1_clk_round_rate() function to return the
      current rate of the clock.  omap1_clk_round_rate(), however, should
      never be called for a fixed-rate clock, since none of these clocks
      have a .round_rate function pointer set in their struct clk records.
      Similarly, in the OMAP2+ clock code, the RATE_FIXED flag just causes
      the clock code to emit a warning if the OMAP clock maintainer was
      foolish enough to add a .round_rate function pointer to a fixed-rate
      clock.  "Doctor, it hurts when I pretend that a fixed-rate clock is
      rate-changeable."  "Then don't pretend that a fixed-rate clock is
      rate-changeable."  It has no functional value.  This patch drops the
      RATE_FIXED clock flag, removing it from all clocks that are so marked.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Richard Woodruff <r-woodruff2@ti.com>
      51c19541
    • P
      OMAP2 clock: drop DELAYED_APP clock flag · 8c34974a
      Paul Walmsley 提交于
      All of the clocks that are marked with DELAYED_APP are changed as part
      of the virt_prcm_set OPP virtual clock.  On 24xx, these clocks all
      need to be changed as part of a group to keep the clock tree
      functional - hence the need for the VALID_CONFIG bit, which is not
      present on later OMAPs.  These clocks should not be rate-changed
      independently.  So prevent these clocks from being changed
      independently by dropping their .round_rate and .set_rate function
      pointers.  It then turns out that the DELAYED_APP clock flag is no
      longer useful, so drop it and the associated code and renumber the
      clock flags.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Richard Woodruff <r-woodruff2@ti.com>
      8c34974a
    • P
      OMAP2 clock: split OMAP2420, OMAP2430 clock data into their own files · 81b34fbe
      Paul Walmsley 提交于
      In preparation for multi-OMAP2 kernels, split
      mach-omap2/clock2xxx_data.c into mach-omap2/clock2420_data.c and
      mach-omap2/clock2430_data.c.  2430 uses a different device space
      physical memory layout than past or future OMAPs, and we use a
      different virtual memory layout as well, which causes trouble for
      architecture-level code/data that tries to support both.  We tried
      using offsets from the virtual base last year, but those patches never
      made it upstream; so after some discussion with Tony about the best
      all-around approach, we'll just grit our teeth and duplicate the
      structures.  The maintenance advantages of a single kernel config that
      can compile and boot on OMAP2, 3, and 4 platforms are simply too
      compelling.
      
      This approach does have some nice benefits beyond multi-OMAP 2 kernel
      support.  The runtime size of OMAP2420-specific and OMAP2430-specific
      kernels is smaller, since unused clocks for the other OMAP2 chip will
      no longer be compiled in.  (At some point we will mark the clock data
      __initdata and allocate it during registration, which will eliminate
      the runtime memory advantage.)  It also makes the clock trees slightly
      easier to read, since 2420-specific and 2430-specific clocks are no
      longer mixed together.
      
      This patch also splits 2430-specific clock code into its own file,
      mach-omap2/clock2430.c, which is only compiled in for 2430 builds -
      mostly for organizational clarity.
      
      While here, fix a bug in the OMAP2430 clock tree: "emul_ck" was
      incorrectly marked as being 2420-only, when actually it is present on
      both OMAP2420 and OMAP2430.
      
      Thanks to Tony for some good discussions about how to approach this
      problem.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Richard Woodruff <r-woodruff2@ti.com>
      81b34fbe
    • P
      OMAP clock: drop .id field; ensure each clock has a unique name · b92c170d
      Paul Walmsley 提交于
      After the clkdev conversion, the struct clk.id field became
      superfluous, so, drop it.  Bring the clock names closer to the TRMs
      and ensure they are unique for debugfs.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      b92c170d
    • P
      OMAP2 clock: drop CONFIG_PARTICIPANT clock flag · 1a337717
      Paul Walmsley 提交于
      It turns out that the only purpose of the CONFIG_PARTICIPANT clock
      flag is to prevent omap2_clk_set_rate() and omap2_clk_set_parent()
      from being executed on clocks with that flag set.  The rate-changing
      component can be more directly accomplished by dropping the .set_rate
      and .round_rate function pointers from those CONFIG_PARTICIPANT struct
      clks.  As far as the parent-changing component is concerned, it turns
      out that none of the CONFIG_PARTICIPANT clocks have multiple parent
      choices, so all that is necessary is for omap2_clk_set_parent() to
      bail out early if the new parent is equal to the old parent.
      Implement this change and get rid of the flag, which has always had a
      confusing name (it appears to be a Kconfig option, falsely).
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Richard Woodruff <r-woodruff2@ti.com>
      1a337717
    • P
      OMAP2xxx clock: drop DELAYED_APP flag from non-clksel clocks · 17d09273
      Paul Walmsley 提交于
      The DELAYED_APP flag is effective only with clksel clocks, so drop it from
      clocks that are not rate-changeable or that use non-clksel rate changing code
      (e.g., virt_prcm_set).
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Richard Woodruff <r-woodruff2@ti.com>
      17d09273
    • P
      OMAP2xxx clock: GFX functional clock rates are not independently changeable · 94297784
      Paul Walmsley 提交于
      According to the OMAP242x TRM Rev X Figure 5-15 "Clock Output Control
      - Functional Clocks 2", the GFX functional clocks should be marked
      both DELAYED_APP and CONFIG_PARTICIPANT, meaning that their rates must
      be reprogrammed as part of a larger OPP set change.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Richard Woodruff <r-woodruff2@ti.com>
      94297784
    • P
      OMAP2/3/4 clock: fix DPLL multiplier value errors; also copyrights, includes, documentation · 93340a22
      Paul Walmsley 提交于
      The maximum DPLL multiplier (M) values for OMAP2xxx and OMAP3xxx are
      one increment higher than they should be.  See for example the
      OMAP242x TRM Rev X Section 5.10.6 "Clock Generator Registers" and the
      OMAP36xx TRM Rev C Table 3-202 "CM_CLKSEL1_PLL".  Programming a 0 into
      the DPLL's M register bitfield is valid for OMAP2/3 and indicates that
      the DPLL should enter MN-bypass mode.  Also, increase the minimum
      multiplier (M) value for the DPLL rate rounding code from 1 to 2, to
      ensure that it does not inadvertently put the DPLL into bypass.
      
      Note that the register documentation in the OMAP2xxx and OMAP3xxx TRMs
      does not make clear that the actual DPLL divider value (the "N") is
      the content of the appropriate register bitfield for the N value,
      _plus one_.  (In other words, an N register bitfield of 0 indicates a
      DPLL divider value of 1.)  This is only clearly documented in the
      OMAP4430 TRM, in, for example, OMAP4430 TRM Rev A Table 3-1167
      "CM_CLKSEL_DPLL_USB".
      
      While here, update copyrights, add kerneldoc for struct dpll_data,
      drop the unused struct dpll_data.max_tolerance field, remove some
      unnecessary #includes in DPLL-related code, and replace the #include
      of <linux/module.h> with <linux/list.h>, which is what was really
      needed.  The OMAP4 clock autogenerator script has been updated
      accordingly.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Benoît Cousson <b-cousson@ti.com>
      Cc: Rajendra Nayak <rnayak@ti.com>
      93340a22
  18. 30 1月, 2010 1 次提交
    • P
      OMAP2/3/4 clock: rename and clean the omap2_clk_init() functions · e80a9729
      Paul Walmsley 提交于
      Rename the omap2_clk_init() in the OMAP2, 3, and 4 clock code to be
      omap2xxx_clk_init(), omap3xxx_clk_init(), etc.  Remove all traces of
      the (commented) old virt_prcm_set code from omap3xxx_clk_init() and
      omap4xxx_clk_init(), since this will be handled with the OPP code that
      is cooking in the PM branch.
      
      After this patch, there should be very little else in the clock code
      that blocks a multi-OMAP 2+3 kernel.  (OMAP2420+OMAP2430 still has some
      outstanding issues that need to be resolved; this is pending on some
      additions to the hwmod data.)
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      e80a9729
  19. 29 1月, 2010 1 次提交
    • P
      OMAP2xxx clock: move sys_clk code into mach-omap2/clkt2xxx_sys.c · 44da0a51
      Paul Walmsley 提交于
      Move the sys_clk clock functions from clock2xxx.c to
      mach-omap2/clkt2xxx_sys.c.  This is intended to make the clock code
      easier to understand, since all of the functions needed to manage the
      sys_clk are now located in their own file, rather than being mixed
      with other, unrelated functions.
      
      Clock debugging is also now more finely-grained, since the DEBUG
      macro can now be defined for the sys_clk clock alone.  This
      should reduce unnecessary console noise when debugging.
      
      Also, if at some future point the mach-omap2/ directory is split into
      OMAP2/3/4 variants, this clkt file can be placed in the mach-omap2xxx/
      directory, rather than shared with other chip types that don't use
      this clock type.
      
      Thanks to Alexander Shishkin <virtuoso@slind.org> for his comments to
      improve the patch description.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: Alexander Shishkin <virtuoso@slind.org>
      44da0a51