1. 05 10月, 2015 2 次提交
    • G
      serial: sh-sci: Prevent compiler warnings on 64-bit · a9efeca6
      Geert Uytterhoeven 提交于
      Expressions involving "BIT(...)" create values of type "long", which is
      64-bit on 64-bit.  Hence "~BIT(...)" no longer fits in 32-bit, which
      will cause future compiler warnings when assigning to 32-bit variables:
      
          drivers/tty/serial/sh-sci.c: In function 'sci_init_single':
          drivers/tty/serial/sh-sci.h:58:25: warning: large integer implicitly truncated to unsigned type [-Woverflow]
           #define SCI_ERROR_CLEAR ~(SCI_RESERVED | SCI_PER | SCI_FER | SCI_ORER)
      			     ^
          drivers/tty/serial/sh-sci.c:2325:27: note: in expansion of macro 'SCI_ERROR_CLEAR'
             sci_port->error_clear = SCI_ERROR_CLEAR;
      
      As these values are (at most) 32-bit register values anyway, cast them
      to "u32" at the definition level to prevent such compiler warnings.
      Reported-by: Nkbuild test robot <fengguang.wu@intel.com>
      Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      a9efeca6
    • G
      serial: sh-sci: Replace buggy big #ifdef by runtime logic · a1b5b43f
      Geert Uytterhoeven 提交于
      The #ifdef logic to clear SCxSR bits using RMW on SCIFA/SCIFB and SCIF
      variants with some SCIFA features (sh7705/SH7720/sh7721) has several
      drawbacks:
        - It wasn't updated for newer R-Mobile variants (APE6),
        - It doesn't correctly handle SoCs with both SCIF and SCIFA/B (e.g.
          R-Car Gen2, but also legacy sh7723/sh7724),
        - It doesn't play well with ARM multi-platform kernels: on R-Car Gen2,
          SCIF/SCIFA/SCIFB/HSCIF were handled differently, depending on
          whether r8a7740 or sh73a0 support was enabled or not,
      
      Replace the #ifdef logic by runtime logic to fix this.
      
      SCIFA/SCIFB and SCIF on sh7705/sh7720/sh7721 use RMW to clear error
      bits, other variants use plain stores, as before.
      
      Note that this changes behavior for SCIFA on sh7723/sh7724 (these SoCs
      have both SCIF and SCIFA), which didn't use RMW before.
      Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      a1b5b43f
  2. 11 5月, 2015 7 次提交
  3. 07 5月, 2015 1 次提交
  4. 24 12月, 2013 1 次提交
  5. 26 3月, 2013 1 次提交
  6. 30 3月, 2012 1 次提交
  7. 11 11月, 2011 1 次提交
  8. 14 6月, 2011 2 次提交
    • P
      serial: sh-sci: FIFO sizing helper consolidation. · 72b294cf
      Paul Mundt 提交于
      This consolidates all of the TX/RX fill/room nonsense in to a single set
      of fairly heavyweight definitions. The implementation goes in descending
      order of complexity, testing the register map for capabilities until we
      run out of options and do it the legacy SCI way. Masks are derived
      directly from the per-port FIFO size, meaning that platforms with FIFO
      sizes not matching the standard port types will still need to manually
      fix them up.
      
      This also fixes up a number of issues such as tx_empty being completely
      bogus for SCI and IrDA ports, some ports using masks smaller or greater
      than their FIFO size, and so forth.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      72b294cf
    • P
      serial: sh-sci: Abstract register maps. · 61a6976b
      Paul Mundt 提交于
      This takes a bit of a sledgehammer to the horribly CPU subtype
      ifdef-ridden header and abstracts all of the different register layouts
      in to distinct types which in turn can be overriden on a per-port basis,
      or permitted to default to the map matching the port type at probe time.
      
      In the process this ultimately fixes up inumerable bugs with mismatches
      on various CPU types (particularly the legacy ones that were obviously
      broken years ago and no one noticed) and provides a more tightly coupled
      and consolidated platform for extending and implementing generic
      features.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      61a6976b
  9. 08 6月, 2011 5 次提交
  10. 06 6月, 2011 1 次提交
  11. 23 5月, 2011 1 次提交
    • M
      sh: sh-sci: sh7377 and sh73a0 build fixes · 5b02c51a
      Magnus Damm 提交于
      Fix sh7377 and sh73a0 build failure:
      
      drivers/tty/serial/sh-sci.c: In function 'scif_txfill':
      drivers/tty/serial/sh-sci.c:338: error: implicit declaration of function 'sci_SCTFDR_in'
      drivers/tty/serial/sh-sci.c: In function 'scif_rxfill':
      drivers/tty/serial/sh-sci.c:351: error: implicit declaration of function 'sci_SCRFDR_in'
      make[3]: *** [drivers/tty/serial/sh-sci.o] Error 1
      make[2]: *** [drivers/tty/serial] Error 2
      make[1]: *** [drivers/tty] Error 2
      make: *** [drivers] Error 2
      Signed-off-by: NMagnus Damm <damm@opensource.se>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      5b02c51a
  12. 14 1月, 2011 1 次提交
    • G
      tty: move drivers/serial/ to drivers/tty/serial/ · ab4382d2
      Greg Kroah-Hartman 提交于
      The serial drivers are really just tty drivers, so move them to
      drivers/tty/ to make things a bit neater overall.
      
      This is part of the tty/serial driver movement proceedure as proposed by
      Arnd Bergmann and approved by everyone involved a number of months ago.
      
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Rogier Wolff <R.E.Wolff@bitwizard.nl>
      Cc: Michael H. Warfield <mhw@wittsend.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      ab4382d2
  13. 18 11月, 2010 1 次提交
    • M
      ARM: mach-shmobile: Initial AG5 and AG5EVM support · 6d9598e2
      Magnus Damm 提交于
      This patch adds initial support for Renesas SH-Mobile AG5.
      
      At this point the AG5 CPU support is limited to the ARM
      core, SCIF serial and a CMT timer together with L2 cache
      and the GIC. The AG5EVM board also supports Ethernet.
      
      Future patches will add support for GPIO, INTCS, CPGA
      and platform data / driver updates for devices such as
      IIC, LCDC, FSI, KEYSC, CEU and SDHI among others.
      
      The code in entry-macro.S will be cleaned up when the
      ARM IRQ demux code improvements have been merged.
      
      Depends on the AG5EVM mach-type recently registered but
      not yet present in arch/arm/tools/mach-types.
      
      As the AG5EVM board comes with 512MiB memory it is
      recommended to turn on HIGHMEM.
      
      Many thanks to Yoshii-san for initial bring up.
      Signed-off-by: NMagnus Damm <damm@opensource.se>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      6d9598e2
  14. 21 6月, 2010 1 次提交
  15. 24 5月, 2010 1 次提交
  16. 23 3月, 2010 2 次提交
  17. 08 2月, 2010 2 次提交
  18. 24 12月, 2009 1 次提交
  19. 25 11月, 2009 1 次提交
    • P
      serial: sh-sci: Depend on HAVE_CLK unconditionally. · edad1f20
      Paul Mundt 提交于
      The sh-sci code conditionalized the clock framework support in order to
      give the other platforms a chance to catch up. sh64 supported this some
      time ago and the forthcoming ARM changes handle this as well, this leaves
      h8300 as the odd one out. H8300 has had since 2.5 to merge it's sh-sci
      support upstream, and has yet to do so. At this point I will no longer be
      holding back the driver to support an unreponsive architecture, 7 years
      is quite enough of a grace period. Support is easily implemented on the
      architecture if and when it ever decides to merge its changes upstream.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      edad1f20
  20. 21 8月, 2009 1 次提交
  21. 24 6月, 2009 5 次提交
  22. 09 5月, 2009 1 次提交