The Samsung's S3C2416, S3C2443 and S3C2450 includes a USB High-Speed
device controller module. This driver enables support for USB high-speed
gadget functionality for the Samsung S3C24xx SoC's that include this
controller.
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: NSangbeom Kim <sbkim73@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NAlexander Neumann <alexander@bumpern.de>
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Comparing an unsigned integer with greater than or equal to zero is
always true.  So, it is safe to remove similar checks from
'f_mass_storage.c' and 'file_storage.c'
Signed-off-by: NMaxin B. John <maxin.john@gmail.com>
Acked-by: NMichal Nazarewicz <mina86@mina86.com>
Acked-by: NAlan Stern <stern@rowland.harvard.edu>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

On amd64 unsigned is not as wide as pointer and this causes a compiler
warning. Switching to unsigned long corrects the problem.
Signed-off-by: NGreg Dietsche <Gregory.Dietsche@cuw.edu>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

The __devinit and __devexit macros were added to probe and remove
functions. The macros move the probe and remove functions to the
devinit and devexit sections
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

CC: David Chalmers <david.chalmers@telegesis.com>
Reported-by: NXavier Carcelle <xavier.carcelle@gmail.com>
Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Defer the SET_CONFIG and SET_INTERFACE control transfer's data/status
stages till we are ready to process new CBW from the host. This way we
ensure that we don't loose any CBW during MSC compliance tests and cause
lock up.
Signed-off-by: NRoger Quadros <roger.quadros@nokia.com>
Acked-by: NMichal Nazarewicz <mina86@mina86.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Some USB function drivers (e.g. f_mass_storage.c) need to delay or defer the
data/status stages of standard control requests like SET_CONFIGURATION or
SET_INTERFACE till they are done with their bookkeeping and are actually ready
for accepting new commands to their interface.

They can now achieve this functionality by returning USB_GADGET_DELAYED_STATUS
in their setup handlers (e.g. set_alt()). The composite framework will then
defer completion of the control transfer by not completing the data/status stages.

This ensures that the host does not send new packets to the interface till the
function driver is ready to take them.

When the function driver that requested for USB_GADGET_DELAYED_STATUS is done
with its bookkeeping, it should signal the composite framework to continue with
the data/status stages of the control transfer. It can do so by invoking
the new API usb_composite_setup_continue(). This is where the control transfer's
data/status stages are completed and host can initiate new transfers.

The DELAYED_STATUS mechanism is currently only supported if the expected data phase
is 0 bytes (i.e. w_length == 0). Since SET_CONFIGURATION and SET_INTERFACE are the
only cases that will use this mechanism, this is not a limitation.
Signed-off-by: NRoger Quadros <roger.quadros@nokia.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This is a new TRB Completion Code of the xHCI spec 1.0.
Asserted by the Evalute Context Command if the proposed Max Exit Latency would
not allow the periodic endpoints of the Device Slot to be scheduled.
Signed-off-by: NAlex He <alex.he@amd.com>
Signed-off-by: NAndiry Xu <andiry.xu@amd.com>
Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>

xHCI 1.0 spec says the TT Think Time field shall be set to zero if the device
is not a High-speed hub.
Signed-off-by: NAndiry Xu <andiry.xu@amd.com>
Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>

Currently an isoc URB is divided into multiple TDs, and every TD will
trigger an interrupt when it's processed. However, software can schedule
multiple TDs at a time, and it only needs an interrupt every URB.

xHCI 1.0 introduces the Block Event Interrupt(BEI) flag which allows Normal
and Isoch Transfer TRBs to place an Event TRB on an Event Ring but not
assert an intrrupt to the host, and the interrupt rate is significantly
reduced and the system performance is improved.
Signed-off-by: NAndiry Xu <andiry.xu@amd.com>
Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>

xHCI 1.0 specification specifies that CErr does not apply to Isoch endpoints
and shall be set to '0' for Isoch endpoints.
Signed-off-by: NAndiry Xu <andiry.xu@amd.com>
Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>

xHCI 1.0 specification indicates that software should set Average TRB Length
to '8' for control endpoints.
Signed-off-by: NAndiry Xu <andiry.xu@amd.com>
Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>

Setup Stage Transfer Type field is added to indicate the presence and the
direction of the Data Stage TD, and determines the direction of the Status
Stage TD so the wLength length field should be ignored by the xHC.
Signed-off-by: NAndiry Xu <andiry.xu@amd.com>
Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>

Signed-off-by: NPavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Signed-off-by: NAnji jonnala <anjir@codeaurora.org>
Signed-off-by: NPavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Implement good battery algorithm defined in the battery charging V1.2 spec
for detecting different charging ports.  USB hardware is put into low power
mode when connected to a dedicated charging port.  vbus_draw and set_power
methods are implemented for determining the allowed current from Host in
different states (un-configured/suspend/configured).

The charger block is implemented using vendor specific registers and the
PHY used in MSM8960(28nm PHY) different from older targets like MSM8x60
and MSM7x30(45nm PHY).  The PHY vendor and product id registers are not
implemented in the above chipsets.  Hence PHY type is passed via platform
data.
Signed-off-by: NPavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

HSUSB core clock is derived from daytona fabric clock and for
HSUSB operational require minimum core clock at 55MHz. Since, HSUSB
cannot tolerate daytona fabric clock change in the middle of HSUSB
operational, vote for maximum Daytona fabric clock
while usb is operational
Signed-off-by: NAnji jonnala <anjir@codeaurora.org>
Signed-off-by: NPavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This patch adds support for the UHCI part of the GRLIB GRUSBHC controller
found on some LEON/GRLIB SoCs.

The UHCI HCD previously only supported controllers connected over PCI.
This patch adds support for the first non-PCI UHCI HC. I have tried to
replicate the solution used in ehci-hcd.c.

Tested on GR-LEON4-ITX board (LEON4/GRLIB with GRUSBHC) and x86 with Intel
UHCI HC.
Signed-off-by: NJan Andersson <jan@gaisler.com>
Acked-by: NAlan Stern <stern@rowland.harvard.edu>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This patch is part of a series that extend the UHCI HCD to support
non-PCI host controllers.

This patch also extends the uhci_{read,write}* functions to allow accesses
to registers not mapped into PCI I/O space. This extension also includes
the addition of a void __iomem pointer to the uhci structure.

A new Kconfig option is added to signal that the system has a non-PCI HC.
If this Kconfig option is set, uhci-hcd.c will include generic reset functions
for systems that do not make use of keyboard and mouse legacy support. PCI
controllers will still always use the reset functions from pci-quirks

This patch is followed by a patch that adds bus glue for the first non-PCI
UHCI HC.
Signed-off-by: NJan Andersson <jan@gaisler.com>
Acked-by: NAlan Stern <stern@rowland.harvard.edu>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This patch is part of a series that extend the UHCI HCD to support
non-PCI controllers.

This patch replaces in{b,w,l} and out{b,wl} with calls to local inline
functions. This is done so that the register access functions can be
extended to support register areas not mapped in PCI I/O space.
Signed-off-by: NJan Andersson <jan@gaisler.com>
Acked-by: NAlan Stern <stern@rowland.harvard.edu>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This patch is part of a series that extend the UHCI HCD to support
non-PCI controllers.

This patch moves PCI specific functions to uhci-pci.c and includes
this file in uhci-hcd.c. It also renames the function uhci_init to
uhci_pci_init.

uhci_init/uhci_pci_init is modified so that the port-detection logic
is kept in a new separate function uhci_count_ports() in uhci-hcd.c.
Signed-off-by: NJan Andersson <jan@gaisler.com>
Acked-by: NAlan Stern <stern@rowland.harvard.edu>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This patch is part of a series that extend the UHCI HCD to support
non-PCI host controllers.

This patch fixes the following warnings from checkpatch:

ERROR: switch and case should be at the same indent
+   switch (to_pci_dev(uhci_dev(uhci))->vendor) {
+       default:
[...]
+       case PCI_VENDOR_ID_GENESYS:
[...]
+       case PCI_VENDOR_ID_INTEL:

WARNING: static char array declaration should probably be static const char
+   static char bad_Asus_board[] = "A7V8X";

WARNING: Use DEFINE_PCI_DEVICE_TABLE for struct pci_device_id
+static const struct pci_device_id uhci_pci_ids[] = { {
Signed-off-by: NJan Andersson <jan@gaisler.com>
Acked-by: NAlan Stern <stern@rowland.harvard.edu>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This patch is part of a series that extend the UHCI HCD to support
non-PCI controllers.

This patch changes calls to uhci_reset_hc, uhci_check_and_reset_hc,
configure_hc, resume_detect_interrupts_are_broken and
global_suspend_mode_is_broken so that they are made through pointers
in the uhci hcd struct. This will allow these functions to be replaced
with bus/arch specific functions.
Signed-off-by: NJan Andersson <jan@gaisler.com>
Acked-by: NAlan Stern <stern@rowland.harvard.edu>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This patch is part of a series that extend the UHCI HCD to support
non-PCI host controllers.

uhci-hub.c contained two PCI vendor checks for silicon quirks. Move
these checks into uhci-hcd.c and use bits in uhci_hcd structure to
mark that we need to use the quirks.

This patch is followed by other patches that will remove PCI
dependencies from uhci-hcd.c as well.
Signed-off-by: NJan Andersson <jan@gaisler.com>
Acked-by: NAlan Stern <stern@rowland.harvard.edu>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Though USB controller works without this most of the time, an issue was faced
where USB was configured as printer device and it was dropping first
packet(64 bytes) in full speed mode due to DATA PID mismatch.
The problem gets resolved once unused endpoints are configured as bulk.
As per P1020 RM (Table17-31, bits 19-18, bits 3-2) "When only one endpoint
(RX or TX, but not both) of an endpoint pair is used, the unused endpoint
should be configured as a bulk type endpoint." So according to the RM,
this patch is initializing TX and RX endpoints as bulk type
Signed-off-by: NSuchit Lepcha <Suchit.Lepcha@freescale.com>
Signed-off-by: NRamneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Return PTR_ERR(clk) instead of -ENOENT if clk_get fails
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This patch fixes the checkpatch errors ans warnings listed below:

ERROR: do not use assignment in if condition
WARNING: line over 80 characters
WARNING: braces {} are not necessary for single statement blocks
WARNING: space prohibited between function name and open parenthesis '('
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Remove a stray 'return 0' at the top of the suspend callback,
and move au1xxx_stop_ehc() out of the ehci spinlock since it takes
some time to complete.
Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Commit 3dacdf11 "usb: factor out state_string() on otg drivers"
broke building musb drivers since there is already another
otg_state_string() function in musb drivers, but with different
prototype. Fix musb drivers to use common otg_state_string(), too.

Also provide a nop for otg_state_string() if CONFIG_USB_OTG_UTILS
is not defined.
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This patch adds support for the GRLIB GRUSBHC EHCI controller from
Aeroflex Gaisler. The controller is typically found on LEON/GRLIB
SoCs.

Tested on GR-LEON4-ITX with with little endian interface and on
LEON3 system on GR-PCI-XC5V development board for big endian
controller.
Signed-off-by: NJan Andersson <jan@gaisler.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

The two first HC capability registers (CAPLENGTH and HCIVERSION)
are defined as one 8-bit and one 16-bit register. Most HC
implementations have selected to treat these registers as part
of a 32-bit register, giving the same layout for both big and
small endian systems.

This patch adds a new quirk, big_endian_capbase, to support
controllers with big endian register interfaces that treat
HCIVERSION and CAPLENGTH as individual registers.
Signed-off-by: NJan Andersson <jan@gaisler.com>
Acked-by: NAlan Stern <stern@rowland.harvard.edu>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This patch clears PORT_PLC if xhci_bus_resume() resumes a previous suspended
port, because if a port transition from U3 to U0 state, it will report a
port link state change, and software should clear the corresponding PLC bit.

It also uses hcd->speed to check if a port is a USB2 protocol port.

The patch fixes the issue that USB keyboard can not wakeup system from
hibernation.
Signed-off-by: NAndiry Xu <andiry.xu@amd.com>
Signed-off-by: NSarah Sharp <sarah.a.sharp@linux.intel.com>

The current code is clearing in_lpm flag after enabling the IRQ.
If IRQ comes immediately before in_lpm flag is set, it thinks that
hardware is in low power mode and disables the IRQ.  Fix this by
clearing in_lpm flag before enabling the IRQ.
Signed-off-by: NPavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Some of the simulators may cache the ep0 maxpacket size to zero
if the ep0 dQh is not setup before enabling the pullup. Hence
Setup ep0 and initialize the dQh fields once while registering the
gadget(before enabling the pullup).

HSUSB Chipidea link controller spec says ep0 is enabled always
in the HW. Hence disabling and enabling the ep0 as a part of
reset interrupt is unneccesary.
Remove the disable/enable ep0 logic from reset interrupt handling.
Signed-off-by: NAnji jonnala <anjir@codeaurora.org>
Signed-off-by: NPavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

The current code queue the control OUT data request to ep0in instead of
ep0out.  Check ep0_dir and use the correct control endpoint.
Signed-off-by: NPavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

The OUT endpoints are stored in 0 - hw_ep_max/2 and IN endpoints are
stored from hw_ep_max/2 - hw_ep_max in ci13xxx_ep array.  Retrieve
the IN endpoint correctly while processing endpoint feature requests.
Signed-off-by: NPavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Signed-off-by: NPavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Signed-off-by: NPavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Signed-off-by: NPavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Ask for vbus_draw regulator before registering tranceiver to disallow possible
race between registration and set_power/etc.
Signed-off-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Cc: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>